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path: root/drivers/gpu/drm/i915/i915_reg.h
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* drm/i915: Fix hpd live status bits for g4xVille Syrjälä2016-02-151-7/+8
* drm/i915: Handle PipeC fused off on IVB/HSW/BDWGabriel Feceoru2016-02-101-0/+1
* drm/i915/skl: Fix typo in DPLL_CFGCR1 definitionLyude2016-02-101-1/+1
* drm/i915/bxt: Check BIOS RC6 setup before enabling RC6Sagar Arun Kamble2016-02-051-0/+11
* drm/i915: Extend gpio read/write to other coresDeepak M2016-02-041-0/+2
* drm/i915/vlv: drop unused vlv_gps_core_read/write functionsJani Nikula2016-02-041-1/+0
* drm/i915: put the IOSF port defines in numerical orderJani Nikula2016-02-041-5/+5
* drm/i915: implement WaIncreaseDefaultTLBEntriesTim Gore2016-02-041-0/+7
* drm/i915/skl/kbl: Add support for pipe fusingPatrik Jakobsson2016-02-021-0/+3
* drm/i915/skl: Enable Per context Preemption granularity controlArun Siluvery2016-01-251-0/+3
* drm/i915/bxt: Add GEN9_CS_DEBUG_MODE1 to HW whitelistArun Siluvery2016-01-251-0/+1
* drm/i915/gen9: Add HDC_CHICKEN1 to HW whitelistArun Siluvery2016-01-251-0/+2
* drm/i915/gen9: Add GEN8_CS_CHICKEN1 to HW whitelistArun Siluvery2016-01-251-0/+2
* drm/i915/gen9: Add framework to whitelist specific GPU registersArun Siluvery2016-01-251-0/+3
* Merge remote-tracking branch 'airlied/drm-next' into drm-intel-next-queuedDaniel Vetter2016-01-181-24/+24
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| * Merge tag 'drm-intel-next-2015-12-18' of git://anongit.freedesktop.org/drm-in...Dave Airlie2015-12-231-3/+3
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| * | drm/doc: Convert to markdownDanilo Cesar Lemes de Paula2015-12-151-24/+24
* | | drm/i915: Add non claimed mmio checking for vlv/chvMika Kuoppala2016-01-081-0/+5
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* | drm/i915: dual link pipe selection for bxtDeepak M2015-12-111-3/+1
* | drm/i915: Disable CLKOUT_DP bending on LPT/WPT as neededVille Syrjälä2015-12-081-0/+2
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* drm/i915: Correct the Ref clock value for BXTDeepak M2015-12-041-1/+1
* drm/i915: Don't register the CRT connector when it's fused off on LPT-HVille Syrjälä2015-12-021-0/+1
* drm/i915/bxt: backlight clock gating workaroundImre Deak2015-12-021-0/+7
* drm/i915: Type safe register read/writeVille Syrjälä2015-11-181-1262/+1210
* drm/i915: Add missing ')' to SKL_PS_ECC_STAT defineVille Syrjälä2015-11-181-1/+1
* drm/i915: Give names to more ring registersVille Syrjälä2015-11-181-0/+8
* drm/i915: Make the cmd parser 64bit regs explicitVille Syrjälä2015-11-181-2/+18
* drm/i915: Make the high dword offset more explicit in i915_reg_read_ioctlVille Syrjälä2015-11-181-1/+2
* drm/i915: Parametrize MOCS registersVille Syrjälä2015-11-181-6/+6
* drm/i915: Parametrize L3 error registersVille Syrjälä2015-11-181-4/+2
* drm/i915: Prefix raw register defines with underscoreVille Syrjälä2015-11-181-131/+131
* drm/i915/gen9: Turn DC handling into a power wellPatrik Jakobsson2015-11-171-0/+1
* drm/i915: Explain usage of power well IDs vs bit groupsPatrik Jakobsson2015-11-171-0/+4
* drm/i915/gen9: simplify DC toggling codeImre Deak2015-11-171-0/+1
* drm/i915: fix the power well ID for always on wellsImre Deak2015-11-171-1/+3
* drm/i915: Add dev_priv->psr_mmio_baseVille Syrjälä2015-11-161-7/+8
* drm/i915: Remove the magic AUX_CTL is at DP + foo tricksVille Syrjälä2015-11-161-27/+27
* drm/i915: Parametrize AUX registersVille Syrjälä2015-11-161-50/+52
* drm/i915: s/DP_PLL_FREQ_160MHZ/DP_PLL_FREQ_162MHZ/Ville Syrjälä2015-11-101-1/+1
* drm/i915: Add csr programming registers to dmc debugfs entryMika Kuoppala2015-11-091-0/+10
* drm/i915/bxt: Expose DC5 entry countMika Kuoppala2015-11-091-0/+1
* drm/i915/skl: Expose DC5/DC6 entry countsDamien Lespiau2015-11-091-0/+4
* drm/i915/skl: While sanitizing cdclock check the SWF18 as wellShobhit Kumar2015-11-051-0/+1
* drm/i915: Use paramtrized WRPLL_CTL()Ville Syrjälä2015-10-261-1/+1
* drm/i915: Parametrize and fix SWF registersVille Syrjälä2015-10-131-14/+14
* drm/i915: s/PIPE_FRMCOUNT_GM45/PIPE_FRMCOUNT_G4X/ etc.Ville Syrjälä2015-10-131-6/+6
* drm/i915: Fix a few bad hex numbers in register definesVille Syrjälä2015-10-131-2/+2
* drm/i915: Protect register macro argumentsVille Syrjälä2015-10-131-46/+46
* drm/i915: Include gpio_mmio_base in GMBUS reg definesVille Syrjälä2015-10-131-6/+6
* drm/i915: Parametrize HSW video DIP data registersVille Syrjälä2015-10-131-8/+8
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