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path: root/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c
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* drm/amdgpu: use the TTM dummy page instead of allocating oneChristian König2018-02-261-2/+2
| | | | | | | | | We have a global dummy page in TTM, use that one instead of allocating a new one. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: move struct amdgpu_mc into amdgpu_gmc.hChristian König2018-02-191-12/+12
| | | | | | | | And rename it to amdgpu_gmc as well. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Samuel Li <Samuel.Li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: implement 2+1 PD support for Raven v3Christian König2017-12-181-13/+29
| | | | | | | | | | | | Instead of falling back to 2 level and very limited address space use 2+1 PD support and 128TB + 512GB of virtual address space. v2: cleanup defines, rebase on top of level enum v3: fix inverted check in hardware setup Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-and-Tested-by: Chunming Zhou <david1.zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/admgpu: Reduce the usage of soc15ip.hShaoyun Liu2017-12-081-1/+0
| | | | | | | | Remove the header where it's not used. Acked-by: Christian Konig <christian.koenig@amd.com> Signed-off-by: Shaoyun Liu <Shaoyun.Liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/include:cleanup vega10 header files.Feifei Xu2017-12-061-2/+2
| | | | | | | | Remove asic_reg/vega10 folder. Signed-off-by: Feifei Xu <Feifei.Xu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/include:cleanup vega10 gc header files.Feifei Xu2017-12-061-3/+3
| | | | | | | | | | Cleanup asic_reg/vega10/GC folder. Signed-off-by: Feifei Xu <Feifei.Xu@amd.com> Signed-off-by: Feifei Xu <Feifei.Xu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu:halt when vm faultMonk Liu2017-09-261-0/+6
| | | | | | | | only with this way we can debug the VMC page fault issue Signed-off-by: Monk Liu <Monk.Liu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/amdgpu: fix BANK_SELECT on Vega10 (v2)Roger He2017-08-291-3/+2
| | | | | | | | | | | BANK_SELECT should always be FRAGMENT_SIZE + 3 due to 8-entry (2^3) per cache line in L2 TLB for Vega10. v2: agd: fix warning Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Roger He <Hongbo.He@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/amdgpu: store fragment_size in vm_managerRoger He2017-08-171-2/+3
| | | | | | | | | adds fragment_size in the vm_manager structure and implements hardware setup for it. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Roger He <Hongbo.He@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: fix Vega10 HW config for 2MB pagesChristian König2017-08-171-2/+2
| | | | | | | | | Those values weren't correct. This should result in quite some speedup. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Acked-by: Chunming Zhou <david1.zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: increase fragmentation size for Vega10 v2Christian König2017-07-251-1/+3
| | | | | | | | | | | | The fragment bits work differently for Vega10 compared to previous generations. Increase the fragment size to 2MB for now to better handle that. v2: handle the hardware setup as well Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-and-tested-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: Send no-retry XNACK for all fault typesJay Cornwall2017-07-141-0/+3
| | | | | | | | | | | | | | | | | A subset of VM fault types currently send retry XNACK to the client. This causes a storm of interrupts from the VM to the host. Until the storm is throttled by other means send no-retry XNACK for all fault types instead. No change in behavior to the client which will stall indefinitely with the current configuration in any case. Improves system stability under GC or MMHUB faults. Signed-off-by: Jay Cornwall <Jay.Cornwall@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Reviewed-by: John Bridgman <John.Bridgman@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: consistent name all GART related partsChristian König2017-07-141-4/+4
| | | | | | | | Rename symbols from gtt_ to gart_ as appropriate. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/amdgpu: Cleanup gfxhub read-modify-write patternsTom St Denis2017-06-151-8/+3
| | | | | Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/amdgpu: Port GFXHUB over to new SOC15 macrosTom St Denis2017-06-151-14/+12
| | | | | Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: update to use RREG32_SOC15/WREG32_SOC15 for gfxhubHuang Rui2017-06-061-77/+64
| | | | | | | Signed-off-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: remove gfxhub ipHuang Rui2017-06-061-93/+0
| | | | | | | Signed-off-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: export gfxhub sw_init into gmcHuang Rui2017-06-061-12/+14
| | | | | | | Signed-off-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: fix to miss program invalidation at resumeHuang Rui2017-06-061-12/+15
| | | | | | | | | | This patch moves invalidation into gart enable function from hw_init. Because we would like align the sequence calling between init and resume. Signed-off-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: abstract setup vmid config for gfxhub/mmhubHuang Rui2017-06-061-24/+27
| | | | | | | Signed-off-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: abstract disable identity aperture for gfxhub/mmhubHuang Rui2017-06-061-16/+21
| | | | | | | Signed-off-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: abstract system domain enablement for gfxhub/mmhubHuang Rui2017-06-061-6/+16
| | | | | | | Signed-off-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: abstract cache initialization for gfxhub/mmhubHuang Rui2017-06-061-41/+31
| | | | | | | Signed-off-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: abstract TLB initialization for gfxhub/mmhubHuang Rui2017-06-061-29/+22
| | | | | | | Signed-off-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: abstract system aperture initialization for gfxhub/mmhubHuang Rui2017-06-061-26/+32
| | | | | | | Signed-off-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: abstract gart aperture initialization for gfxhub/mmhubHuang Rui2017-06-061-17/+20
| | | | | | | Signed-off-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: abstract gart table initialization for gfxhub/mmhubHuang Rui2017-06-061-13/+21
| | | | | | | Signed-off-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu/gmc9: set mc vm fb offset for ravenChunming Zhou2017-05-241-0/+5
| | | | | | | | | APU fb offset is set by sbios, which is different with DGPU. Signed-off-by: Chunming Zhou <David1.Zhou@amd.com> Reviewed-by: Ken Wang <Qingqing.Wang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: cleanup get_invalidate_req v2Christian König2017-04-061-21/+0
| | | | | | | | | | | The two hubs are just instances of the same hardware, so the register bits are identical. v2: keep the function pointer Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: fix vm size and block size for VMPT (v5)Zhang, Jerry2017-04-061-1/+1
| | | | | | | | | | | | | Set reasonable defaults per family. v2: set both of them in gmc v3: move vm size and block size in vm manager v4: squash in warning fix from Alex Xie v5: squash in min() warning fix Signed-off-by: Junwei Zhang <Jerry.Zhang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: cleanup VMHUB bit definitions v2Christian König2017-04-061-12/+0
| | | | | | | | | | | The two hubs are just instances of the same hardware, so the register bits are identical. v2: only remove get_vm_protection_bits for now Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: Fix 32bit x86 compilation warningAlex Xie2017-03-301-1/+1
| | | | | | | | | | | | | | | drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c:187:2: warning: right shift count >= width of type [enabled by default] drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c:173:2: warning: right shift count >= width of type [enabled by default] drivers/gpu/drm/amd/amdgpu/vega10_ih.c:106:3: warning: right shift count >= width of type [enabled by default] v2: Add a space between "&" and "0xff" Reported by: kbuild-all@01.org Signed-off-by: Alex Xie <AlexBin.Xie@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: Make max_pfn 64-bitFelix Kuehling2017-03-291-2/+3
| | | | | | | | | | | With 4-level page tables the maximum VM size is 256TB. That's 64G pages, which can't be represented in 32-bit. Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com> Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu:fix missing programing critical registersMonk Liu2017-03-291-0/+9
| | | | | | | | | those MC_VM registers won't be programed by VBIOS in VF so driver is responsible to programe them. Signed-off-by: Monk Liu <Monk.Liu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: set page table depth by num_levelChunming Zhou2017-03-291-1/+2
| | | | | | Signed-off-by: Chunming Zhou <David1.Zhou@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: Add GMC 9.0 support (v2)Alex Xie2017-03-291-0/+447
On SOC-15 parts, the GMC (Graphics Memory Controller) consists of two hubs: GFX (graphics and compute) and MM (sdma, uvd, vce). v2: drop sdma from Makefile, fix duplicate return statement. Signed-off-by: Alex Xie <AlexBin.Xie@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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