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path: root/drivers/gpio/gpio-omap.c
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* gpio/omap: (re)fix wakeups on level-triggered GPIOsKevin Hilman2012-05-181-3/+3
| | | | | | | | | | | | | | | | | commit 1b1287032 (gpio/omap: fix missing check in *_runtime_suspend()) broke wakeups on level-triggered GPIOs by adding the enabled non-wakeup GPIO check before the workaround that enables wakeups on level-triggered IRQs, effectively disabling that workaround. To fix, move the enabled non-wakeup GPIO check after the level-triggered IRQ workaround. Reported-by: Tony Lindgren <tony@atomide.com> Tested-by: Tony Lindgren <tony@atomide.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: Tarun Kanti DebBarma <tarun.kanti@ti.com> Tested-by: Tarun Kanti DebBarma <tarun.kanti@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
* gpio/omap: fix broken context restore for non-OFF mode transitionsKevin Hilman2012-05-181-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The fix in commit 1b1287032 (gpio/omap: fix missing check in *_runtime_suspend()) exposed another bug in the context restore path. Currently, the per-bank context restore happens whenever the context loss count is different in runtime suspend and runtime resume *and* whenever the per-bank contex_loss_count == 0: if (context_lost_cnt_after != bank->context_loss_count || !context_lost_cnt_after) { omap_gpio_restore_context(bank); Restoring context when the context_lost_cnt_after == 0 is clearly wrong, since this will be true until the first off-mode transition (which could be never, if off-mode is never enabled.) This check causes the context to be restored on *every* runtime PM transition. Before commit 1b1287032 (gpio/omap: fix missing check in *_runtime_suspend()), this code was never executed in non-OFF mode, so there were never spurious context restores happening. After that change though, spurious context restores could happen. To fix, simply remove the !context_lost_cnt_after check. It is not needed. This bug was found when noticing that the smc911x NIC on 3530/Overo was not working, and git bisect tracked it down to this patch. It seems that the spurious context restore was causing the smsc911x to not be properly probed on this platform. Tested-by: Tony Lindgren <tony@atomide.com> Acked-by: Tarun Kanti DebBarma <tarun.kanti@ti.com> Cc: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
* gpio/omap: fix missing check in *_runtime_suspend()Tarun Kanti DebBarma2012-05-111-5/+8
| | | | | | | | | | | | | | | | | | | | | We do checking for bank->enabled_non_wakeup_gpios in order to skip redundant operations. Somehow, the check got missed while doing the cleanup series. Just to make sure that we do context restore correctly in *_runtime_resume(), the bank->workaround_enabled check is moved after context restore. Otherwise, it would prevent context restore when bank->enabled_non_wakeup_gpios is 0. Cc: Kevin Hilman <khilman@ti.com> Cc: Tony Lindgren <tony@atomide.com> Cc: Santosh Shilimkar <santosh.shilimkar@ti.com> Cc: Cousson, Benoit <b-cousson@ti.com> Cc: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Tested-by: Govindraj.R <govindraj.raja@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
* gpio/omap: remove cpu_is_omapxxxx() checks from *_runtime_resume()Tarun Kanti DebBarma2012-05-111-2/+2
| | | | | | | | | | | | | | | | | Add register offsets for GPIO_IRQSTATUS_RAW_0, GPIO_IRQSTATUS_RAW_0 which are present on OMAP4+ processors. Now we can distinguish conditions applicable to OMAP4,5 and those specific to OMAP24xx and OMAP3xxx. Cc: Kevin Hilman <khilman@ti.com> Cc: Tony Lindgren <tony@atomide.com> Cc: Santosh Shilimkar <santosh.shilimkar@ti.com> Cc: Cousson, Benoit <b-cousson@ti.com> Cc: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Tested-by: Govindraj.R <govindraj.raja@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
* gpio/omap: remove suspend/resume callbacksTarun Kanti DebBarma2012-05-111-47/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | Both omap_gpio_suspend() and omap_gpio_resume() does programming of wakeup_en register. _gpio_rmw(base, bank->regs->wkup_en, 0xffffffff, 0); _gpio_rmw(base, bank->regs->wkup_en, bank->context.wake_en, 1); This is redundant in omap_gpio_suspend() because wakeup_en register automatically gets initialized in _set_gpio_wakeup() and set_gpio_trigger() while being called either from chip.irq_set_wake() or chip.irq_set_type(). This is also redundant in omap_gpio_resume() because wakeup_en register is programmed in omap_gpio_restore_context() called which is called from runtime resume callback. Cc: Kevin Hilman <khilman@ti.com> Cc: Tony Lindgren <tony@atomide.com> Cc: Santosh Shilimkar <santosh.shilimkar@ti.com> Cc: Cousson, Benoit <b-cousson@ti.com> Cc: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Tested-by: Govindraj.R <govindraj.raja@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
* gpio/omap: remove retrigger variable in gpio_irq_handlerTarun Kanti DebBarma2012-05-111-3/+0
| | | | | | | | | | | | | | | | | commit 672e302e3c (ARM: OMAP: use edge/level handlers from generic IRQ framework) removed retrigger support in favor of using generic IRQ framework. This patch cleans up some unused remnants of that removal. Cc: Kevin Hilman <khilman@ti.com> Cc: Tony Lindgren <tony@atomide.com> Cc: Santosh Shilimkar <santosh.shilimkar@ti.com> Cc: Cousson, Benoit <b-cousson@ti.com> Cc: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: Felipe Balbi <balbi@ti.com> Tested-by: Govindraj.R <govindraj.raja@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
* gpio/omap: remove saved_wakeup field from struct gpio_bankTarun Kanti DebBarma2012-05-111-9/+3
| | | | | | | | | | | | | | | | | There is no more need to have saved_wakeup because bank->context.wake_en already holds that value. So getting rid of read/write operation associated with this field. Cc: Kevin Hilman <khilman@ti.com> Cc: Tony Lindgren <tony@atomide.com> Cc: Santosh Shilimkar <santosh.shilimkar@ti.com> Cc: Cousson, Benoit <b-cousson@ti.com> Cc: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: Felipe Balbi <balbi@ti.com> Tested-by: Govindraj.R <govindraj.raja@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
* gpio/omap: remove suspend_wakeup field from struct gpio_bankTarun Kanti DebBarma2012-05-111-7/+6
| | | | | | | | | | | | | | | | | Since we already have bank->context.wake_en to keep track of gpios which are wakeup enabled, there is no need to have this field any more. Cc: Kevin Hilman <khilman@ti.com> Cc: Tony Lindgren <tony@atomide.com> Cc: Santosh Shilimkar <santosh.shilimkar@ti.com> Cc: Cousson, Benoit <b-cousson@ti.com> Cc: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: Felipe Balbi <balbi@ti.com> Tested-by: Govindraj.R <govindraj.raja@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
* gpio/omap: remove saved_fallingdetect, saved_risingdetectTarun Kanti DebBarma2012-05-111-11/+8
| | | | | | | | | | | | | | | | | Since we already have context.fallingdetect and context.risingdetect there is no more need to have these additional fields. Also, getting rid of extra reads associated with them. Cc: Kevin Hilman <khilman@ti.com> Cc: Tony Lindgren <tony@atomide.com> Cc: Santosh Shilimkar <santosh.shilimkar@ti.com> Cc: Cousson, Benoit <b-cousson@ti.com> Cc: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: Felipe Balbi <balbi@ti.com> Tested-by: Govindraj.R <govindraj.raja@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
* gpio/omap: fix incorrect initialization of omap_gpio_mod_initTarun Kanti DebBarma2012-05-101-6/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Initialization of irqenable, irqstatus registers is the common operation done in this function for all OMAP platforms, viz. OMAP1, OMAP2+. The latter _gpio_rmw()'s which supposedly got introduced wrongly to take care of OMAP2+ platforms were overwriting initially programmed OMAP1 value breaking functionality on OMAP1. Somehow incorrect assumption was made that each _gpio_rmw()'s were mutually exclusive. On close observation it is found that the first _gpio_rmw() which is supposedly done to take care of OMAP1 platform is generic enough and takes care of OMAP2+ platform as well. Therefore remove the latter _gpio_rmw() to irqenable as they are redundant now. Writing to ctrl and debounce_en registers for OMAP2+ platforms are modified to match the original(pre-cleanup) code where the registers are initialized with 0. In the cleanup series since we are using _gpio_rmw(reg, 0, 1), instead of __raw_writel(), we are just reading and writing the same values to ctrl and debounce_en. This is not an issue for debounce_en register because it has 0x0 as the default value. But in the case of ctrl register the default value is 0x2 (GATINGRATIO = 0x1) so that we end up writing 0x2 instead of intended 0 value. Therefore changing back to __raw_writel() as this is sufficient for this case besides simpler to understand. Also, change irqstatus initalization logic that avoids comparison with bool, besides making it fit in a single line. Cc: stable@vger.kernel.org Cc: Tony Lindgren <tony@atomide.com> Cc: Kevin Hilman <khilman@ti.com> Cc: Santosh Shilimkar <santosh.shilimkar@ti.com> Cc: Grant Likely <grant.likely@secretlab.ca> Reported-by: Janusz Krzysztofik <jkrzyszt@tis.icnet.pl> Tested-by: Janusz Krzysztofik <jkrzyszt@tis.icnet.pl> Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
* gpio/omap: fix redundant decoding of gpio offsetTarun Kanti DebBarma2012-03-211-11/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In gpio_get(), _get_gpio_datain() and _get_gpio_dataout() get rid of un-necessary operation to compute gpio mask. The gpio offset passed to gpio_get() is sufficient to do that. Here is Russell's original comment: Can someone explain to me this: static int _get_gpio_datain(struct gpio_bank *bank, int gpio) { void __iomem *reg = bank->base + bank->regs->datain; return (__raw_readl(reg) & GPIO_BIT(bank, gpio)) != 0; } static int gpio_get(struct gpio_chip *chip, unsigned offset) { struct gpio_bank *bank = container_of(chip, struct gpio_bank, chip); void __iomem *reg = bank->base; int gpio = chip->base + offset; u32 mask = GPIO_BIT(bank, gpio); if (gpio_is_input(bank, mask)) return _get_gpio_datain(bank, gpio); else return _get_gpio_dataout(bank, gpio); } Given that bank->width on OMAP is either 32 or 16, and GPIO numbers for any GPIO chip are always aligned to 32 or 16, why does this code bother adding the chips base gpio number and then modulo the width? Surely this means if - for argument sake - you registered a GPIO chip with 8 lines followed by one with 16 lines, GPIO0..7 would be chip 0 bit 0..7, GPIO8..15 would be chip 1 bit 8..15, GPIO16..23 would be chip 1 bit 0..7. However, if you registered a GPIO chip with 16 lines first, it would mean GPIO0..15 would be chip 0 bit 0..15, and GPIO16..31 would be chip 1 bit 0..15. Surely this kind of behaviour is not intended? Is there a reason why the bitmask can't just be (1 << offset) where offset is passed into these functions as GPIO number - chip->base ? Reported-by: Russell King - ARM Linux <linux@arm.linux.org.uk> Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
* gpio/omap: fix incorrect update to context.irqenable1Tarun Kanti DebBarma2012-03-211-2/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In _enable_gpio_irqbank() when bank->regs->set_irqenable is TRUE, gpio_mask can be directly set by writing to set_irqenable register without overwriting current value. In order to ensure the same is stored in context.irqenable1, we must avoid overwriting it with gpio_mask at the end of the function. Instead, update irqenable1 appropriately by OR'ing with gpio_mask. For the case where bank->regs->set_irqenable is FALSE, irqenable1 can be directly overwritten with 'l' which holds correct computed value. if (bank->regs->set_irqenable) { reg += bank->regs->set_irqenable; l = gpio_mask; } else { reg += bank->regs->irqenable; l = __raw_readl(reg); if (bank->regs->irqenable_inv) l &= ~gpio_mask; else l |= gpio_mask; } Make similar change for _disable_gpio_irqbank(). Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
* gpio/omap: fix incorrect context restore logic in omap_gpio_runtime_*Tarun Kanti DebBarma2012-03-201-4/+1
| | | | | | | | | | | | In omap_gpio_runtime_suspend/resume() the context save/restore should be independent of bank->enabled_non_wakeup_gpios. This was preventing context restore of GPIO lines which are not wakeup enabled. Reported-by: Govindraj Raja <govindraj.raja@ti.com> Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
* gpio/omap: fix missing dataout context save in _set_gpio_dataout_regTarun Kanti DebBarma2012-03-201-2/+5
| | | | | | | | | | | There are two functions, _set_gpio_dataout_reg() and _set_gpio_dataout_mask() which writes to dataout register and the dataout context must be saved. It is missing in the first function, _set_gpio_dataout_reg(). Fix this. Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
* gpio/omap: fix _set_gpio_irqenable implementationTarun Kanti DebBarma2012-03-201-1/+4
| | | | | | | | | | | | | This function should be capable of both enabling and disabling interrupts based upon the *enable* parameter. Right now the function only enables the interrupt and *enable* is not used at all. So add the interrupt disable capability also using the parameter. Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: Felipe Balbi <balbi@ti.com> Reviewed-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
* gpio/omap: fix trigger type to unsignedTarun Kanti DebBarma2012-03-201-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | The GPIO trigger parameter is of type unsigned. enum { IRQ_TYPE_NONE = 0x00000000, IRQ_TYPE_EDGE_RISING = 0x00000001, IRQ_TYPE_EDGE_FALLING = 0x00000002, IRQ_TYPE_EDGE_BOTH = (IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING), IRQ_TYPE_LEVEL_HIGH = 0x00000004, IRQ_TYPE_LEVEL_LOW = 0x00000008, IRQ_TYPE_LEVEL_MASK = (IRQ_TYPE_LEVEL_LOW | IRQ_TYPE_LEVEL_HIGH), IRQ_TYPE_SENSE_MASK = 0x0000000f, IRQ_TYPE_PROBE = 0x00000010, ... }; Even though gpio_irq_type(struct irq_data *d, unsigned type) has the right type of parameter, the subsequent called functions set_gpio_triggering() and set_gpio_trigger() wrongly makes it signed integer. Fix this. Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: Felipe Balbi <balbi@ti.com> Reviewed-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
* gpio/omap: fix wakeup_en register update in _set_gpio_wakeup()Tarun Kanti DebBarma2012-03-201-0/+1
| | | | | | | | | | | | | | There are two ways through which wakeup_en register can be programmed using gpiolib APIs as shown below. It is seen that in the second case in _set_gpio_wakeup(), even though bank->suspend_wakeup is updated correctly, its value is not programmed in wakeup_en register. Fix this. irq_set_type()->gpio_irq_type()->_set_gpio_triggering()->set_gpio_trigger() irq_set_wake()->gpio_wake_enable()->_set_gpio_wakeup() Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com> Reviewed-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
* gpio/omap: Fix section warning for omap_mpuio_alloc_gc()Tony Lindgren2012-03-121-1/+1
| | | | | | | | | | | | | | | | Make omap_mpuio_alloc_gc() __devinit as omap_gpio_chip_init() is __devinit. Otherwise we get: WARNING: vmlinux.o(.devinit.text+0xa10): Section mismatch in reference from the function omap_gpio_chip_init() to the function .init.text:omap_mpuio_alloc_gc() The function __devinit omap_gpio_chip_init() references a function __init omap_mpuio_alloc_gc(). If omap_mpuio_alloc_gc is only used by omap_gpio_chip_init then annotate omap_mpuio_alloc_gc with a matching annotation. Signed-off-by: Tony Lindgren <tony@atomide.com> Acked-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
* gpio/omap: fix wakeups on level-triggered GPIOsKevin Hilman2012-03-121-0/+34
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | While both level- and edge-triggered GPIOs are capable of generating interrupts, only edge-triggered GPIOs are capable of generating a module-level wakeup to the PRCM (c.f. 34xx NDA TRM section 25.5.3.2.) In order to ensure that devices using level-triggered GPIOs as interrupts can also cause wakeups (e.g. from idle), this patch enables edge-triggering for wakeup-enabled, level-triggered GPIOs when a GPIO bank is runtime-suspended (which also happens during idle.) This fixes a problem found in GPMC-connected network cards with GPIO interrupts (e.g. smsc911x on Zoom3, Overo, ...) where network booting with NFSroot was very slow since the GPIO IRQs used by the NIC were not generating PRCM wakeups, and thus not waking the system from idle. NOTE: until v3.3, this boot-time problem was somewhat masked because the UART init prevented WFI during boot until the full serial driver was available. Preventing WFI allowed regular GPIO interrupts to fire and this problem was not seen. After the UART runtime PM cleanups, we no longer avoid WFI during boot, so GPIO IRQs that were not causing wakeups resulted in very slow IRQ response times. Tested on platforms using level-triggered GPIOs for network IRQs using the SMSC911x NIC: 3530/Overo and 3630/Zoom3. Reported-by: Tony Lindgren <tony@atomide.com> Tested-by: Tarun Kanti DebBarma <tarun.kanti@ti.com> Tested-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
* gpio/omap: Fix IRQ handling for SPARSE_IRQBenoit Cousson2012-03-051-16/+17
| | | | | | | | | | | | | The driver is still relying on internal OMAP IRQ defines that are not relevant anymore if OMAP is built with SPARSE_IRQ. Replace the defines with the proper IRQ base number. Clean some comment style issue. Remove some hidden and ugly cpu_class_is_omap1() inside the gpio header. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Tested-by: Tarun Kanti DebBarma <tarun.kanti@ti.com>
* gpio/omap: Add DT support to GPIO driverBenoit Cousson2012-03-051-9/+112
| | | | | | | | | | | | | | | Adapt the GPIO driver to retrieve information from a DT file. Allocate the irq_base dynamically and rename bank->virtual_irq_start to bank->irq_base. Change irq_base type to int instead of u16 to match irq_alloc_descs output. Add documentation for GPIO properties specific to OMAP. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Cc: Tarun Kanti DebBarma <tarun.kanti@ti.com> Acked-by: Rob Herring <rob.herring@calxeda.com>
* gpio/omap: Use devm_ API and add request_mem_regionBenoit Cousson2012-03-051-20/+15
| | | | | | | | | | | Replace the regular kzalloc and ioremap with the devm_ equivalent to simplify error handling. Add the missing devm_request_mem_region to reserve the region used by the driver. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Cc: Tarun Kanti DebBarma <tarun.kanti@ti.com>
* gpio/omap: Remove bank->id information and misc cleanupBenoit Cousson2012-03-051-14/+9
| | | | | | | | | | | | The driver does not need anymore any id to identify the GPIO instance. Remove every occurence of the bank->id inside the driver. Remove two trailing spaces. Add a dev variable for better readability in probe. Remove unused variable bank->pbase. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Acked-by: Tarun Kanti DebBarma <tarun.kanti@ti.com>
* gpio/omap: handle set_dataout reg capable IP on restoreNishanth Menon2012-02-061-1/+6
| | | | | | | | | | | | | GPIO IP revisions such as those used in OMAP4 have a set_dataout while the previous revisions used a single dataout register. Depending on what is available restore the dataout settings to the right register. Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
* gpio/omap: restore OE only after setting the output levelNishanth Menon2012-02-061-1/+2
| | | | | | | | | | | | | Setup the dataout register before restoring OE. This is to make sure that we have valid data in dataout register which would be made available in output pins as soon as OE is enabled. Else, there is risk of unknown data getting out into gpio pins. Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
* gpio/omap: enable irq at the end of all configuration in restoreNishanth Menon2012-02-061-4/+5
| | | | | | | | | | | | Setup the interrupt enable registers only after we have configured the required edge and required configurations, not before, to prevent spurious events as part of restore routine. Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
* gpio/omap: save and restore debounce registersNishanth Menon2012-02-061-0/+12
| | | | | | | | | | | | | GPIO debounce registers need to be saved and restored for proper functioning of driver. Signed-off-by: Nishanth Menon <nm@ti.com> tarun.kanti@ti.com: Debounce context save is moved to _set_gpio_debounce() as part of dynamic context save to remove overhead. Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
* gpio/omap: remove omap_gpio_save_context overheadTarun Kanti DebBarma2012-02-061-28/+28
| | | | | | | | | | | Context is now saved dynamically in respective functions whenever and whichever registers are modified. This avoid overhead of saving all registers context in the runtime suspend callback. Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
* gpio/omap: fix incorrect access of debounce moduleTarun Kanti DebBarma2012-02-061-5/+13
| | | | | | | | | | | | | | | | | Enable debounce clock before writing/reading debounce registers. Disable the clock at the end so that it is synchronized with the pm_runtime_get/put_sync calls. Enable debounce clock per module. This call is mandatory because in omap_gpio_request() when *_runtime_get_sync() is called, _gpio_dbck_enable() within runtime callbck fails to turn on dbck because dbck_enable_mask used within _gpio_dbck_enable() is still not initialized at that point. Therefore we have to enable dbck here. Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
* gpio/omap: fix debounce clock handlingTarun Kanti DebBarma2012-02-061-10/+19
| | | | | | | | | | | | | The dbck_enable_mask indicates which all GPIOs within a bank have debounce enabled and dbck is enabled/disabled based upon this. But there is no mechanism to track the dbck state. In order to manage the dbck state we need additional flag and logic so that turning off/on dbck is synchronized with pm_runtime_put/get_sync calls. Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
* gpio/omap: cleanup prepare_for_idle and resume_after_idleTarun Kanti DebBarma2012-02-061-98/+147
| | | | | | | | | | | | | | | | | | | | | | | Since *_prepare_for_idle() and *_resume_after_idle() are called with interrupts disabled they should be kept as simple as possible. So, moving most of the stuff to *_runtime_suspend/resume() callbacks. To avoid invalid context restore happening in *_runtime_resume() callback as a result of *_get_sync() call in *_gpio_probe(), update bank->context_loss_count. This would make context restore condition check false in the callback and skip restore until further initialization take place. The workaround_enabled static variable is now a member of struct gpio_bank. Unlike most GPIO registers the OE has 0xffffffff as the default value. To make sure invalid context is not restored, updating the OE context with default value. Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com> Signed-off-by: Charulatha V <charu@ti.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
* gpio/omap: optimize suspend and resume functionsTarun Kanti DebBarma2012-02-061-25/+29
| | | | | | | | | | There is no need to operate on all the banks every time the function is called. Just operate on the current bank passed by the framework. Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
* gpio/omap: use pm-runtime frameworkTarun Kanti DebBarma2012-02-061-24/+44
| | | | | | | | | | | | | | | Call runtime pm APIs pm_runtime_get_sync() and pm_runtime_put() for enabling/disabling clocks appropriately. Remove syscore_ops and instead use SET_RUNTIME_PM_OPS macro. There is no more need to call omap_device_disable_idle_on_suspend since driver is PM runtime adapted now. Signed-off-by: Charulatha V <charu@ti.com> Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
* gpio/omap: remove bank->method & METHOD_* macrosCharulatha V2012-02-061-32/+6
| | | | | | | | | | | | | | | | | | | The only bank->type (method) used in the OMAP GPIO driver is MPUIO type as they need to be handled separately. Identify the same using a flag and remove all METHOD_* macros. mpuio_init() function is defined under #ifdefs. It is required only in case of MPUIO bank type and only when PM operations are supported by it. This is applicable only in case of OMAP16xx SoC's MPUIO GPIO bank type. For all the other cases it is a dummy function. Hence clean up the same and remove all the OMAP SoC specific #ifdefs. Signed-off-by: Charulatha V <charu@ti.com> Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Reviewed-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
* gpio/omap: remove unnecessary bit-masking for read accessTarun Kanti DebBarma2012-02-061-3/+0
| | | | | | | | | | | | Remove un-necessary bit masking. Since the register are 4 byte aligned and readl would work as is. The 'enabled' mask is already taking care to mask for bank width. Signed-off-by: Charulatha V <charu@ti.com> Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
* gpio/omap: use pinctrl offset instead of macroCharulatha V2012-02-061-5/+3
| | | | | | | | | | Use regs->pinctrl field instead of using the macro OMAP1510_GPIO_PIN_CONTROL Signed-off-by: Charulatha V <charu@ti.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Reviewed-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
* gpio/omap: cleanup omap_gpio_mod_init functionTarun Kanti DebBarma2012-02-061-54/+23
| | | | | | | | | | | | | | With register offsets now defined for respective OMAP versions we can get rid of cpu_class_* checks. This function now has common initialization code for all OMAP versions. Initialization specific to OMAP16xx has been moved within omap16xx_gpio_init(). Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com> Signed-off-by: Charulatha V <charu@ti.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Reviewed-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
* gpio/omap: cleanup set_gpio_triggering functionTarun Kanti DebBarma2012-02-061-114/+43
| | | | | | | | | | | | | | | Getting rid of ifdefs within the function by adding register offset intctrl and associating OMAPXXXX_GPIO_INT_CONTROL in respective SoC specific files. Also, use wkup_status register consistently instead of referring to wakeup clear and wakeup set register offsets. Get rid of cpu_is_xxxx checks in set_gpio_trigger() using irqctrl. Signed-off-by: Charulatha V <charu@ti.com> Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Reviewed-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
* gpio/omap: remove hardcoded offsets in context save/restoreTarun Kanti DebBarma2012-02-061-22/+20
| | | | | | | | | | | | | It is not required to use hard-coded offsets any more in context save and restore functions and instead use the generic offsets which have been correctly initialized during device registration. Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com> Signed-off-by: Charulatha V <charu@ti.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Reviewed-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
* gpio/omap: use level/edge detect reg offsetsTarun Kanti DebBarma2012-02-061-82/+32
| | | | | | | | | | | | | By adding level and edge detection register offsets and then initializing them correctly according to OMAP versions during device registrations we can now remove lot of revision checks in these functions. Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com> Signed-off-by: Charulatha V <charu@ti.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Reviewed-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
* gpio/omap: further cleanup using wkup_en registerTarun Kanti DebBarma2012-02-061-89/+21
| | | | | | | | | | | | | | | Wakeup enable register offset initialized according to OMAP versions during device registration. Use this to avoid version checks. Starting with OMAP4, legacy registers should not be used in combination with the updated regsiters. Use wkup_en register consistently for all SoCs wherever applicable. Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com> Signed-off-by: Charulatha V <charu@ti.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Reviewed-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
* gpio/omap: avoid cpu checks during module ena/disableCharulatha V2012-02-061-30/+23
| | | | | | | | | | | Remove cpu-is checks while enabling/disabling OMAP GPIO module during a gpio request/free. Signed-off-by: Charulatha V <charu@ti.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Reviewed-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
* gpio/omap: make non-wakeup GPIO part of pdataCharulatha V2012-02-061-7/+1
| | | | | | | | | | | Non-wakeup GPIOs are available only in OMAP2. Avoid cpu_is checks by making non_wakeup_gpios as part of pdata. Signed-off-by: Charulatha V <charu@ti.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Reviewed-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
* gpio/omap: handle save/restore context in GPIO driverTarun Kanti DebBarma2012-02-061-73/+58
| | | | | | | | | | | | | | | | Modify omap_gpio_prepare_for_idle() & omap_gpio_resume_after_idle() functions to handle save context & restore context respectively in the OMAP GPIO driver itself instead of calling these functions from pm specific files. For this, in gpio_prepare_for_idle(), call *_get_context_loss_count() and in gpio_resume_after_idle() call it again. If the count is different, do restore context. Signed-off-by: Charulatha V <charu@ti.com> Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Reviewed-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
* gpio/omap: make gpio_context part of gpio_bank structureCharulatha V2012-02-061-42/+34
| | | | | | | | | | | Currently gpio_context array used to save gpio bank's context, is used only for OMAP3 architecture. Move gpio_context as part of gpio_bank structure so that it can be specific to each gpio bank and can be used for any OMAP architecture Signed-off-by: Charulatha V <charu@ti.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
* gpio/omap: use flag to identify wakeup domainCharulatha V2012-02-061-7/+6
| | | | | | | | | | | | | | | | | In omap3, save/restore context is implemented for GPIO banks 2-6 as GPIO bank1 is in wakeup domain. Instead of identifying bank's power domain by bank id, use 'loses_context' flag which is filled by pwrdm_can_ever_lose_context() during dev_init. For getting the powerdomain pointer, omap_hwmod_get_pwrdm() is used. omap_device_get_pwrdm() could not be used as the pwrdm information needs to be filled in pdata, whereas omap_device_get_pwrdm() could be used only after omap_device_build() call. Signed-off-by: Charulatha V <charu@ti.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
* gpio/omap: remove dependency on gpio_bank_countCharulatha V2012-02-061-83/+80
| | | | | | | | | | | | The gpio_bank_count is the count of number of GPIO devices in a SoC. Remove this dependency from the driver by using list. Also remove the dependency on array of pointers to gpio_bank struct of all GPIO devices. Signed-off-by: Charulatha V <charu@ti.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Reviewed-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
* Merge branch 'gpio/merge' of git://git.secretlab.ca/git/linux-2.6Linus Torvalds2011-11-151-25/+34
|\ | | | | | | | | | | | | | | * 'gpio/merge' of git://git.secretlab.ca/git/linux-2.6: gpio: pca953x: propagate the errno from the chip_init functions gpio: pca953x: remove unneeded check for chip type gpio/omap: check return value from irq_alloc_generic_chip gpio/omap: replace MOD_REG_BIT macro with static inline
| * gpio/omap: check return value from irq_alloc_generic_chipTodd Poynor2011-08-231-0/+5
| | | | | | | | | | | | | | | | Ensure return value of irq_alloc_generic_chip() is checked before continuing on to use it. Signed-off-by: Todd Poynor <toddpoynor@google.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
| * gpio/omap: replace MOD_REG_BIT macro with static inlineKevin Hilman2011-08-231-25/+29
| | | | | | | | | | | | | | | | | | This macro is ugly and confusing, especially since it passes in most arguments, but uses an implied 'base' from the caller. Replace it with an equivalent static inline. Signed-off-by: Kevin Hilman <khilman@ti.com>
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