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path: root/drivers/gpio/gpio-msic.c
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* gpio: remove use of __devinitBill Pemberton2012-11-281-1/+1
| | | | | | | | | | | | | | CONFIG_HOTPLUG is going away as an option so __devinit is no longer needed. Signed-off-by: Bill Pemberton <wfp5p@virginia.edu> Cc: Grant Likely <grant.likely@secretlab.ca> Cc: Peter Tyser <ptyser@xes-inc.com> Cc: Santosh Shilimkar <santosh.shilimkar@ti.com> Cc: Kevin Hilman <khilman@ti.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* gpio: msic: Fix calculating register address in msic_gpio_to_oreg()Axel Lin2012-08-051-1/+1
| | | | | | | | | | | | | | | In the case offset is 20 ... 23, the equation to get the register should be: INTEL_MSIC_GPIO1HV0CTLO - offset + 20 With above equation, we can get below mapping between offset and the register: offset is 20: INTEL_MSIC_GPIO1HV0CTLO offset is 21: INTEL_MSIC_GPIO1HV1CTLO offset is 22: INTEL_MSIC_GPIO1HV2CTLO offset is 23: INTEL_MSIC_GPIO1HV3CTLO Signed-off-by: Axel Lin <axel.lin@gmail.com> Acked-by: Mathias Nyman <mathias.nyman@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* gpio: add MSIC gpio driverMathias Nyman2012-05-111-0/+339
Add gpio support for Intel MSIC chips found in Intel Medfield platforms. MSIC supports totally 24 GPIOs with 16 low voltage and 8 high voltage pins. Driver uses MSIC mfd interface for MSIC access. (Updated comment to indicate why locking is actually safe) Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com> Signed-off-by: Alan Cox <alan@linux.intel.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
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