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path: root/drivers/gpio/gpio-davinci.c
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* gpio: davinci: fix gpio selection for OFAlexander Holler2014-03-111-0/+24
| | | | | | | | | | | | | | | | | The driver missed an of_xlate function to translate gpio numbers as found in the DT to the correct chip and number. While there I've set #gpio_cells to a fixed value of 2. I've used gpio-pxa.c as template for those changes and tested my changes successfully on a da850 board using entries for gpio-leds in a DT. So I didn't reinvent the wheel but just copied and tested stuff. Thanks to Grygorii Strashko for the hint to the existing code in gpio-pxa. Signed-off-by: Alexander Holler <holler@ahsoftware.de> Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* gpio: davinci: reuse for keystone socGrygorii Strashko2014-03-041-8/+40
| | | | | | | | | | | | | | | | The similar GPIO HW block is used by keystone SoCs as in Davinci SoCs. Hence, reuse Davinci GPIO driver for Keystone taking into account that Keystone contains ARM GIC IRQ controller which is implemented using IRQ Chip. Documentation: http://www.ti.com/lit/ug/sprugv1/sprugv1.pdf Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* gpio: davinci: Use signed type for 'irq' variableAlexander Shiyan2014-02-241-1/+2
| | | | | | | | | Variable 'irq' is declared as unsigned and then used to store negative return values from irq_alloc_descs() such as -EINVAL. This patch fix this by declaring the variable as a signed. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* gpio: davinci: don't create irq_domain in case of unbanked irqsGrygorii Strashko2013-12-261-15/+19
| | | | | | | | | | | | | | | | | | | | The system may crash if: - there are more than 1 banks - unbanked irqs are enabled - someone will call gpio_to_irq() for GPIO from bank2 or above Hence, fix it by not creating irq_domain if unbanked irqs are enabled and correct gpio_to_irq_banked() to handle this properly. Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Alexandre Courbot <gnurou@gmail.com> Cc: Sekhar Nori <nsekhar@ti.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Lad, Prabhakar <prabhakar.csengg@gmail.com> Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com>
* gpio: davinci: use chained_irq_enter/chained_irq_exit APIGrygorii Strashko2013-12-261-3/+3
| | | | | | | | | | | | | | | | | | It's unsafe to call IRQ chip callbacks (.irq_mask/irq_unmask/irq_ack) from chained IRQ handler directly. Because, Davinci GPIO block is used by different SoCs, which, in turn, have different Main IRQ controllers (Davinci - aintc, cp-intc; Keystone - arm-gic) which may introduce diffrent set of IRQ chip callbacks. As result, call of gpio_irq_handler() on Keysone will simply cause crash the system, because ARM-GIC implements .irq_eoi() instead of .irq_ack(). Hence, fix it by using Kernel chained_irq_enter/chained_irq_exit APIs as they are intended to handle exact such cases. Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com>
* gpio: davinci: add OF supportKV Sujith2013-12-261-3/+54
| | | | | | | | | | | | | | | | This patch adds OF parser support for davinci gpio driver and also appropriate documentation in gpio-davinci.txt located at Documentation/devicetree/bindings/gpio/. Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Rob Herring <rob.herring@calxeda.com> Signed-off-by: KV Sujith <sujithkv@ti.com> Signed-off-by: Philip Avinash <avinashphilip@ti.com> [prabhakar.csengg@gmail.com: simplified the OF code, removed unnecessary DT property and also simplified the commit message] Signed-off-by: Lad, Prabhakar <prabhakar.csengg@gmail.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com>
* gpio: davinci: convert to use irqdomain support.Lad, Prabhakar2013-12-261-33/+47
| | | | | | | | | | | | | | Convert the davinci gpio driver to use irqdomain support. Signed-off-by: Lad, Prabhakar <prabhakar.csengg@gmail.com> [grygorii.strashko@ti.com: - switch to use one irq-domain per all GPIO banks - keep irq_create_mapping() call in gpio_to_irq_banked() as it simply transformed to irq_find_mapping() if IRQ mapping exist already] Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Sekhar Nori <nsekhar@ti.com>
* gpio: davinci: get rid of DAVINCI_N_GPIOGrygorii Strashko2013-12-261-2/+2
| | | | | | | | | | | | | | | | | | | Since Davinci GPIO driver is moved to support gpiolib it has to use ARCH_NR_GPIOS (can be configured using CONFIG_ARCH_NR_GPIO Kconfig option) configuration instead of any mach/platform specific options. Hence, replace private DAVINCI_N_GPIO with common ARCH_NR_GPIOS. This is safe because default value for ARCH_NR_GPIOS=256 and maximum number of supported GPIOs for Davinci is DAVINCI_N_GPIO=144. More over, this is one of steps to re-use Davinci GPIO driver by other mach/platform. Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Acked-by: Lad, Prabhakar <prabhakar.csengg@gmail.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com>
* gpio: davinci: use {readl|writel}_relaxed() instead of __raw_*Lad, Prabhakar2013-12-261-18/+18
| | | | | | | | | | | This patch replaces the __raw_readl/writel with {readl|writel}_relaxed(), Altough the code runs on ARMv5 based SOCs, changing this will help using code for other use cases (like with big-endian machines). Signed-off-by: Lad, Prabhakar <prabhakar.csengg@gmail.com> Acked-by: Linus Walleij <linus.walleij@xxxxxxxxxx> Signed-off-by: Sekhar Nori <nsekhar@ti.com>
* gpio: davinci: fix check for unbanked gpioLad, Prabhakar2013-11-211-1/+3
| | | | | | | | | | | | | | | This patch fixes a check for offset in gpio_to_irq_unbanked() and also assigns gpio_irq, gpio_unbanked of chips[0] to appropriate values which is used in gpio_to_irq_unbanked() function. Without this patch, unbanked IRQ handling is broken. Reported-by: Grygorii Strashko <grygorii.strashko@ti.com> Acked-by: Grygorii Strashko <grygorii.strashko@ti.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Lad, Prabhakar <prabhakar.csengg@gmail.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com>
* gpio: davinci: move to platform deviceKV Sujith2013-09-241-38/+81
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Modify DaVinci GPIO driver to become a platform device driver. The driver does not have platform driver structure or a probe. Instead, it has pure_initcall function for initialization. The platform specific informaiton is obtained using the DaVinci specific davinci_soc_info structure. This is a problem for Device Tree (DT) implementation. As a first stage of DT conversion, we implement a probe. Additional notes: - The driver registration happens as postcore_initcall. This is required since machine init functions like da850_lcd_hw_init() make use of GPIO. - Start using devres APIs for simpler error handling. Signed-off-by: KV Sujith <sujithkv@ti.com> [avinashphilip@ti.com: Move global definition of "davinci_gpio_controller" to local] Signed-off-by: Philip Avinash <avinashphilip@ti.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> [nsekhar@ti.com: drop unused structure member, rebase to new clean-up patch and fix error messages] Signed-off-by: Sekhar Nori <nsekhar@ti.com> Signed-off-by: Lad, Prabhakar <prabhakar.csengg@gmail.com>
* gpio: davinci: coding style correctionPhilip Avinash2013-09-241-4/+9
| | | | | | | | | | | | | | Make some minor coding style fixes. Use proper multi-line commenting style, and use a macro for register offset. Signed-off-by: Philip Avinash <avinashphilip@ti.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Lad, Prabhakar <prabhakar.csengg@gmail.com> [nsekhar@ti.com: drop changes which are considered unnecessary churn - line break fixes variable name changes and include file reordering] Signed-off-by: Sekhar Nori <nsekhar@ti.com>
* gpio: davinci: preparation for switch to common clock frameworkMurali Karicheri2012-09-011-1/+1
| | | | | | | | | | | | | | As a first step towards migrating davinci platforms to use common clock framework, replace all instances of clk_enable() with clk_prepare_enable() and clk_disable() with clk_disable_unprepare(). Until the platform is switched to use the CONFIG_HAVE_CLK_PREPARE Kconfig variable, this just adds a might_sleep() call and would work without any issues. This will make it easy later to switch to common clk based implementation of clk driver from DaVinci specific driver. Signed-off-by: Murali Karicheri <m-karicheri2@ti.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* gpio/davinci: fix enabling unbanked GPIO IRQsSekhar Nori2012-03-121-5/+6
| | | | | | | | | | | | | | | | | | Unbanked GPIO IRQ handling code made a copy of just the irq_chip structure for GPIO IRQ lines which caused problems after the generic IRQ chip conversion because there was no valid irq_chip_type structure with the right "regs" populated. irq_gc_mask_set_bit() was therefore accessing random addresses. Fix it by making a copy of irq_chip_type structure instead. This will ensure sane register offsets. Cc: <stable@vger.kernel.org> # v3.0.x+ Reported-by: Jon Povey <Jon.Povey@racelogic.co.uk> Tested-by: Jon Povey <Jon.Povey@racelogic.co.uk> Signed-off-by: Sekhar Nori <nsekhar@ti.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
* gpio/davinci: fix oops on unbanked gpio irq requestSekhar Nori2012-03-121-5/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Unbanked GPIO irq setup code was overwriting chip_data leading to the following oops on request_irq() Unable to handle kernel paging request at virtual address febfffff pgd = c22dc000 [febfffff] *pgd=00000000 Internal error: Oops: 801 [#1] PREEMPT Modules linked in: mcu(+) edmak irqk cmemk CPU: 0 Not tainted (3.0.0-rc7+ #93) PC is at irq_gc_mask_set_bit+0x68/0x7c LR is at vprintk+0x22c/0x484 pc : [<c0080c0c>] lr : [<c00457e0>] psr: 60000093 sp : c33e3ba0 ip : c33e3af0 fp : c33e3bc4 r10: c04555bc r9 : c33d4340 r8 : 60000013 r7 : 0000002d r6 : c04555bc r5 : fec67010 r4 : 00000000 r3 : c04734c8 r2 : fec00000 r1 : ffffffff r0 : 00000026 Flags: nZCv IRQs off FIQs on Mode SVC_32 ISA ARM Segment user Control: 0005317f Table: 822dc000 DAC: 00000015 Process modprobe (pid: 526, stack limit = 0xc33e2270) Stack: (0xc33e3ba0 to 0xc33e4000) 3ba0: 00000000 c007d3d4 c33e3bcc c04555bc c04555bc c33d4340 c33e3bdc c33e3bc8 3bc0: c007f5f8 c0080bb4 00000000 c04555bc c33e3bf4 c33e3be0 c007f654 c007f5c0 3be0: 00000000 c04555bc c33e3c24 c33e3bf8 c007e6e8 c007f618 c01f2284 c0350af8 3c00: c0405214 bf016c98 00000001 00000000 c33dc008 0000002d c33e3c54 c33e3c28 3c20: c007e888 c007e408 00000001 c23ef880 c33dc000 00000000 c33dc080 c25caa00 3c40: c0487498 bf017078 c33e3c94 c33e3c58 bf016b44 c007e7d4 bf017078 c33dc008 3c60: c25caa08 c33dc008 c33e3c84 bf017484 c25caa00 c25caa00 c01f5f48 c25caa08 3c80: c0496d60 bf017484 c33e3ca4 c33e3c98 c022a698 bf01692c c33e3cd4 c33e3ca8 3ca0: c01f5d88 c022a688 00000000 bf017484 c25caa00 c25caa00 c01f5f48 c25caa08 3cc0: c0496d60 00000000 c33e3cec c33e3cd8 c01f5f8c c01f5d10 00000000 c33e3cf0 3ce0: c33e3d14 c33e3cf0 c01f5210 c01f5f58 c303cb48 c25ecf94 c25caa00 c25caa00 3d00: c25caa34 c33e3dd8 c33e3d34 c33e3d18 c01f6044 c01f51b8 c0496d3c c25caa00 3d20: c044e918 c33e3dd8 c33e3d44 c33e3d38 c01f4ff4 c01f5fcc c33e3d94 c33e3d48 3d40: c01f3d10 c01f4fd8 00000000 c044e918 00000000 00000000 c01f52c0 c034d570 3d60: c33e3d84 c33e3d70 c022bf84 c25caa00 00000000 c044e918 c33e3dd8 c25c2e00 3d80: c0496d60 bf01763c c33e3db4 c33e3d98 c022b1a0 c01f384c c25caa00 c33e3dd8 3da0: 00000000 c33e3dd8 c33e3dd4 c33e3db8 c022b27c c022b0e8 00000000 bf01763c 3dc0: c0451c80 c33e3dd8 c33e3e34 c33e3dd8 bf016f60 c022b210 5f75636d 746e6f63 3de0: 006c6f72 00000000 00000000 00000000 00000000 00000000 00000000 bf0174bc 3e00: 00000000 00989680 00000000 00000020 c0451c80 c0451c80 bf0174dc c01f5eb0 3e20: c33f0f00 bf0174dc c33e3e44 c33e3e38 c01f72f4 bf016e2c c33e3e74 c33e3e48 3e40: c01f5d88 c01f72e4 00000000 c0451c80 c0451cb4 bf0174dc c01f5eb0 c33f0f00 3e60: c0473100 00000000 c33e3e94 c33e3e78 c01f5f44 c01f5d10 00000000 c33e3e98 3e80: bf0174dc c01f5eb0 c33e3ebc c33e3e98 c01f5534 c01f5ec0 c303c038 c3061c30 3ea0: 00003cd8 00098258 bf0174dc c0462ac8 c33e3ecc c33e3ec0 c01f5bec c01f54dc 3ec0: c33e3efc c33e3ed0 c01f4d30 c01f5bdc bf0173a0 c33e2000 00003cd8 00098258 3ee0: bf0174dc c33e2000 c00301a4 bf019000 c33e3f1c c33e3f00 c01f6588 c01f4c8c 3f00: 00003cd8 00098258 00000000 c33e2000 c33e3f2c c33e3f20 c01f777c c01f6524 3f20: c33e3f3c c33e3f30 bf019014 c01f7740 c33e3f7c c33e3f40 c002f3ec bf019010 3f40: 00000000 00003cd8 00098258 bf017518 00000000 00003cd8 00098258 bf017518 3f60: 00000000 c00301a4 c33e2000 00000000 c33e3fa4 c33e3f80 c007b934 c002f3c4 3f80: c00b307c c00b2f48 00003cd8 00000000 00000003 00000080 00000000 c33e3fa8 3fa0: c0030020 c007b8b8 00003cd8 00000000 00098288 00003cd8 00098258 00098240 3fc0: 00003cd8 00000000 00000003 00000080 00098008 00098028 00098288 00000001 3fe0: be892998 be892988 00013d7c 40178740 60000010 00098288 09089041 00200845 Backtrace: [<c0080ba4>] (irq_gc_mask_set_bit+0x0/0x7c) from [<c007f5f8>] (irq_enable+0x48/0x58) r6:c33d4340 r5:c04555bc r4:c04555bc [<c007f5b0>] (irq_enable+0x0/0x58) from [<c007f654>] (irq_startup+0x4c/0x54) r5:c04555bc r4:00000000 [<c007f608>] (irq_startup+0x0/0x54) from [<c007e6e8>] (__setup_irq+0x2f0/0x3cc) r5:c04555bc r4:00000000 [<c007e3f8>] (__setup_irq+0x0/0x3cc) from [<c007e888>] (request_threaded_irq+0xc4/0x110) r8:0000002d r7:c33dc008 r6:00000000 r5:00000001 r4:bf016c98 [<c007e7c4>] (request_threaded_irq+0x0/0x110) from [<bf016b44>] (mcu_spi_probe+0x228/0x37c [mcu]) [<bf01691c>] (mcu_spi_probe+0x0/0x37c [mcu]) from [<c022a698>] (spi_drv_probe+0x20/0x24) [<c022a678>] (spi_drv_probe+0x0/0x24) from [<c01f5d88>] (driver_probe_device+0x88/0x1b0) [<c01f5d00>] (driver_probe_device+0x0/0x1b0) from [<c01f5f8c>] (__device_attach+0x44/0x48) [<c01f5f48>] (__device_attach+0x0/0x48) from [<c01f5210>] (bus_for_each_drv+0x68/0x94) r5:c33e3cf0 r4:00000000 [<c01f51a8>] (bus_for_each_drv+0x0/0x94) from [<c01f6044>] (device_attach+0x88/0xa0) r7:c33e3dd8 r6:c25caa34 r5:c25caa00 r4:c25caa00 [<c01f5fbc>] (device_attach+0x0/0xa0) from [<c01f4ff4>] (bus_probe_device+0x2c/0x4c) r7:c33e3dd8 r6:c044e918 r5:c25caa00 r4:c0496d3c [<c01f4fc8>] (bus_probe_device+0x0/0x4c) from [<c01f3d10>] (device_add+0x4d4/0x648) [<c01f383c>] (device_add+0x0/0x648) from [<c022b1a0>] (spi_add_device+0xc8/0x128) [<c022b0d8>] (spi_add_device+0x0/0x128) from [<c022b27c>] (spi_new_device+0x7c/0xb4) r7:c33e3dd8 r6:00000000 r5:c33e3dd8 r4:c25caa00 [<c022b200>] (spi_new_device+0x0/0xb4) from [<bf016f60>] (mcu_probe+0x144/0x224 [mcu]) r7:c33e3dd8 r6:c0451c80 r5:bf01763c r4:00000000 [<bf016e1c>] (mcu_probe+0x0/0x224 [mcu]) from [<c01f72f4>] (platform_drv_probe+0x20/0x24) [<c01f72d4>] (platform_drv_probe+0x0/0x24) from [<c01f5d88>] (driver_probe_device+0x88/0x1b0) [<c01f5d00>] (driver_probe_device+0x0/0x1b0) from [<c01f5f44>] (__driver_attach+0x94/0x98) [<c01f5eb0>] (__driver_attach+0x0/0x98) from [<c01f5534>] (bus_for_each_dev+0x68/0x94) r7:c01f5eb0 r6:bf0174dc r5:c33e3e98 r4:00000000 [<c01f54cc>] (bus_for_each_dev+0x0/0x94) from [<c01f5bec>] (driver_attach+0x20/0x28) r7:c0462ac8 r6:bf0174dc r5:00098258 r4:00003cd8 [<c01f5bcc>] (driver_attach+0x0/0x28) from [<c01f4d30>] (bus_add_driver+0xb4/0x258) [<c01f4c7c>] (bus_add_driver+0x0/0x258) from [<c01f6588>] (driver_register+0x74/0x158) [<c01f6514>] (driver_register+0x0/0x158) from [<c01f777c>] (platform_driver_register+0x4c/0x60) r7:c33e2000 r6:00000000 r5:00098258 r4:00003cd8 [<c01f7730>] (platform_driver_register+0x0/0x60) from [<bf019014>] (mcu_init+0x14/0x20 [mcu]) [<bf019000>] (mcu_init+0x0/0x20 [mcu]) from [<c002f3ec>] (do_one_initcall+0x38/0x170) [<c002f3b4>] (do_one_initcall+0x0/0x170) from [<c007b934>] (sys_init_module+0x8c/0x1a4) [<c007b8a8>] (sys_init_module+0x0/0x1a4) from [<c0030020>] (ret_fast_syscall+0x0/0x2c) r7:00000080 r6:00000003 r5:00000000 r4:00003cd8 Code: e1844003 e585400c e596300c e5932064 (e7814002) Fix the issue. Cc: <stable@vger.kernel.org> # v3.0.x+ Reported-by: Jon Povey <Jon.Povey@racelogic.co.uk> Signed-off-by: Sekhar Nori <nsekhar@ti.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
* ARM: 7074/1: gpio: davinci: eliminate unused variable warningsAxel Lin2011-09-051-3/+0
| | | | | | | | | | | | | | | | Since commit 5093aec872e5be7a55d8dd2b639e8a3818dc19db "arm: davinci: Cleanup irq chip code", the variable 'mask' and 'g' are not being used. This patch eliminate below unused variable warnings: CC drivers/gpio/gpio-davinci.o drivers/gpio/gpio-davinci.c: In function 'gpio_irq_type': drivers/gpio/gpio-davinci.c:234: warning: unused variable 'mask' drivers/gpio/gpio-davinci.c:233: warning: unused variable 'g' Signed-off-by: Axel Lin <axel.lin@gmail.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* ARM: 7038/1: mach-davinci: move GPIO driver to GPIO subsystemLinus Walleij2011-08-221-0/+458
As per example from the other ARM boards, push the DaVinci GPIO driver down to the GPIO subsystem so it can be consolidated. Cc: Sekhar Nori <nsekhar@ti.com> Cc: Kevin Hilman <khilman@ti.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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