summaryrefslogtreecommitdiffstats
path: root/drivers/clk
Commit message (Expand)AuthorAgeFilesLines
* clk: fix possible null pointer dereferenceStanimir Varbanov2015-01-171-1/+1
* Revert "clk: ppc-corenet: Fix Section mismatch warning"Kevin Hao2015-01-171-1/+1
* clk: rockchip: fix deadlock possibility in cpuclkHeiko Stübner2015-01-171-4/+6
* clk: berlin: bg2q: remove non-exist "smemc" gate clockJisheng Zhang2015-01-131-1/+0
* clk: at91: keep slow clk enabled to prevent system hangBoris Brezillon2015-01-131-0/+27
* clk: rockchip: fix rk3288 cpuclk core dividersHeiko Stuebner2014-12-281-14/+14
* clk: rockchip: fix rk3066 pll lock bit locationHeiko Stuebner2014-12-281-2/+13
* clk: rockchip: Fix clock gate for rk3188 hclk_emem_periRomain Perier2014-12-211-1/+1
* clk: rockchip: add CLK_IGNORE_UNUSED flag to fix rk3066/rk3188 USB HostJulien CHAUVEAU2014-12-211-4/+6
* Merge tag 'clk-for-linus-3.19' of git://git.linaro.org/people/mike.turquette/...Linus Torvalds2014-12-2056-519/+5611
|\
| * clk: samsung: Fix Exynos 5420 pinctrl setup and clock disable failure due to ...Krzysztof Kozlowski2014-12-171-1/+28
| * Merge tag 'for-v3.19/omap-a' of git://git.kernel.org/pub/scm/linux/kernel/git...Michael Turquette2014-12-151-0/+15
| |\
| * | clk: Really fix deadlock with mmap_semStephen Boyd2014-12-151-2/+3
| * | Merge tag 'for-v3.19-exynos-clk-2' of git://linuxtv.org/snawrocki/samsung int...Michael Turquette2014-12-115-10/+12
| |\ \
| | * | clk: samsung: Fix double add of syscore ops after driver rebindKrzysztof Kozlowski2014-12-021-0/+4
| | * | clk: samsung: exynos4: set parent of sclk_hdmiphy to hdmiAndrzej Hajda2014-12-021-1/+1
| | * | clk: samsung: exynos4415: Fix build with PM_SLEEP disabledKrzysztof Kozlowski2014-12-021-2/+4
| | * | clk: samsung: remove unnecessary inclusion of header files from clk.hPankaj Dubey2014-12-022-4/+2
| | * | clk: samsung: remove unnecessary CONFIG_OF from clk.cPankaj Dubey2014-12-021-2/+0
| | * | clk: samsung: Spelling s/bwtween/between/Pankaj Dubey2014-12-021-1/+1
| * | | clk: mmp: fix sparse non static symbol warningWei Yongjun2014-12-111-1/+1
| * | | clk: Change clk_ops->determine_rate to return a clk_hw as the best parentTomeu Vizoso2014-12-0311-41/+57
| * | | clk: change clk_debugfs_add_file to take a struct clk_hwTomeu Vizoso2014-12-031-3/+3
| * | | clk: Don't expose __clk_get_accuracyTomeu Vizoso2014-12-031-1/+1
| * | | clk: Don't try to use a struct clk* after it could have been freedTomeu Vizoso2014-12-031-1/+4
| * | | clk: Remove unused function __clk_get_prepare_countTomeu Vizoso2014-12-031-5/+0
| * | | Merge tag 'ib-mfd-regulator-clk-v3.19' of git://git.kernel.org/pub/scm/linux/...Michael Turquette2014-11-281-0/+24
| |\ \ \
| * \ \ \ Merge tag 'v3.19-rockchip-clk2' of git://git.kernel.org/pub/scm/linux/kernel/...Michael Turquette2014-11-287-50/+302
| |\ \ \ \
| | * | | | clk: rockchip: Add support for the mmc clock phases using the frameworkAlexandru M Stan2014-11-285-0/+198
| | * | | | clk: rockchip: rk3288 export i2s0_clkout for use in DTSonny Rao2014-11-281-1/+1
| | * | | | clk: rockchip: use clock ID for DMC (memory controller) on rk3288Jeff Chen2014-11-261-4/+4
| | * | | | clk: rockchip: add ROCKCHIP_PLL_SYNC_RATE flag to some pllsHeiko Stuebner2014-11-252-5/+5
| | * | | | clk: rockchip: add optional sync to pll rate parametersHeiko Stuebner2014-11-252-0/+56
| | * | | | clk: rockchip: setup pll_mux data earlierHeiko Stuebner2014-11-251-14/+13
| | * | | | clk: rockchip: add ability to specify pll-specific flagsHeiko Stuebner2014-11-255-13/+19
| | * | | | clk: rockchip: fix rk3188 USB HSIC PHY clock dividerJulien CHAUVEAU2014-11-231-1/+1
| | * | | | clk: rockchip: fix clock gate for rk3188 spdif_preJulien CHAUVEAU2014-11-231-16/+9
| | * | | | clk: rockchip: fix parent clock for rk3188 hclk_lcdc1Julien CHAUVEAU2014-11-181-1/+1
| * | | | | clk: clk-s2mps11: fix semicolon.cocci warningskbuild test robot2014-11-251-1/+1
| * | | | | Merge tag 'sunxi-clocks-for-3.19' of https://git.kernel.org/pub/scm/linux/ker...Michael Turquette2014-11-248-30/+341
| |\ \ \ \ \
| | * | | | | clk: sunxi: gmac-tx-clk mux is not a CLK_MUX_INDEX_BIT muxHans de Goede2014-11-231-1/+6
| | * | | | | clk: sunxi: Implement A31 PLL6 as a divs clock for 2x outputChen-Yu Tsai2014-11-231-12/+16
| | * | | | | clk: sunxi: Specify number of child clocks for divs clocksChen-Yu Tsai2014-11-231-2/+9
| | * | | | | clk: sunxi: Removed unused/incorrect sun6i-a31-apb2-clk driverChen-Yu Tsai2014-11-231-7/+0
| | * | | | | clk: sunxi: unify APB1 clockEmilio López2014-11-111-5/+2
| | * | | | | clk: sunxi: Add support for bus clock gates on Allwinner A80 SoCChen-Yu Tsai2014-10-211-0/+31
| | * | | | | clk: sunxi: Add support for A80 basic bus clocksChen-Yu Tsai2014-10-212-0/+272
| | * | | | | clk: sunxi: make factors clock mux mask configurableChen-Yu Tsai2014-10-215-3/+5
| * | | | | | Merge branch 'clk-fixes' into clk-nextMichael Turquette2014-11-245-32/+31
| |\ \ \ \ \ \
| * | | | | | | clk: hi3620: Move const initdata into correct code sectionBintian Wang2014-11-191-35/+35
OpenPOWER on IntegriCloud