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| | * | clk: qcom: Add support for BRANCH_HALT_SKIP flag for branch clocksAmit Nischal2018-05-082-2/+6
| | * | clk: qcom: Simplify gdsc status checking logicStephen Boyd2018-05-081-19/+37
| | * | clk: qcom: gdsc: Add support to poll CFG register to check GDSC stateAmit Nischal2018-05-012-16/+27
| | * | clk: qcom: gdsc: Add support to poll for higher timeout valueAmit Nischal2018-04-161-1/+1
| | * | clk: qcom: gdsc: Add support to reset AON and block reset logicAmit Nischal2018-04-162-3/+23
| | * | clk: qcom: Add support for controlling Fabia PLLAmit Nischal2018-03-192-8/+311
| | * | clk: qcom: Clear hardware clock control bit of RCGAmit Nischal2018-03-191-2/+3
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| *-----. \ \ Merge branches 'clk-match-string', 'clk-ingenic', 'clk-si544-round-fix' and '...Stephen Boyd2018-06-047-70/+148
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| | | | | * | | clk: bcm: Update and add Stingray clock entriesPramod Kumar2018-06-011-15/+120
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| | | | * | | clk-si544: Properly round requested frequency to nearest matchMike Looijmans2018-06-011-0/+1
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| | | * | | clk: ingenic: jz4770: Add 150us delay after enabling VPU clockPaul Cercueil2018-06-011-1/+1
| | | * | | clk: ingenic: jz4770: Enable power of AHB1 bus after ungating VPU clockPaul Cercueil2018-06-011-2/+2
| | | * | | clk: ingenic: jz4770: Modify C1CLK clock to disable CPU clock stop on idlePaul Cercueil2018-06-011-1/+2
| | | * | | clk: ingenic: jz4770: Change OTG from custom to standard gated clockPaul Cercueil2018-06-011-37/+5
| | | * | | clk: ingenic: Support specifying "wait for clock stable" delayPaul Cercueil2018-06-012-0/+5
| | | * | | clk: ingenic: Add support for clocks whose gate bit is invertedPaul Cercueil2018-06-012-2/+5
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| | * | | clk: use match_string() helperYisheng Xie2018-06-011-6/+2
| | * | | clk: bcm2835: use match_string() helperYisheng Xie2018-06-011-7/+6
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| *-------. \ \ Merge branches 'clk-imx7d', 'clk-hisi-stub', 'clk-mvebu', 'clk-imx6-epit' and...Stephen Boyd2018-06-048-178/+71
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| | | | | | * | | clk: Return void from debug_init opStephen Boyd2018-06-012-19/+14
| | | | | | * | | clk: remove clk_debugfs_add_file()Greg Kroah-Hartman2018-06-011-13/+0
| | | | | | * | | clk: tegra: no need to check return value of debugfs_create functionsGreg Kroah-Hartman2018-06-011-31/+11
| | | | | | * | | clk: davinci: no need to check return value of debugfs_create functionsGreg Kroah-Hartman2018-06-011-6/+1
| | | | | | * | | clk: bcm2835: no need to check return value of debugfs_create functionsGreg Kroah-Hartman2018-06-011-4/+2
| | | | | | * | | clk: no need to check return value of debugfs_create functionsGreg Kroah-Hartman2018-06-011-99/+30
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| | | | | * | | clk: imx6: add EPIT clock supportColin Didier2018-06-011-0/+2
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| | | | * | | clk: mvebu: use correct bit for 98DX3236 NANDChris Packham2018-06-011-1/+1
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| | | * | | clk/driver/hisi: Consolidate the Kconfig for the CLOCK_STUBDaniel Lezcano2018-06-011-5/+8
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| | * | | clk: imx7d: reset parent for mipi csi rootRui Miguel Silva2018-06-011-0/+2
| | * | | clk: imx7d: fix mipi dphy div parentRui Miguel Silva2018-06-011-1/+1
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| *---. \ \ Merge branches 'clk-imx6sx', 'clk-imx7d-enet' and 'clk-aspeed-24' into clk-nextStephen Boyd2018-06-044-17/+24
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| | | | * | | clk: aspeed: Add 24MHz fixed clockLei YU2018-06-011-1/+8
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| | | * | | clk: imx7d: correct enet clock CCGR registersAnson Huang2018-06-011-4/+6
| | | * | | clk: imx7d: correct enet phy ref clock gatesAnson Huang2018-06-011-2/+1
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| | * | | clk: imx6sl: correct ocram_podf clock typeAnson Huang2018-06-011-1/+1
| | * | | clk: imx6sx: disable unnecessary clocks during clock initializationAnson Huang2018-06-011-6/+1
| | * | | clk: imx6sx: add missing lvds2 clock to the clock treeAnson Huang2018-05-041-3/+7
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| *-------. \ \ Merge branches 'clk-allwinner', 'clk-rockchip', 'clk-tegra', 'clk-berlin' and...Stephen Boyd2018-06-0429-269/+399
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| | | | | | * | | clk: qcom: mmcc-msm8996: leave all mmagic gdscs and clocks always enabledRajendra Nayak2018-06-012-12/+12
| | | | | | * | | clk: qcom: Register the gdscs before the clocksRajendra Nayak2018-06-011-16/+16
| | | | | | * | | clk: qcom: gdsc: Add support for ALWAYS_ON gdscsRajendra Nayak2018-06-012-0/+9
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| | | | | * | | clk: berlin: switch to SPDX license identifierJisheng Zhang2018-06-019-108/+9
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| | | | * | | clk: tegra: Add quirk for getting CDEV1/2 clocks on Tegra20Dmitry Osipenko2018-05-187-8/+39
| | | | * | | clk: tegra20: Correct parents of CDEV1/2 clocksDmitry Osipenko2018-05-181-4/+2
| | | | * | | clk: tegra20: Add DEV1/DEV2 OSC dividersDmitry Osipenko2018-05-181-0/+14
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| | | * | | clk: rockchip: remove deprecated gate-clk code and dt-bindingHeiko Stuebner2018-05-232-99/+0
| | | * | | clk: rockchip: use match_string() helperYisheng Xie2018-05-221-11/+5
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| | * | | clk: sunxi-ng: r40: export a regmap to access the GMAC registerIcenowy Zheng2018-05-171-0/+33
| | * | | clk: sunxi-ng: r40: rewrite init code to a platform driverIcenowy Zheng2018-05-171-11/+28
| | * | | clk: sunxi-ng: add support for H6 PRCM CCUIcenowy Zheng2018-05-044-0/+232
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