| Commit message (Expand) | Author | Age | Files | Lines |
* | Merge tag 'pm+acpi-3.11-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git... | Linus Torvalds | 2013-07-03 | 1 | -3/+1 |
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| * | Merge branch 'acpi-lpss' | Rafael J. Wysocki | 2013-06-28 | 1 | -3/+1 |
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| | * | ACPI / LPSS: add support for Intel BayTrail | Mika Westerberg | 2013-06-19 | 1 | -3/+1 |
* | | | Merge tag 'clk-for-linus-3.11' of git://git.linaro.org/people/mturquette/linux | Linus Torvalds | 2013-07-03 | 28 | -292/+1885 |
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| * | | | clk: exynos4: Fix clock aliases for cpufreq related clocks | Tushar Behera | 2013-06-22 | 1 | -10/+11 |
| * | | | clk: samsung: Add MUX_FA macro to pass flag and alias | Tushar Behera | 2013-06-22 | 1 | -0/+3 |
| * | | | clk: add support for Rockchip gate clocks | Heiko Stübner | 2013-06-20 | 3 | -0/+100 |
| * | | | clk: vexpress: Make the clock drivers directly available for arm64 | Pawel Moll | 2013-06-20 | 1 | -1/+1 |
| * | | | clk: vexpress: Use full node name to identify individual clocks | Pawel Moll | 2013-06-20 | 1 | -2/+2 |
| * | | | clk: tegra: T114: add DFLL DVCO reset control | Paul Walmsley | 2013-06-18 | 2 | -0/+39 |
| * | | | clk: tegra: T114: add DFLL source clocks | Paul Walmsley | 2013-06-18 | 1 | -0/+11 |
| * | | | clk: tegra: T114: add FCPU clock shaper programming, needed by the DFLL | Paul Walmsley | 2013-06-18 | 2 | -0/+122 |
| * | | | clk: gate: add CLK_GATE_HIWORD_MASK | Haojian Zhuang | 2013-06-15 | 1 | -6/+19 |
| * | | | clk: divider: add CLK_DIVIDER_HIWORD_MASK flag | Haojian Zhuang | 2013-06-15 | 1 | -2/+13 |
| * | | | clk: mux: add CLK_MUX_HIWORD_MASK | Haojian Zhuang | 2013-06-15 | 1 | -2/+15 |
| * | | | clk: Always notify whole subtree when reparenting | Soren Brinkmann | 2013-06-15 | 1 | -2/+1 |
| * | | | clk: honor CLK_GET_RATE_NOCACHE in clk_set_rate | Peter De Schrijver | 2013-06-11 | 1 | -1/+1 |
| * | | | clk: use clk_get_rate() for debugfs | Peter De Schrijver | 2013-06-11 | 1 | -2/+2 |
| * | | | clk: tegra: Use override bits when needed | Peter De Schrijver | 2013-06-11 | 1 | -33/+49 |
| * | | | clk: tegra: override bits for Tegra30 PLLM | Peter De Schrijver | 2013-06-11 | 1 | -0/+18 |
| * | | | clk: tegra: override bits for Tegra114 PLLM | Peter De Schrijver | 2013-06-11 | 1 | -0/+9 |
| * | | | clk: tegra: Add fields for override bits | Peter De Schrijver | 2013-06-11 | 1 | -0/+8 |
| * | | | clk: tegra: fix sclk_parents | Peter De Schrijver | 2013-06-11 | 1 | -1/+1 |
| * | | | clk: tegra: fix pllre initilization | Peter De Schrijver | 2013-06-11 | 1 | -2/+1 |
| * | | | clk: tegra: PLL m,n,p init for Tegra114 | Peter De Schrijver | 2013-06-11 | 1 | -0/+77 |
| * | | | clk: tegra: allow PLL m,n,p init from SoC files | Peter De Schrijver | 2013-06-11 | 2 | -39/+53 |
| * | | | clk: tegra: pllp_out2 divider is int only | Peter De Schrijver | 2013-06-11 | 1 | -2/+2 |
| * | | | clk: tegra: pllc and pllxc should use pdiv_map | Peter De Schrijver | 2013-06-11 | 1 | -80/+82 |
| * | | | clk: divider: do not propagate rate change request when unnecessary | Shawn Guo | 2013-06-10 | 1 | -0/+10 |
| * | | | clk: ux500: Clocks definition for u8540 | Philippe Begnic | 2013-06-06 | 1 | -1/+559 |
| * | | | clk: ux500: Pass clock base adresses in initcall for u8540 and u9540 | Philippe Begnic | 2013-06-06 | 2 | -4/+4 |
| * | | | clk: tegra114: Fix msenc clock register | Mikko Perttunen | 2013-06-04 | 1 | -1/+1 |
| * | | | clk: tegra: Use common of_clk_init function | Prashant Gaikwad | 2013-05-31 | 5 | -33/+6 |
| * | | | clk: tegra114: correctly output clk_32k | Alexandre Courbot | 2013-05-31 | 1 | -0/+3 |
| * | | | clk: tegra: fix clk_out parents list | Prashant Gaikwad | 2013-05-31 | 2 | -4/+4 |
| * | | | clk: Add TI-Nspire clock drivers | Daniel Tang | 2013-05-31 | 2 | -0/+154 |
| * | | | clk: use platform_{get,set}_drvdata() | Jingoo Han | 2013-05-30 | 2 | -3/+3 |
| * | | | clk: mpc85xx: Update the compatible string | Tang Yuantian | 2013-05-30 | 1 | -1/+1 |
| * | | | clk: sunxi: "cpu_data" is defined in header files of some architectures | Giacomo A. Catenazzi | 2013-05-29 | 1 | -2/+2 |
| * | | | clk: exynos5250: Add sclk_mpll to the parent list of mout_cpu clock | Tushar Behera | 2013-05-29 | 1 | -1/+1 |
| * | | | clk: exynos5250: Update cpufreq related clocks for EXYNOS5250 | Tushar Behera | 2013-05-29 | 1 | -3/+3 |
| * | | | clk: vt8500: Remove unnecessary divisor adjustment in vtwm_dclk_set_rate() | Tony Prisk | 2013-05-29 | 1 | -4/+0 |
| * | | | clk: vt8500: Add support for clocks on the WM8850 SoCs | Tony Prisk | 2013-05-29 | 1 | -0/+71 |
| * | | | clk: Disable unused clocks after deferred probing is done | Saravana Kannan | 2013-05-29 | 1 | -1/+1 |
| * | | | clk: wm831x: Fix wm831x_clkout_get_parent | Axel Lin | 2013-05-28 | 1 | -3/+3 |
| * | | | clk: wm831x: Fix update wrong register for enable/disable FLL | Axel Lin | 2013-05-28 | 1 | -3/+3 |
| * | | | clk: si5351: Allow to build without CONFIG_OF | Sebastian Hesselbarth | 2013-05-28 | 1 | -1/+0 |
| * | | | clk: Fix race condition between clk_set_parent and clk_enable() | Saravana Kannan | 2013-05-28 | 1 | -45/+44 |
| * | | | clk: si5351: declare all device IDs for module loading | Jean-Francois Moine | 2013-05-28 | 1 | -1/+4 |
| * | | | clk: sun5i: Add compatibles for Allwinner A13 | Maxime Ripard | 2013-05-28 | 1 | -8/+23 |