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path: root/drivers/clk/zynq
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* clk: zynq: Force CPU_2X clock to be ungatedSoren Brinkmann2015-01-271-0/+1
* clk: zynq: Move const initdata into correct code sectionSoren Brinkmann2014-09-091-15/+14
* clk: zynq: Remove pointless return at end of void functionSoren Brinkmann2014-09-091-1/+0
* clk: zynq: Remove unnecessary OOM messageSoren Brinkmann2014-09-091-3/+1
* clk: zynq: Leave debug clocks in bootup stateSoren Brinkmann2014-04-221-0/+12
* Merge tag 'clk-for-linus-3.15' of git://git.linaro.org/people/mike.turquette/...Linus Torvalds2014-04-052-11/+11
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| * clk: zynq: Use clk_readl/clk_writel helper functionMichal Simek2014-02-252-11/+11
* | ARM: zynq: Move of_clk_init from clock driverMichal Simek2014-03-171-2/+0
* | ARM: zynq: Map I/O memory on clkc initMichal Simek2014-02-101-26/+63
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* clk/zynq/clkc: Add 'fclk-enable' featureSoren Brinkmann2013-12-201-3/+15
* clk/zynq: Fix possible memory leakFelipe Pena2013-10-071-1/+15
* Merge tag 'clk-for-linus-3.12' of git://git.linaro.org/people/mturquette/linuxLinus Torvalds2013-09-092-39/+62
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| * Merge tag 'zynq-clk-for-3.12' of git://git.xilinx.com/linux-xlnx into clk-nextMike Turquette2013-08-201-5/+14
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| | * clk/zynq/pll: Use #defines for fbdiv min/max valuesSoren Brinkmann2013-08-201-4/+7
| | * clk/zynq/pll: Fix documentation for PLL register functionSoren Brinkmann2013-08-201-1/+7
| * | clk: add CLK_SET_RATE_NO_REPARENT flagJames Hogan2013-08-191-36/+50
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* | clk/zynq/clkc: Add CLK_SET_RATE_PARENT flag to ethernet muxesSoren Brinkmann2013-08-131-4/+6
* | clk/zynq/clkc: Add dedicated spinlock for the SWDTSoren Brinkmann2013-08-131-1/+2
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* arm: zynq: Migrate platform to clock controllerSoren Brinkmann2013-05-271-0/+3
* clk: zynq: Add clock controller driverSoren Brinkmann2013-05-271-0/+533
* clk: zynq: Factor out PLL driverSoren Brinkmann2013-05-211-0/+235
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