summaryrefslogtreecommitdiffstats
path: root/drivers/clk/tegra
Commit message (Expand)AuthorAgeFilesLines
...
| | * clk: tegra: Add sor_safe clockThierry Reding2016-04-282-0/+5
| | * clk: tegra: dpaux and dpaux1 are fixed factor clocksThierry Reding2016-04-283-2/+12
| | * clk: tegra: Add dpaux1 clockThierry Reding2016-04-283-0/+3
| | * clk: tegra: Use correct parent for dpaux clockThierry Reding2016-04-281-1/+1
| | * clk: tegra: Add fixed factor peripheral clock typeThierry Reding2016-04-283-0/+138
| | * clk: tegra: Special-case mipi-cal parent on Tegra114Thierry Reding2016-04-282-2/+6
| | * clk: tegra: Remove trailing blank lineThierry Reding2016-04-281-1/+0
| | * clk: tegra: Constify peripheral clock registersThierry Reding2016-04-285-7/+7
* | | Merge tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/a...Linus Torvalds2016-05-181-0/+58
|\ \ \
| * \ \ Merge tag 'tegra-for-4.7-phy' of git://git.kernel.org/pub/scm/linux/kernel/gi...Arnd Bergmann2016-05-091-0/+58
| |\ \ \ | | |/ / | |/| / | | |/
| | * clk: tegra: Add interface to enable hardware control of SATA/XUSB PLLsAndrew Bresticker2016-04-281-0/+58
* | | treewide: Fix typos in printkMasanari Iida2016-04-281-1/+1
|/ /
* | clk: tegra: Make reset_control_ops constPhilipp Zabel2016-03-291-1/+1
|/
* clk: tegra: Remove CLK_IS_ROOTStephen Boyd2016-03-025-14/+8
* clk: tegra: super: Fix sparse warnings for functions not declared as staticJon Hunter2016-02-021-3/+3
* clk: tegra: Fix sparse warnings for functions not declared as staticJon Hunter2016-02-021-17/+19
* clk: tegra: Fix sparse warning for pll_mJon Hunter2016-02-021-1/+1
* clk: tegra: Use definition for pll_u override bitJon Hunter2016-02-021-1/+1
* clk: tegra: Fix warning caused by pll_u failing to lockJon Hunter2016-02-021-2/+0
* clk: tegra: Fix clock sources for Tegra210 EMCJon Hunter2016-02-021-1/+2
* clk: tegra: Add the APB2APE audio clock on Tegra210Jon Hunter2016-02-023-0/+3
* clk: tegra: Add missing of_node_put()Amitoj Kaur Chawla2016-02-021-2/+4
* clk: tegra: Fix PLLE SS coefficientsMark Kuo2016-02-021-6/+12
* clk: tegra: Fix typos around clearing PLLE bits during enableRhyland Klein2016-02-021-2/+2
* clk: tegra: Do not disable PLLE when under hardware controlMark Kuo2016-02-021-7/+15
* clk: tegra: Fix pllx dyn step calculationRhyland Klein2016-02-021-5/+5
* clk: tegra: pll: Fix potential sleeping-while-atomicAndrew Bresticker2016-02-021-3/+3
* clk: tegra: Fix the misnaming of nvenc from msencRhyland Klein2016-02-021-1/+1
* clk: tegra: Fix naming of MISC registersRhyland Klein2016-02-021-18/+18
* clk: tegra: Remove improper flags for lock_enableRhyland Klein2016-01-251-28/+14
* clk: tegra: Fix divider on VI_I2CRhyland Klein2016-01-251-1/+1
* Merge tag 'asm-generic-for-linus' of git://git.kernel.org/pub/scm/linux/kerne...Linus Torvalds2016-01-201-2/+2
|\
| * tegra/clk-divider: fix wrong do_div() usageNicolas Pitre2015-11-161-2/+2
* | clk: tegra: Read correct IDDQ register in PLL_SS registrationBill Huang2015-12-171-4/+7
* | clk: tegra: Fix WARN_ON in PLL_RE registrationBill Huang2015-12-171-1/+2
* | clk: tegra: pll: Fix issues with rates for VCO PLLsAndrew Bresticker2015-12-171-4/+12
* | clk: tegra: Add support for Tegra210 clocksRhyland Klein2015-12-175-0/+2868
* | clk: tegra: Add Super Gen5 LogicBill Huang2015-12-172-13/+132
* | clk: tegra: pll: Add logic for SSBill Huang2015-12-172-1/+28
* | clk: tegra: pll: Add dyn_ramp callbackRhyland Klein2015-12-172-0/+11
* | clk: tegra: pll: Add Set_default logicBill Huang2015-12-172-11/+39
* | clk: tegra: pll: Adjust vco_min if SDM presentBill Huang2015-12-172-0/+32
* | clk: tegra: pll: Add support for PLLMB for Tegra210Rhyland Klein2015-12-172-5/+52
* | clk: tegra: pll: Add specialized logic for Tegra210Rhyland Klein2015-12-172-2/+346
* | clk: tegra: pll: Update PLLM handlingDanny Huang2015-11-203-51/+10
* | clk: tegra: pll: Fix _pll_ramp_calc_pll logic and _calc_dynamic_ramp_rateRhyland Klein2015-11-205-304/+379
* | clk: tegra: pll: Add code to handle if resets are supported by PLLBill Huang2015-11-202-0/+16
* | clk: tegra: pll: Add logic for out-of-table rates for T210Rhyland Klein2015-11-202-2/+35
* | clk: tegra: pll: Add logic for handling SDM dataRhyland Klein2015-11-202-2/+79
* | clk: tegra: pll: Don't unconditionally set LOCK flagsRhyland Klein2015-11-205-45/+55
OpenPOWER on IntegriCloud