| Commit message (Expand) | Author | Age | Files | Lines |
... | |
| * | clk: tegra: dfll: Monitor code is DEBUG_FS only | Thierry Reding | 2015-10-20 | 1 | -50/+49 |
| * | clk: tegra: Unlock top rates for Tegra124 DFLL clock | Mikko Perttunen | 2015-09-15 | 2 | -14/+8 |
* | | clk: tegra: delete unneeded of_node_put | Julia Lawall | 2015-10-12 | 1 | -3/+1 |
* | | clk: tegra: dfll: Properly protect OPP list | Thierry Reding | 2015-09-16 | 1 | -1/+7 |
|/ |
|
* | clk: tegra: Fix some static checker problems | Stephen Boyd | 2015-08-25 | 2 | -7/+9 |
* | Merge tag 'tegra-for-4.3-clk' of git://git.kernel.org/pub/scm/linux/kernel/gi... | Stephen Boyd | 2015-08-25 | 10 | -9/+2304 |
|\ |
|
| * | clk: tegra: Add the DFLL as a possible parent of the cclk_g clock | Tuomas Tynkkynen | 2015-07-16 | 1 | -1/+3 |
| * | clk: tegra: Save/restore CCLKG_BURST_POLICY on suspend | Tuomas Tynkkynen | 2015-07-16 | 1 | -0/+14 |
| * | clk: tegra: Add Tegra124 DFLL clocksource platform driver | Tuomas Tynkkynen | 2015-07-16 | 4 | -4/+172 |
| * | clk: tegra: Add DFLL DVCO reset control for Tegra124 | Paul Walmsley | 2015-07-16 | 1 | -0/+68 |
| * | clk: tegra: Introduce ability for SoC-specific reset control callbacks | Mikko Perttunen | 2015-07-16 | 2 | -8/+34 |
| * | clk: tegra: Add functions for parsing CVB tables | Tuomas Tynkkynen | 2015-07-16 | 2 | -0/+207 |
| * | clk: tegra: Add closed loop support for the DFLL | Tuomas Tynkkynen | 2015-07-16 | 1 | -3/+663 |
| * | clk: tegra: Add library for the DFLL clock source (open-loop mode) | Tuomas Tynkkynen | 2015-07-16 | 3 | -0/+1150 |
* | | clk: Convert __clk_get_name(hw->clk) to clk_hw_get_name(hw) | Stephen Boyd | 2015-08-24 | 1 | -4/+4 |
* | | clk: tegra: Convert to clk_hw based provider APIs | Stephen Boyd | 2015-08-24 | 2 | -10/+10 |
* | | Merge branch 'cleanup-clk-h-includes' into clk-next | Stephen Boyd | 2015-07-28 | 16 | -16/+2 |
|\ \ |
|
| * | | clk: tegra: Properly include clk.h | Stephen Boyd | 2015-07-20 | 16 | -16/+2 |
| |/ |
|
* | | clk: change clk_ops' ->determine_rate() prototype | Boris Brezillon | 2015-07-27 | 1 | -13/+15 |
|/ |
|
* | clk: tegra: Fix hda2codec_2x clock name for Tegra30 | Marcel Ziswiler | 2015-05-13 | 1 | -1/+1 |
* | clk: tegra: EMC clock driver depends on EMC driver | Thierry Reding | 2015-05-13 | 3 | -1/+14 |
* | clk: tegra: Have EMC clock implement determine_rate() | Tomeu Vizoso | 2015-05-13 | 1 | -12/+23 |
* | clk: tegra: Set the EMC clock as the parent of the MC clock | Tomeu Vizoso | 2015-05-13 | 1 | -12/+1 |
* | clk: tegra: Add EMC clock driver | Mikko Perttunen | 2015-05-13 | 4 | -2/+535 |
* | clk: tegra: Remove old Tegra124 EMC clock | Mikko Perttunen | 2015-05-13 | 1 | -1/+0 |
* | clk: tegra: Use the proper parent for plld_dsi | Thierry Reding | 2015-04-10 | 1 | -6/+8 |
* | clk: tegra: Use generic tegra_osc_clk_init() on Tegra114 | Thierry Reding | 2015-04-10 | 1 | -31/+3 |
* | clk: tegra: Model oscillator as clock | Thierry Reding | 2015-04-10 | 4 | -17/+21 |
* | clk: tegra: Add peripheral registers for bank Y | Thierry Reding | 2015-04-10 | 1 | -0/+14 |
* | clk: tegra: Register the proper number of resets | Thierry Reding | 2015-04-10 | 1 | -1/+1 |
* | clk: tegra: Remove needless initializations | Thierry Reding | 2015-04-10 | 1 | -3/+3 |
* | clk: tegra: Use consistent indentation | Thierry Reding | 2015-04-10 | 1 | -10/+10 |
* | clk: tegra: Various whitespace cleanups | Thierry Reding | 2015-04-10 | 2 | -1/+2 |
* | clk: tegra: Enable HDA to HDMI clocks on Tegra124 | Dylan Reid | 2015-04-10 | 1 | -0/+5 |
* | clk: tegra: Fix a bunch of sparse warnings | Thierry Reding | 2015-04-10 | 1 | -1/+1 |
* | clk: tegra: Fix typo tabel -> table | Thierry Reding | 2015-04-10 | 1 | -1/+1 |
* | clk: Replace explicit clk assignment with __clk_hw_set_clk | Javier Martinez Canillas | 2015-02-18 | 1 | -7/+7 |
* | clk: tegra: Define PLLD_DSI and remove dsia(b)_mux | Mark Zhang | 2015-02-02 | 4 | -26/+24 |
* | clk: tegra: Add support for the Tegra132 CAR IP block | Paul Walmsley | 2015-02-02 | 3 | -12/+129 |
* | clk: tegra: make tegra_clocks_apply_init_table() arch_initcall | Peter De Schrijver | 2015-02-02 | 1 | -2/+5 |
* | clk: tegra: Fix order of arguments in WARN | Tomeu Vizoso | 2015-02-02 | 1 | -4/+4 |
* | clk: tegra124: Add init data for dsi lp clocks | Sean Paul | 2015-02-02 | 1 | -0/+2 |
* | clk: tegra: SDMMC controllers are on APB | Andrew Bresticker | 2015-02-02 | 1 | -8/+8 |
* | clk: tegra: Implement memory-controller clock | Thierry Reding | 2014-11-26 | 6 | -4/+40 |
* | clk: tegra: Make clock initialization more robust | Tomeu Vizoso | 2014-09-18 | 1 | -2/+7 |
* | clk: tegra124: Add PLL_M_UD and PLL_C_UD clocks | Mikko Perttunen | 2014-09-18 | 1 | -0/+8 |
* | Merge tag 'cleanup-for-3.17' of git://git.kernel.org/pub/scm/linux/kernel/git... | Linus Torvalds | 2014-08-08 | 3 | -3/+8 |
|\ |
|
| * | ARM: tegra: Convert PMC to a driver | Thierry Reding | 2014-07-17 | 1 | -1/+1 |
| * | ARM: tegra: Move includes to include/soc/tegra | Thierry Reding | 2014-07-17 | 3 | -3/+8 |
* | | clk: tegra: Use XUSB-compatible SATA PLL sequence | Mikko Perttunen | 2014-07-08 | 1 | -0/+11 |