| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | clk: tegra: Re-factor T210 PLLX registration | Alex Frid | 2017-08-23 | 1 | -2/+9 |
| * | clk: tegra: super: Fix sparse warnings for functions not declared as static | Jon Hunter | 2016-02-02 | 1 | -3/+3 |
| * | clk: tegra: Add Super Gen5 Logic | Bill Huang | 2015-12-17 | 1 | -13/+129 |
| * | Merge tag 'tegra-for-4.3-clk' of git://git.kernel.org/pub/scm/linux/kernel/gi... | Stephen Boyd | 2015-08-25 | 1 | -1/+3 |
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| | * | clk: tegra: Add the DFLL as a possible parent of the cclk_g clock | Tuomas Tynkkynen | 2015-07-16 | 1 | -1/+3 |
| * | | clk: tegra: Properly include clk.h | Stephen Boyd | 2015-07-20 | 1 | -1/+0 |
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| * | clk: tegra: cclk_lp has a pllx/2 divider | Andrew Bresticker | 2014-02-17 | 1 | -1/+1 |
| * | clk: tegra: introduce common gen4 super clock | Peter De Schrijver | 2013-11-26 | 1 | -0/+149 |
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index : op-kernel-dev | |
| Development kernel branch for OpenPOWER systems | Raptor Engineering, LLC |
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