summaryrefslogtreecommitdiffstats
path: root/drivers/clk/tegra/clk-id.h
Commit message (Expand)AuthorAgeFilesLines
* clk: tegra: Add missing Tegra210 clocksPeter De Schrijver2017-04-041-0/+6
* clk: tegra: Define Tegra210 DMIC clocksPeter De Schrijver2017-03-201-1/+4
* clk: tegra: Define Tegra210 DMIC sync clocksPeter De Schrijver2017-03-201-0/+6
* clk: tegra: Add CEC clockPeter De Schrijver2017-03-201-0/+1
* clk: tegra: Fix ISP clock modellingPeter De Schrijver2017-03-201-0/+1
* clk: tegra: Squash sor1 safe/brick/src into a single muxThierry Reding2016-06-171-1/+0
* clk: tegra: Add sor_safe clockThierry Reding2016-04-281-0/+1
* clk: tegra: Add dpaux1 clockThierry Reding2016-04-281-0/+1
* clk: tegra: Add the APB2APE audio clock on Tegra210Jon Hunter2016-02-021-0/+1
* clk: tegra: Add support for Tegra210 clocksRhyland Klein2015-12-171-0/+7
* clk: tegra: periph: Add new periph clks and muxes for Tegra210Rhyland Klein2015-11-201-1/+67
* clk: tegra: Define PLLD_DSI and remove dsia(b)_muxMark Zhang2015-02-021-2/+0
* clk: tegra: Fix xusb_hs_src clock hierarchyAndrew Bresticker2014-05-221-0/+1
* clk: tegra: fix sdmmc clks on Tegra1x4Andrew Bresticker2014-02-171-0/+4
* clk: tegra124: Add common clk IDs to clk-id.hPeter De Schrijver2013-11-261-0/+22
* clk: tegra: add header for common tegra clock IDsPeter De Schrijver2013-11-261-0/+213
OpenPOWER on IntegriCloud