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path: root/drivers/clk/sunxi-ng/ccu_nm.c
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* clk: sunxi-ng: Wait for lock when using fractional modeJernej Škrabec2017-08-011-1/+2
| | | | | | | | | | | Currently ccu_frac_helper_set_rate() doesn't wait for a lock bit to be set before returning. Because of that, unstable clock may be used. Add a wait for lock in the helper function. Fixes: 89a3dfb78707 ("clk: sunxi-ng: Add fractional lib") Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Signed-off-by: Chen-Yu Tsai <wens@csie.org>
* clk: sunxi-ng: Fix fractional mode for N-M clocksJernej Škrabec2017-08-011-2/+14
| | | | | | | | | | | | | | N-M factor clock driver is missing a call to ccu_frac_helper_enable() when fractional mode is used. Additionally, most SoCs require that M factor must be set to 0 when fractional mode is used. Without this patch, clock keeps the old value and clk_set_rate() returns without error. Fixes: 6174a1e24b0d ("clk: sunxi-ng: Add N-M-factor clock support") CC: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Signed-off-by: Chen-Yu Tsai <wens@csie.org>
* clk: sunxi-ng: Fix round_rate/set_rate multiplier minimum mismatchChen-Yu Tsai2017-04-131-1/+1
| | | | | | | | | | | | In commit 2beaa601c849 ("clk: sunxi-ng: Implement minimum for multipliers"), the multiplier minimums in the set_rate callback for NM and NKMP style clocks were not updated. This patch fixes them to match their round_rate callbacks. Fixes: 2beaa601c849 ("clk: sunxi-ng: Implement minimum for multipliers") Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
* clk: sunxi-ng: use 1 as fallback for minimum multiplierChen-Yu Tsai2017-04-131-1/+1
| | | | | | | | | | A zero multiplier does not make sense for clocks. Use 1 as the minimum when a multiplier minimum isn't specified. Fixes: 2beaa601c849 ("clk: sunxi-ng: Implement minimum for multipliers") Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
* clk: sunxi-ng: Implement multiplier maximumMaxime Ripard2017-01-231-2/+2
| | | | | | | | | Some multipliers have a maximum rate that is lower than what the register width allows to. Add a field in the multiplier structure to allow CCU driver to set that maximum. Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
* clk: sunxi-ng: Implement factors offsetsMaxime Ripard2017-01-231-3/+10
| | | | | | | | | | | | | | | | | | The factors we've seen so far all had an offset of one. However, on the earlier Allwinner SoCs, some factors could have no offset at all, meaning that the value computed to reach the rate we want to use was the one we had to program in the registers. Implement an additional field for the factors that can have such an offset (linears, not based on a power of two) to specify that offset. This offset is not linked to the extremums that can be specified in those structures too. The minimum and maximum are representing the range of values we can use to try to compute the best rate. The offset comes later on when we want to set the best value in the registers. Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
* clk: sunxi-ng: Implement minimum for multipliersMaxime Ripard2016-10-251-1/+1
| | | | | | | Allow the CCU drivers to specify a multiplier for their clocks. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Chen-Yu Tsai <wens@csie.org>
* clk: sunxi-ng: Add minimums for all the relevant structures and clocksMaxime Ripard2016-10-251-4/+8
| | | | | | | | Modify the current clocks we have to be able to specify the minimum for each clocks we support, just like we support the max. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Chen-Yu Tsai <wens@csie.org>
* clk: sunxi-ng: Remove the use of rational computationsMaxime Ripard2016-10-251-13/+41
| | | | | | | | | | While the rational library works great, it doesn't really allow us to add more constraints, like the minimum. Remove that in order to be able to deal with the constraints we'll need. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Chen-Yu Tsai <wens@csie.org>
* clk: sunxi-ng: div: Allow to set a maximumMaxime Ripard2016-09-101-6/+10
| | | | | | | | | | | | | | Some dividers might have a maximum value that is lower than the width of the register. Add a field to _ccu_div to handle those case properly. If the field is set to 0, the code will assume that the maximum value is the maximum one that can be used with the field register width. Otherwise, we'll use whatever value has been set. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Chen-Yu Tsai <wens@csie.org>
* clk: sunxi-ng: Add N-M-factor clock supportMaxime Ripard2016-07-081-0/+114
Introduce support for clocks that multiply and divide using linear factors. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Michael Turquette <mturquette@baylibre.com> Link: lkml.kernel.org/r/20160629190535.11855-11-maxime.ripard@free-electrons.com
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