| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | clk: rockchip: only enter pll slow-mode directly before reboots on rk3288 | Heiko Stuebner | 2015-12-21 | 1 | -1/+1 |
| * | clk: rockchip: fix rk3368 cpuclk divider offsets | Heiko Stuebner | 2015-12-03 | 1 | -2/+2 |
| * | clk: rockchip: protect rk3368 aclk_bus and aclk_peri clocks | Jianqun xu | 2015-12-02 | 1 | -0/+2 |
| * | clk: rockchip: Force rk3368 PWM clock (and its parents) on | Caesar Wang | 2015-12-02 | 1 | -0/+5 |
| * | clk: rockchip: add critical clock for rk3368 | Heiko Stübner | 2015-09-14 | 1 | -0/+6 |
| * | clk: rockchip: add rk3368 clock controller | Heiko Stuebner | 2015-07-06 | 1 | -0/+881 |
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index : op-kernel-dev | |
| Development kernel branch for OpenPOWER systems | Raptor Engineering, LLC |
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