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path: root/drivers/clk/renesas
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* Merge tag 'clk-renesas-for-v4.14-tag1' of git://git.kernel.org/pub/scm/linux/...Stephen Boyd2017-08-2312-84/+560
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| * clk: renesas: r8a7796: Add USB3.0 clockHiromitsu Yamasaki2017-08-171-0/+1
| * clk: renesas: rcar-usb2-clock-sel: Add R-Car USB 2.0 clock selector PHYYoshihiro Shimoda2017-08-173-0/+194
| * clk: renesas: cpg-mssr: Add R8A77995 supportGeert Uytterhoeven2017-08-165-0/+249
| * clk: renesas: rcar-gen3: Add support for SCCG/Clean peripheral clocksGeert Uytterhoeven2017-08-162-1/+26
| * clk: renesas: rcar-gen3: Add divider support for PLL1 and PLL3Geert Uytterhoeven2017-08-164-37/+41
| * clk: renesas: rcar-gen3-cpg: Refactor checks for accessing the div tableWolfram Sang2017-07-191-26/+20
| * clk: renesas: rcar-gen3-cpg: Drop superfluous variableWolfram Sang2017-07-191-2/+1
| * clk: renesas: Allow compile-testing of all (sub)driversGeert Uytterhoeven2017-07-171-19/+19
| * clk: renesas: r8a7792: Add IMR-LX3/LSX3 clocksGeert Uytterhoeven2017-07-171-0/+7
| * clk: renesas: div6: Document fields used for parent selectionGeert Uytterhoeven2017-07-171-0/+3
* | clk: Convert to using %pOF instead of full_nameRob Herring2017-07-212-3/+2
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* clk: renesas: cpg-mssr: Use of_device_get_match_data() helperGeert Uytterhoeven2017-06-191-1/+1
* clk: renesas: r8a7794: Add new CPG/MSSR driverGeert Uytterhoeven2017-05-245-2/+266
* clk: renesas: r8a7792: Add new CPG/MSSR driverGeert Uytterhoeven2017-05-245-2/+232
* clk: renesas: r8a7791/r8a7793: Add new CPG/MSSR driverGeert Uytterhoeven2017-05-245-2/+302
* clk: renesas: r8a7790: Add new CPG/MSSR driverGeert Uytterhoeven2017-05-245-1/+298
* clk: renesas: Rework Kconfig and Makefile logicGeert Uytterhoeven2017-05-243-36/+134
* clk: renesas: cpg-mssr: Initialize error pointer using ERR_PTR()Geert Uytterhoeven2017-05-241-1/+1
* clk: renesas: r8a7795: Correct pwm, gpio, and i2c parent clocks on ES2.0Geert Uytterhoeven2017-05-151-13/+26
* clk: renesas: Use pm_clk_no_clocks() helper i.s.o. direct accessGeert Uytterhoeven2017-05-152-2/+2
* clk: renesas: Do not build clk-div6 for R8A7792Geert Uytterhoeven2017-05-151-1/+1
* clk: renesas: r8a7796: Add INTC-EX clockTakeshi Kihara2017-05-151-0/+1
* clk: renesas: r8a7796: Add PCIe clocksHarunobu Kurokawa2017-05-151-0/+2
* clk: renesas: r8a7796: Add PWM clockRyo Kodama2017-05-151-0/+1
* clk: renesas: r8a7796: Add HS-USB clockKazuya Mizuguchi2017-05-151-0/+1
* clk: renesas: r8a7796: Add Sound DVC clocksKazuya Mizuguchi2017-05-151-0/+2
* clk: renesas: r8a7796: Add Sound SRC clockKazuya Mizuguchi2017-05-151-0/+13
* clk: renesas: r8a7796: Add Sound SSI clockKazuya Mizuguchi2017-05-151-0/+11
* clk: renesas: r8a7796: Add USB-DMAC clocksHiromitsu Yamasaki2017-05-151-0/+2
* clk: renesas: r8a7796: Add Audio-DMAC clocksHiromitsu Yamasaki2017-05-151-0/+2
* clk: renesas: r8a7796: Add EHCI/OHCI clocksKazuya Mizuguchi2017-05-151-0/+2
* clk: renesas: r8a7796: Add HDMI clockKoji Matsuoka2017-05-151-0/+2
* clk: renesas: r8a7795: Add HS-USB ch3 clockTakeshi Kihara2017-05-151-0/+1
* clk: renesas: r8a7795: Add USB-DMAC ch3 clockTakeshi Kihara2017-05-151-0/+2
* clk: renesas: r8a7795: Add EHCI/OHCI ch3 clockTakeshi Kihara2017-05-151-0/+1
* clk: renesas: r8a7745: Remove PLL configs for MD19=0Geert Uytterhoeven2017-05-151-11/+2
* clk: renesas: r8a7745: Remove nonexisting scu-src[0789] clocksGeert Uytterhoeven2017-05-151-4/+0
* clk: renesas: rcar-gen2: Fix PLL0 on R-Car V2H and E2Geert Uytterhoeven2017-05-151-4/+19
* clk: renesas: rcar-gen3-cpg: Add support for RCLK on R-Car H3 ES2.0Geert Uytterhoeven2017-03-301-11/+27
* clk: renesas: r8a7795: Add support for R-Car H3 ES2.0Geert Uytterhoeven2017-03-301-50/+151
* clk: renesas: cpg-mssr: Add support for fixing up clock tablesGeert Uytterhoeven2017-03-302-0/+72
* clk: renesas: rcar-gen3: Add workaround for PLL0/2/4 errata on H3 ES1.0Geert Uytterhoeven2017-03-211-0/+24
* clk: renesas: rcar-gen3-cpg: Pass mode pins to rcar_gen3_cpg_init()Geert Uytterhoeven2017-03-214-4/+6
* clk: renesas: r8a7796: Reformat core clock tableGeert Uytterhoeven2017-03-211-6/+6
* clk: renesas: r8a7795: Reformat core clock tableGeert Uytterhoeven2017-03-211-10/+10
* clk: renesas: r8a7796: Correct name of watchdog clockGeert Uytterhoeven2017-03-211-1/+1
* clk: renesas: r8a7795: Correct name of watchdog clockGeert Uytterhoeven2017-03-211-1/+1
* clk: renesas: r8a7795: Correct parent clock and sort order for Audio DMACsGeert Uytterhoeven2017-03-211-2/+2
* clk: renesas: r8a7796: Add IMR clocksSergei Shtylyov2017-03-061-0/+2
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