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path: root/drivers/clk/ingenic
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* clk: Add Ingenic jz4770 CGU driverPaul Cercueil2018-01-182-0/+484
* clk: ingenic: Add code to enable/disable PLLsPaul Cercueil2018-01-181-15/+74
* clk: ingenic: support PLLs with no bypass bitPaul Cercueil2018-01-182-1/+4
* clk: ingenic: Fix recalc_rate for clocks with fixed dividerPaul Cercueil2018-01-181-0/+2
* clk: ingenic: Use const pointer to clk_ops in structPaul Cercueil2018-01-182-2/+2
* Update MIPS email addressesPaul Burton2017-11-034-4/+4
* clk: ingenic: Allow divider value to be dividedHarvey Hunt2016-05-124-34/+47
* clk: ingenic: Include clk.hStephen Boyd2015-07-201-0/+1
* clk: ingenic: add JZ4780 CGU supportPaul Burton2015-06-212-0/+734
* MIPS, clk: move jz4740 clock suspend, resume functions to jz4740-cguPaul Burton2015-06-211-0/+37
* MIPS, clk: move jz4740 UDC auto suspend functions to jz4740-cguPaul Burton2015-06-211-0/+22
* MIPS,clk: move jz4740_clock_set_wait_mode to jz4740-cguPaul Burton2015-06-211-0/+22
* MIPS,clk: migrate JZ4740 to common clock frameworkPaul Burton2015-06-212-0/+223
* clk: ingenic: add driver for Ingenic SoC CGU clocksPaul Burton2015-06-213-0/+935
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