summaryrefslogtreecommitdiffstats
path: root/drivers/clk/imx
Commit message (Expand)AuthorAgeFilesLines
* License cleanup: add SPDX GPL-2.0 license identifier to files with no licenseGreg Kroah-Hartman2017-11-026-0/+6
* clk: imx51: propagate rate across ipu_di*_selLucas Stach2017-08-311-4/+4
* clk: imx: constify clk_div_tableArvind Yadav2017-08-305-12/+12
* clk: imx7d: create clocks behind rawnand clock gateStefan Agner2017-06-191-2/+4
* clk: imx7d: Fix the DDR PLL enable bitFabio Estevam2017-06-061-1/+1
* clk: imx7d: Fix the powerdown bit location of PLL DDRFabio Estevam2017-06-013-1/+7
* clk: imx7d: fix USDHC NAND clockStefan Agner2017-04-191-2/+1
* clk: imx7d: add the missing ipg_root_clkDong Aisheng2017-04-191-1/+2
* clk: clk-imx7d: fix ahb clk definitionDong Aisheng2017-04-191-3/+2
* clk: imx: correct uart4_serial clock name in driver for i.MX6ULRobin van der Gracht2017-04-121-1/+1
* clk: imx: clk-imx6ul: The i.mx6ul has no aips_tz3 clockRobin van der Gracht2017-04-121-4/+5
*-. Merge branch 'clk-imx7', 'clk-bcm2835' into clk-nextStephen Boyd2017-01-261-0/+1
|\ \
| * | clk: imx7d: Add the OCOTP clockFabio Estevam2017-01-201-0/+1
| |/
* | clk: imx6: don't restrict LDB mux changes on QuadPlusLucas Stach2017-01-201-8/+13
* | clk: imx: pllv3: support fractional multiplier on vf610 PLL1/PLL2Nikita Yushchenko2017-01-093-2/+102
|/
* Merge tag 'armsoc-fixes-nc' of git://git.kernel.org/pub/scm/linux/kernel/git/...Linus Torvalds2016-12-151-26/+26
|\
| * ARM: clk: imx31: properly init clocks for machines with DTVladimir Zapolskiy2016-11-011-24/+26
| * clk: imx31: fix rewritten input argument of mx31_clocks_init()Vladimir Zapolskiy2016-11-011-3/+1
* | Merge tag 'imx-clk-4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/sha...Stephen Boyd2016-11-163-21/+342
|\ \
| * | clk: imx: clk-imx6ul: add clk support for imx6ullBai Ping2016-11-151-11/+61
| * | clk: imx6: Fix procedure to switch the parent of LDB_DI_CLKFabio Estevam2016-11-011-5/+259
| * | clk: imx6: Make the LDB_DI0 and LDB_DI1 clocks read-onlyPhilipp Zabel2016-11-012-8/+10
| * | clk: imx6: Mask mmdc_ch1 handshake for periph2_sel and mmdc_ch1_axi_podfPhilipp Zabel2016-11-011-0/+15
| |/
* | clk: imx: improve precision of AV PLL to 1 HzEmil Lundmark2016-11-011-0/+8
* | clk: imx: fix integer overflow in AV PLL round rateEmil Lundmark2016-11-011-2/+6
|/
* Merge tag 'armsoc-cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/a...Linus Torvalds2016-10-071-41/+5
|\
| * ARM: i.MX: Remove i.MX1 non-DT supportAlexander Shiyan2016-08-091-41/+5
* | clk: imx6: initialize GPU clocksLucas Stach2016-09-201-0/+18
* | clk: imx6: fix i.MX6DL clock tree to reflect realityLucas Stach2016-09-201-12/+16
* | clk: imx53: Add clocks configurationKalle Kankare2016-09-201-0/+20
* | ARM: clk-imx35: annotate clk enum with number valuesUwe Kleine-König2016-09-141-14/+16
* | ARM: clk-imx35: fix name for ckil clkUwe Kleine-König2016-09-141-1/+1
* | clk: imx7d: Add PLL_AUDIO_TEST_DIV/POST_DIV clocksFabio Estevam2016-08-301-40/+61
* | clk: imx7d: Add SAI IPG clocksFabio Estevam2016-08-191-3/+10
* | clk: imx: Introduce clk_register_gate2()Fabio Estevam2016-08-191-0/+9
* | clk: imx7d: Add the clock for SDMAFabio Estevam2016-08-191-0/+1
* | clk: imx7d: do not set the parent of IMX7D_ENET_AXI_ROOT_SRCFabio Estevam2016-08-111-2/+0
|/
* clk: imx7d: do not set parent of ethernet time/ref clocksStefan Agner2016-07-121-9/+0
* clk: imx: vf610: Disable automatic clock gating for lpuart in LPSTOP modeStefan Agner2016-07-081-6/+6
* clk: imx7d: only enable minimum required clocksDong Aisheng2016-07-011-8/+10
* clk: imx7d: using api with flag CLK_OPS_PARENT_ENABLEDong Aisheng2016-07-011-357/+357
* clk: imx: add clk api for supporting CLK_OPS_PARENT_ENABLE clocksDong Aisheng2016-07-011-0/+32
* clk: imx: re-order and concentrate the same type of clk apiDong Aisheng2016-07-011-29/+29
* clk: imx6ul: fix gpt2 clock namesDong Aisheng2016-06-161-2/+2
* clk: imx: refine the powerdown bit of clk-pllv3Dong Aisheng2016-06-161-10/+10
* clk: imx: clk-pllv3: fix incorrect handle of enet powerdown bitDong Aisheng2016-06-131-4/+4
* clk: imx: fix pll clock parentsDong Aisheng2016-06-125-34/+34
* clk: imx7d: correct dram pll typeAnson Huang2016-06-121-1/+1
* clk: imx7d: correct dram root clk parent selectAnson Huang2016-06-121-1/+1
* clk: imx: correct AV PLL rate formulaAnson Huang2016-06-121-2/+6
OpenPOWER on IntegriCloud