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path: root/drivers/clk/clk-vt8500.c
Commit message (Expand)AuthorAgeFilesLines
* clk: vt8500: Fix unbalanced spinlock in vt8500_dclk_set_rate()Tony Prisk2013-05-291-1/+1
* Merge tag 'clk-for-linus-3.10' of git://git.linaro.org/people/mturquette/linuxLinus Torvalds2013-04-291-0/+2
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| * clk: vt8500: Missing breaks in vtwm_pll_round_rate/_set_rate.Tony Prisk2013-04-141-0/+2
* | clk: vt8500: Fix "fix device clock divisor calculations"Arnd Bergmann2013-03-141-1/+1
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* clk: vt8500: Use common of_clk_init() functionPrashant Gaikwad2013-01-241-12/+5
* clk: vt8500: Add support for WM8750/WM8850 PLL clocksTony Prisk2013-01-151-2/+100
* clk: vt8500: Fix division-by-0 when requested rate=0Tony Prisk2013-01-151-2/+12
* clk: vt8500: Fix device clock divisor calculationsTony Prisk2013-01-151-0/+8
* clk: vt8500: Fix error in PLL calculations on non-exact match.Tony Prisk2013-01-151-3/+3
* CLK: vt8500: Fix SDMMC clk special casesTony Prisk2012-11-091-0/+18
* arm: vt8500: clk: Add Common Clock Framework supportTony Prisk2012-09-211-0/+510
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