| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | clk: bcm: Remove CLK_IS_ROOT | Stephen Boyd | 2016-03-02 | 1 | -6/+3 |
| * | clk: bcm2835: added missing clock register definitions | Martin Sperl | 2016-02-25 | 1 | -0/+13 |
| * | clk: bcm2835: Reuse CLK_DIVIDER_MAX_AT_ZERO for recalc_rate() | Eric Anholt | 2016-02-16 | 1 | -11/+2 |
| * | clk: bcm2835: Fix setting of PLL divider clock rates | Eric Anholt | 2016-02-16 | 1 | -5/+7 |
| * | clk: bcm2835: Add PWM clock support | Remi Pommarel | 2015-12-24 | 1 | -0/+13 |
| * | clk: bcm2835: Support for clock parent selection | Remi Pommarel | 2015-12-24 | 1 | -45/+77 |
| * | clk: bcm2835: add a round up ability to the clock divisor | Remi Pommarel | 2015-12-24 | 1 | -10/+12 |
| * | clk: bcm2835: Add support for programming the audio domain clocks | Eric Anholt | 2015-10-12 | 1 | -1/+1521 |
| * | clk: bcm2835: Move under bcm/ with other Broadcom SoC clk drivers. | Eric Anholt | 2015-10-01 | 1 | -0/+55 |
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index : op-kernel-dev | |
| Development kernel branch for OpenPOWER systems | Raptor Engineering, LLC |
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