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* drm/i915: add more Haswell PCI IDsPaulo Zanoni2012-08-072-6/+93
| | | | | | | | Also properly indent the HB IDs. Reviewed-by: Rodrigo Vivi <rodrigo.vivi@gmail.com> Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
* agp/intel-agp: remove snb+ host bridge pciidsDaniel Vetter2012-06-251-11/+0
| | | | | | | | drm/i915 now takes care itself of setting up the gtt for these chips. Reviewed-by: Eugeni Dodonov <eugeni.dodonov@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
* Merge tag 'v3.5-rc4' into drm-intel-next-queuedDaniel Vetter2012-06-252-0/+2
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | I want to merge the "no more fake agp on gen6+" patches into drm-intel-next (well, the last pieces). But a patch in 3.5-rc4 also adds a new use of dev->agp. Hence the backmarge to sort this out, for otherwise drm-intel-next merged into Linus' tree would conflict in the relevant code, things would compile but nicely OOPS at driver load :( Conflicts in this merge are just simple cases of "both branches changed/added lines at the same place". The only tricky part is to keep the order correct wrt the unwind code in case of errors in intel_ringbuffer.c (and the MI_DISPLAY_FLIP #defines in i915_reg.h together, obviously). Conflicts: drivers/gpu/drm/i915/i915_reg.h drivers/gpu/drm/i915/intel_ringbuffer.c Signed-Off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
| * char/agp: add another Ironlake host bridgeEugeni Dodonov2012-06-062-0/+2
| | | | | | | | | | | | | | | | | | | | This seems to come on Gigabyte H55M-S2V and was discovered through the https://bugs.freedesktop.org/show_bug.cgi?id=50381 debugging. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=50381 Signed-off-by: Eugeni Dodonov <eugeni.dodonov@intel.com> Cc: stable@vger.kernel.org Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
* | agp/intel: use correct GTT offset on VLVJesse Barnes2012-06-201-0/+1
| | | | | | | | | | | | | | | | VLV is a gen7 device, but we don't currently handle that in the switch. So add it and write the PTEs correctly. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
* | agp/intel: allow cacheable and GDFT PTEs on ValleyViewJesse Barnes2012-06-201-2/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The PTE format is similar to SNB, but we don't support an MLC and don't need chipset flushing. Note: I have my questions whether this is right, given that MLC died for snb & ivb, that ivb has grown a L3$ cache instead (which vlv seems to have, too) and that the LLC bit here isn't actually LLC, but just means 'snoop cpu caches'. But I plan to burn this all with the heat of a thousands suns in my gtt rework, so who cares ;-) Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> [danvet: Added note.] Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
* | drm/i915: call intel_enable_gttDaniel Vetter2012-06-121-1/+2
| | | | | | | | | | | | | | | | When drm/i915 is in control of the gtt, we need to call the enable function at all the relevant places ourselves. Reviewed-by: Jani Nikula <jani.nikula@linux.intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
* | agp/intel-gtt: move gart base addres setupDaniel Vetter2012-06-121-10/+10
| | | | | | | | | | | | | | | | | | We need this thing much earlier, and it doesn't make sense in the hw enabling function intel_enable_gtt - this does not change over a suspend/resume cycle ... Reviewed-by: Jani Nikula <jani.nikula@linux.intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
* | drm/i915 + agp/intel-gtt: prep work for direct setupDaniel Vetter2012-06-123-14/+40
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | To be able to directly set up the intel-gtt code from drm/i915 and avoid setting up the fake-agp driver we need to prepare a few things: - pass both the bridge and gpu pci_dev to the probe function and add code to handle the gpu pdev both being present (for drm/i915) and not present (fake agp). - add refcounting to the remove function so that unloading drm/i915 doesn't kill the fake agp driver v2: Fix up the cleanup and refcount, noticed by Jani Nikula. Reviewed-by: Jani Nikula <jani.nikula@linux.intel.com> Signed-Off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
* | agp/intel-gtt: don't require the agp bridge on setupDaniel Vetter2012-06-121-3/+5
| | | | | | | | | | | | | | | | | | | | | | We only need it to fake the agp interface and don't actually use it in the driver anywhere. Hence conditionalize that. This is just a prep patch to eventually disable the fake agp driver on gen6+. Reviewed-by: Jani Nikula <jani.nikula@linux.intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
* | drm/i915: stop using dev->agp->baseDaniel Vetter2012-06-121-3/+2
| | | | | | | | | | | | | | | | | | For that to work we need to export the base address of the gtt mmio window from intel-gtt. Also replace all other uses of dev->agp by values we already have at hand. Reviewed-by: Jani Nikula <jani.nikula@linux.intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
* | agp/intel-gtt: remove dead codeDaniel Vetter2012-06-121-3/+0
|/ | | | | | | | This is a leftover from the conversion of the i81x fake agp driver over to the new intel-gtt code layoute. Reviewed-by: Jani Nikula <jani.nikula@linux.intel.com> Signed-Off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
* drm/i915: hook Haswell devices in placeEugeni Dodonov2012-05-191-0/+4
| | | | | | | | This patch enables i915 driver to handle Haswell devices. It should go in last, when things are working stable enough. Signed-off-by: Eugeni Dodonov <eugeni.dodonov@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
* agp: Use u32 __iomem annotation to silence sparse warning.Santosh Nayak2012-04-121-1/+1
| | | | | | | Replace "void *" by "u32 __iomem *" to silence sparse warning. Signed-off-by: Santosh Nayak <santoshprasadnayak@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
* agp: Remove 'break' after 'return' statement.Santosh Nayak2012-04-122-3/+0
| | | | | | | | 'break' is unnecessary after 'return' statement. Remove all such 'break' as clean up. Signed-off-by: Santosh Nayak <santoshprasadnayak@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
* Merge branch 'drm-intel-next' of ↵Dave Airlie2012-04-123-1/+59
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://people.freedesktop.org/~danvet/drm-intel into drm-core-next Daniel Vetter wrote First pull request for 3.5-next, slightly large than usual because new things kept coming in since the last pull for 3.4. Highlights: - first batch of hw enablement for vlv (Jesse et al) and hsw (Eugeni). pci ids are not yet added, and there's still quite a few patches to merge (mostly modesetting). To make QA easier I've decided to merge this stuff in pieces. - loads of cleanups and prep patches spurred by the above. Especially vlv is a real frankenstein chip, but also hsw is stretching our driver's code design. Expect more to come in this area for 3.5. - more gmbus fixes, cleanups and improvements by Daniel Kurtz. Again, there are more patches needed (and some already queued up), but I wanted to split this a bit for better testing. - pwrite/pread rework and retuning. This series has been in the works for a few months already and a lot of i-g-t tests have been created for it. Now it's finally ready to be merged. Note that one patch in this series touches include/pagemap.h, that patch is acked-by akpm. - reduce mappable pressure and relocation throughput improvements from Chris. - mmap offset exhaustion mitigation by Chris Wilson. - a start at figuring out which codepaths in our messy dri1/ums+gem/kms driver we actually need to support by bailing out of unsupported case. The driver now refuses to load without kms on gen6+ and disallows a few ioctls that userspace never used in certain cases. More of this will definitely come. - More decoupling of global gtt and ppgtt. - Improved dual-link lvds detection by Takashi Iwai. - Shut up the compiler + plus fix the fallout (Ben) - Inverted panel brightness handling (mostly Acer manages to break things in this way). - Small fixlets and adjustements and some minor things to help debugging. Regression-wise QA reported quite a few issues on ivb, but all of them turned out to be hw stability issues which are already fixed in drm-intel-fixes (QA runs the nightly regression tests on -next alone, without -fixes automatically merged in). There's still one issue open on snb, it looks like occlusion query writes are not quite as cache coherent as we've expected. With some of the pwrite adjustements we can now reliably hit this. Kernel workaround for it is in the works." * 'drm-intel-next' of git://people.freedesktop.org/~danvet/drm-intel: (101 commits) drm/i915: VCS is not the last ring drm/i915: Add a dual link lvds quirk for MacBook Pro 8,2 drm/i915: make quirks more verbose drm/i915: dump the DMA fetch addr register on pre-gen6 drm/i915/sdvo: Include YRPB as an additional TV output type drm/i915: disallow gem init ioctl on ilk drm/i915: refuse to load on gen6+ without kms drm/i915: extract gt interrupt handler drm/i915: use render gen to switch ring irq functions drm/i915: rip out old HWSTAM missed irq WA for vlv drm/i915: open code gen6+ ring irqs drm/i915: ring irq cleanups drm/i915: add SFUSE_STRAP registers for digital port detection drm/i915: add WM_LINETIME registers drm/i915: add WRPLL clocks drm/i915: add LCPLL control registers drm/i915: add SSC offsets for SBI access drm/i915: add port clock selection support for HSW drm/i915: add S PLL control drm/i915: add PIXCLK_GATE register ... Conflicts: drivers/char/agp/intel-agp.h drivers/char/agp/intel-gtt.c drivers/gpu/drm/i915/i915_debugfs.c
| * drm/i915: add Haswell devices and their PCI IDsEugeni Dodonov2012-04-092-0/+25
| | | | | | | | | | | | | | | | | | This adds product definitions for desktop, mobile and server boards. v2: split into a separate patch, add .has_pch_split feature. Signed-off-by: Eugeni Dodonov <eugeni.dodonov@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
| * agp/intel: add ValleyView AGP driverJesse Barnes2012-03-293-0/+29
| | | | | | | | | | | | | | | | | | | | | | | | ... and bind it right to the PCI id. Note that there are still a few things to fix here: - we need to move the tlb flush to a better place in drm/i915. - we need to check snoop support on vlv and implement it. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> [danvet: squash follow-on patch and add todo items to commit msg.] Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
| * agp/intel: map more registers for use by the GTT codeJesse Barnes2012-03-291-1/+5
| | | | | | | | | | | | | | | | | | | | | | We need to flush the Gunit TLB when we update GTT PTEs on VLV, but the register for doing so is above the range we normally map. Map the whole register space to make sure we can get it. v2: only map the larger space on gen7+ (Daniel) Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
* | drm/i915: disable ppgtt on snb when dmar is enabledDaniel Vetter2012-04-021-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | Totally unexpected that this regressed. Luckily it sounds like we just need to have dmar disable on the igfx, not the entire system. At least that's what a few days of testing between Tony Vroon and me indicates. Reported-by: Tony Vroon <tony@linx.net> Cc: Tony Vroon <tony@linx.net> Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=43024 Acked-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-Off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
* | drm/i915: add Ivy Bridge GT2 Server entriesEugeni Dodonov2012-04-022-0/+3
|/ | | | | | | | This adds PCI ID for IVB GT2 server variant which we were missing. Signed-off-by: Eugeni Dodonov <eugeni.dodonov@intel.com> [danvet: fix up conflict because the patch has been diffed against next. tsk.] Signed-Off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
* Merge remote-tracking branch 'airlied/drm-fixes' into drm-intel-next-queuedDaniel Vetter2012-02-103-8/+8
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Back-merge from drm-fixes into drm-intel-next to sort out two things: - interlaced support: -fixes contains a bugfix to correctly clear interlaced configuration bits in case the bios sets up an interlaced mode and we want to set up the progressive mode (current kernels don't support interlaced). The actual feature work to support interlaced depends upon (and conflicts with) this bugfix. - forcewake voodoo to workaround missed IRQ issues: -fixes only enabled this for ivybridge, but some recent bug reports indicate that we need this on Sandybridge, too. But in a slightly different flavour and with other fixes and reworks on top. Additionally there are some forcewake cleanup patches heading to -next that would conflict with currrent -fixes. Signed-Off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
| * agp: fix scratch page cleanupMichal Kubecek2012-01-261-6/+6
| | | | | | | | | | | | | | | | | | | | In error cleanup of agp_backend_initialize() and in agp_backend_cleanup(), agp_destroy_page() is passed virtual address of the scratch page. This leads to a kernel warning if the initialization fails (or upon regular cleanup) as pointer to struct page should be passed instead. Signed-off-by: Michal Kubecek <mkubecek@suse.cz> Signed-off-by: Dave Airlie <airlied@redhat.com>
| * module_param: make bool parameters really bool (drivers & misc)Rusty Russell2012-01-132-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | module_param(bool) used to counter-intuitively take an int. In fddd5201 (mid-2009) we allowed bool or int/unsigned int using a messy trick. It's time to remove the int/unsigned int option. For this version it'll simply give a warning, but it'll break next kernel version. Acked-by: Mauro Carvalho Chehab <mchehab@redhat.com> Signed-off-by: Rusty Russell <rusty@rustcorp.com.au>
* | agp/intel-gtt: export the gtt pagetable iomappingDaniel Vetter2012-02-091-0/+1
| | | | | | | | | | | | | | | | | | | | | | We need this because ppgtt page directory entries need to be in the global gtt pagetable. Reviewed-by: Ben Widawsky <ben@bwidawsk.net> Tested-by: Chris Wilson <chris@chris-wilson.co.uk> Tested-by: Eugeni Dodonov <eugeni.dodonov@intel.com> Reviewed-by: Eugeni Dodonov <eugeni.dodonov@intel.com> Signed-Off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
* | agp/intel-gtt: export the scratch page dma addressDaniel Vetter2012-02-091-5/+4
| | | | | | | | | | | | | | | | | | | | | | To implement a PPGTT for drm/i915 that fully aliases the GTT, we also need to properly alias the scratch page. Reviewed-by: Ben Widawsky <ben@bwidawsk.net> Tested-by: Chris Wilson <chris@chris-wilson.co.uk> Tested-by: Eugeni Dodonov <eugeni.dodonov@intel.com> Reviewed-by: Eugeni Dodonov <eugeni.dodonov@intel.com> Signed-Off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
* | agp/intel: Add pci id for hostbridge from has/qemuBen Widawsky2012-01-171-0/+1
|/ | | | | | | | | This is needed to run the simulator. Cc: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Ben Widawsky <ben@bwidawsk.net> [danvet: added a comment in case people wonder what it's for.] Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
* agp: Fix multi-line warning message whitespaceTormod Volden2012-01-061-4/+4
| | | | | | Signed-off-by: Tormod Volden <debian.tormod@gmail.com> Reviewed-by: Corbin Simpson <MostAwesomeDude@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
* agp: iommu_gfx_mapped only available if CONFIG_INTEL_IOMMU is setKeith Packard2011-11-081-2/+3
| | | | | | | | | | | Kernels with no iommu support cannot ever need the Ironlake work-around, so never enable it in that case. Might be better to completely remove the work-around from the kernel in this case? Signed-off-by: Keith Packard <keithp@keithp.com> Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
* drm/i915: fix if statement (bogus semi-colon)Dan Carpenter2011-11-081-1/+1
| | | | | | | | The semi-colon is a typo here and it makes the if statement unconditional. Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Keith Packard <keithp@keithp.com>
* Merge branch 'misc-3.2' of ↵Linus Torvalds2011-11-021-2/+4
|\ | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/aegl/linux * 'misc-3.2' of git://git.kernel.org/pub/scm/linux/kernel/git/aegl/linux: MAINTAINERS: Update entry for IA64 [IA64] gpio: GENERIC_GPIO default must be n [IA64[ add CONFIG_NET_VENDOR_INTEL=y to default config files where needed [IA64] agp/hp-agp: Allow binding user memory to the AGP GART [IA64] sn2: add missing put_cpu()
| * [IA64] agp/hp-agp: Allow binding user memory to the AGP GARTÉmeric Maschino2011-08-231-2/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | dmesg reports: [   29.365973] [TTM] AGP Bind memory failed. [   29.366015] radeon 0000:80:00.0: object_init failed for (4096, 0x00000002) [   29.366052] radeon 0000:80:00.0: (-22) create WB bo failed [   29.366087] radeon 0000:80:00.0: Disabling GPU acceleration [   29.366124] [drm] radeon: cp finalized [   29.366168] [drm] radeon: cp finalized [   29.366210] [TTM] Finalizing pool allocator. [   29.366924] [TTM] Zone  kernel: Used memory at exit: 0 kiB. [   29.366961] [TTM] Zone   dma32: Used memory at exit: 0 kiB. [   29.366996] [drm] radeon: ttm finalized [   29.367030] [drm] Forcing AGP to PCI mode This patch allows binding user memory to the AGP GART on zx1-based systems. dmesg thus no more complains about AGP bind memory failure, disabled GPU acceleration or AGP mode forced to PCI. Original work from Francisco Jerez in agp/amd-k7 (https://lkml.org/lkml/2010/10/15/469). Tested-by: Émeric Maschino <emeric.maschino@gmail.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
* | Merge branch 'drm-core-next' of git://people.freedesktop.org/~airlied/linuxLinus Torvalds2011-10-281-0/+28
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'drm-core-next' of git://people.freedesktop.org/~airlied/linux: (290 commits) Revert "drm/ttm: add a way to bo_wait for either the last read or last write" Revert "drm/radeon/kms: add a new gem_wait ioctl with read/write flags" vmwgfx: Don't pass unused arguments to do_dirty functions vmwgfx: Emulate depth 32 framebuffers drm/radeon: Lower the severity of the radeon lockup messages. drm/i915/dp: Fix eDP on PCH DP on CPT/PPT drm/i915/dp: Introduce is_cpu_edp() drm/i915: use correct SPD type value drm/i915: fix ILK+ infoframe support drm/i915: add DP test request handling drm/i915: read full receiver capability field during DP hot plug drm/i915/dp: Remove eDP special cases from bandwidth checks drm/i915/dp: Fix the math in intel_dp_link_required drm/i915/panel: Always record the backlight level again (but cleverly) i915: Move i915_read/write out of line drm/i915: remove transcoder PLL mashing from mode_set per specs drm/i915: if transcoder disable fails, say which drm/i915: set watermarks for third pipe on IVB drm/i915: export a CPT mode set verification function drm/i915: fix transcoder PLL select masking ...
| * | drm/i915: ILK + VT-d workaroundBen Widawsky2011-10-201-0/+28
| |/ | | | | | | | | | | | | | | | | | | | | Idle the GPU before doing any unmaps. We know if VT-d is in use through an exported variable from iommu code. This should avoid a known HW issue. Signed-off-by: Ben Widawsky <ben@bwidawsk.net> Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Keith Packard <keithp@keithp.com>
* | Merge branch 'core-iommu-for-linus' of ↵Linus Torvalds2011-10-261-2/+2
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip * 'core-iommu-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: x86, ioapic: Consolidate the explicit EOI code x86, ioapic: Restore the mask bit correctly in eoi_ioapic_irq() x86, kdump, ioapic: Reset remote-IRR in clear_IO_APIC iommu: Rename the DMAR and INTR_REMAP config options x86, ioapic: Define irq_remap_modify_chip_defaults() x86, msi, intr-remap: Use the ioapic set affinity routine iommu: Cleanup ifdefs in detect_intel_iommu() iommu: No need to set dmar_disabled in check_zero_address() iommu: Move IOMMU specific code to intel-iommu.c intr_remap: Call dmar_dev_scope_init() explicitly x86, x2apic: Enable the bios request for x2apic optout
| * | iommu: Rename the DMAR and INTR_REMAP config optionsSuresh Siddha2011-09-211-2/+2
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Change the CONFIG_DMAR to CONFIG_INTEL_IOMMU to be consistent with the other IOMMU options. Rename the CONFIG_INTR_REMAP to CONFIG_IRQ_REMAP to match the irq subsystem name. And define the CONFIG_DMAR_TABLE for the common ACPI DMAR routines shared by both CONFIG_INTEL_IOMMU and CONFIG_IRQ_REMAP. Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com> Cc: yinghai@kernel.org Cc: youquan.song@intel.com Cc: joerg.roedel@amd.com Cc: tony.luck@intel.com Cc: dwmw2@infradead.org Link: http://lkml.kernel.org/r/20110824001456.558630224@sbsiddha-desk.sc.intel.com Signed-off-by: Ingo Molnar <mingo@elte.hu>
* | char: Convert vmalloc/memset to vzallocJoe Perches2011-09-151-2/+1
|/ | | | | Signed-off-by: Joe Perches <joe@perches.com> Signed-off-by: Jiri Kosina <jkosina@suse.cz>
* agp/intel: Fix typo in G4x_GMCH_SIZE_VT_2MChris Wilson2011-07-131-3/+4
| | | | | | | | | | | | Konstantin Belousov found an error in the define of G4x_GMCH_SIZE_VT_2M relative to the GMCH specs, and confirmed that indeed one of his users with a Q45 reports 0xb not 0xc for a 2/2MiB GATT. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Konstantin Belousov <kostikbel@gmail.com> Cc: Daniel Vetter <daniel.vetter@ffwll.ch> Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Dave Airlie <airlied@redhat.com>
* agp/uninorth: Fix lockups with radeon KMS and >1x.Michel Dänzer2011-05-221-1/+1
| | | | | | | | | | | | | | | | | | | This was based on a description by Ben Herrenschmidt: > I've removed that SBA reset from the normal TLB invalidation path and > left it only once after turning AGP on. About six months ago, he said: > I did it a bit differently, but yeah, you get the idea. I'm doing a > patch series so don't bother pushing things too hard yet. But I haven't seen anything from him about this since then, and people are regularly hitting these lockups, so here we are... Signed-off-by: Michel Dänzer <daenzer@vmware.com> Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Dave Airlie <airlied@gmail.com>
* agp/intel: add Ivy Bridge supportJesse Barnes2011-05-133-0/+21
| | | | | | | | Just use the Sandy Bridge routines. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Reviewed-by: Keith Packard <keithp@keithp.com> Signed-off-by: Keith Packard <keithp@keithp.com>
* agp: fix arbitrary kernel memory writesVasiliy Kulikov2011-04-211-3/+8
| | | | | | | | | | | | pg_start is copied from userspace on AGPIOC_BIND and AGPIOC_UNBIND ioctl cmds of agp_ioctl() and passed to agpioc_bind_wrap(). As said in the comment, (pg_start + mem->page_count) may wrap in case of AGPIOC_BIND, and it is not checked at all in case of AGPIOC_UNBIND. As a result, user with sufficient privileges (usually "video" group) may generate either local DoS or privilege escalation. Signed-off-by: Vasiliy Kulikov <segoon@openwall.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
* agp: fix OOM and buffer overflowVasiliy Kulikov2011-04-211-1/+7
| | | | | | | | | | | | | | | | | | | page_count is copied from userspace. agp_allocate_memory() tries to check whether this number is too big, but doesn't take into account the wrap case. Also agp_create_user_memory() doesn't check whether alloc_size is calculated from num_agp_pages variable without overflow. This may lead to allocation of too small buffer with following buffer overflow. Another problem in agp code is not addressed in the patch - kernel memory exhaustion (AGPIOC_RESERVE and AGPIOC_ALLOCATE ioctls). It is not checked whether requested pid is a pid of the caller (no check in agpioc_reserve_wrap()). Each allocation is limited to 16KB, though, there is no per-process limit. This might lead to OOM situation, which is not even solved in case of the caller death by OOM killer - the memory is allocated for another (faked) process. Signed-off-by: Vasiliy Kulikov <segoon@openwall.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
* Fix common misspellingsLucas De Marchi2011-03-314-4/+4
| | | | | | Fixes generated by 'codespell' and manually reviewed. Signed-off-by: Lucas De Marchi <lucas.demarchi@profusion.mobi>
* Merge branch 'drm-intel-fixes' of ↵Dave Airlie2011-02-242-35/+22
|\ | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/ickle/drm-intel into drm-fixes * 'drm-intel-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/ickle/drm-intel: drm/i915: fix corruptions on i8xx due to relaxed fencing drm/i915: skip FDI & PCH enabling for DP_A agp/intel: Experiment with a 855GM GWB bit drm/i915: don't enable FDI & transcoder interrupts after all drm/i915: Ignore a hung GPU when flushing the framebuffer prior to a switch
| * agp/intel: Experiment with a 855GM GWB bitChris Wilson2011-02-222-35/+22
| | | | | | | | | | | | | | | | | | Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=27187 Tested-by: Thorsten Vollmer <thorsten@thvo.de> (DFI-ACP G5M150-N w/852GME) Tested-by: Moritz Brunner <2points@gmx.org> (Asus M2400N/i855GM) Tested-by: Indan Zupancic <indan@nul.nu> (Thinkpad X40/855GM rev 02) Tested-by: Eric Anholt <eric@anholt.net> (865G) Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
* | amd64-agp: fix crash at second module loadFlorian Mickler2011-02-231-2/+7
|/ | | | | | | | | | | The module forgot to sometimes unregister some resources. This fixes Bug #22882. [Patch updated to 2.6.38-rc3 by Randy Dunlap.] Tested-by: Randy Dunlap <randy.dunlap@oracle.com> Signed-off-by: Florian Mickler <florian@mickler.org> Signed-off-by: Dave Airlie <airlied@redhat.com>
* agp: ensure GART has an address before enabling itStephen Kitt2011-02-041-11/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Some BIOSs (eg. the AMI BIOS on the Asus P4P800 motherboard) don't initialise the GART address, and pcibios_assign_resources() can ignore it because it can be marked as a host bridge (see https://bugzilla.kernel.org/show_bug.cgi?id=24392#c5 for details). This was handled correctly up to 2.6.35, but the pci_enable_device() cleanup in 2.6.36 96576a9e1a0cdb8 ("agp: intel-agp: do not use PCI resources before pci_enable_device()") means that the kernel tries to enable the GART before assigning it an address; in such cases the GART overlaps with other device assignments and ends up being disabled. This patch fixes https://bugzilla.kernel.org/show_bug.cgi?id=24392 Note that I imagine efficeon-agp.c probably has the same problem, but I can't test that and I'd like to make sure this patch is suitable for -stable (since 2.6.36 and 2.6.37 are affected). Signed-off-by: Stephen Kitt <steve@sk2.org> Cc: Bjorn Helgaas <bjorn.helgaas@hp.com> Cc: Maciej Rutecki <maciej.rutecki@gmail.com> Cc: "Rafael J. Wysocki" <rjw@sisk.pl> Cc: Kulikov Vasiliy <segooon@gmail.com> Cc: Florian Mickler <florian@mickler.org> Cc: <stable@kernel.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Dave Airlie <airlied@redhat.com>
* Revert "agp: AMD AGP is used on UP1100 & UP1500 alpha boxen"Matt Turner2011-02-041-1/+1
| | | | | | | | | | | | | | | | | | | | This reverts commit f191f144079b0083c6fa7d01a4acbd7263fb5032. The AMD 751 and 761 chipsets are used on the UP1000, UP1100, and UP1500 OEM motherboards, but they neglect to do anything to make AGP work. According to Ivan Kokshaysky: There is quite fundamental conflict between the Alpha architecture and x86 AGP implementation - Alpha is entirely cache coherent by design, while x86 AGP is not (I mean native AGP DMA transactions, not a PCI over AGP). There are no such things as non-cacheable mappings or software support for cache flushing/invalidation on Alpha, so x86 AGP code won't work on Nautilus. So there's no point in allowing this driver to be configured on Alpha. Signed-off-by: Matt Turner <mattst88@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
* amd-k7-agp: remove non-x86 codeMatt Turner2011-02-041-19/+0
| | | | | | | | amd-k7-agp can't be built on Alpha anymore, so remove now unnecessary code. Signed-off-by: Matt Turner <mattst88@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
* drm/i915,agp/intel: Do not clear stolen entriesChris Wilson2011-01-241-10/+9
| | | | | | | | | | | | | We can only utilize the stolen portion of the GTT if we are in sole charge of the hardware. This is only true if using GEM and KMS, otherwise VESA continues to access stolen memory. Reported-by: Arnd Bergmann <arnd@arndb.de> Reported-by: Frederic Weisbecker <fweisbec@gmail.com> Tested-by: Jiri Olsa <jolsa@redhat.com> Tested-by: Frederic Weisbecker <fweisbec@gmail.com> Cc: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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