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* 'next/devel' of git://git.linaro.org/people/arnd/arm-soc: (50 commits)
ARM: tegra: update defconfig
arm/tegra: Harmony: Configure PMC for low-level interrupts
arm/tegra: device tree support for ventana board
arm/tegra: add support for ventana pinmuxing
arm/tegra: prepare Seaboard pinmux code for derived boards
arm/tegra: pinmux: ioremap registers
gpio/tegra: Convert to a platform device
arm/tegra: Convert pinmux driver to a platform device
arm/dt: Tegra: Add pinmux node to tegra20.dtsi
arm/tegra: Prep boards for gpio/pinmux conversion to pdevs
ARM: mx5: fix clock usage for suspend
ARM i.MX entry-macro.S: remove now unused code
ARM i.MX boards: use CONFIG_MULTI_IRQ_HANDLER
ARM i.MX tzic: add handle_irq function
ARM i.MX avic: add handle_irq function
ARM: mx25: Add the missing IIM base definition
ARM i.MX avic: convert to use generic irq chip
mx31moboard: Add poweroff support
ARM: mach-qong: Add watchdog support
ARM: davinci: AM18x: Add wl1271/wlan support
...
Fix up conflicts in:
arch/arm/mach-at91/at91sam9g45.c
arch/arm/mach-mx5/devices-imx53.h
arch/arm/plat-mxc/include/mach/memory.h
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Conflicts:
arch/arm/mach-mxs/include/mach/gpio.h
arch/arm/plat-mxc/include/mach/gpio.h
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Refresh tegra_defconfig:
New options enabled: RTC, SPI, USB and USB_STORAGE together with
corresponding tegra drivers. Also enable some of the common usb ethernet
adapters.
Enable Tegra ALSA/ASoC/sound support, including drivers for TrimSlice,
and WM8903-based platforms such as Harmony and Seaboard.
Finally, enable new merged boards (Ventana) and the generic devicetree board.
Signed-off-by: Olof Johansson <olof@lixom.net>
Acked-by: Stephen Warren <swarren@nvidia.com>
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Without this, the PMC continually detects an interrupt when the PMU_IRQ
line is high, causing the tps6686x IRQ handler thread to hog an entire
CPU.
This change was originally written by Wei Ni <wni@nvidia.com> for Seaboard
in the ChromeOS kernel.
Long-term, this should probably be moved into some kind of PMU driver,
or perhaps integrated into the GPIO/IRQ/pinmux system?
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
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Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
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Add support for ventana pinmuxing as a seaboard derivative. This is a cut down
version of work done by Jong Kim <jongk@nvidia.com>.
Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
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This patch splits out the common part of pinmux and GPIO initialization for
seaboard and derived boards. This code is based on work done by Jong Kim
<jongk@nvidia.com>.
Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
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Use ioremap to obtain access to registers instead of using static
mappings. This reduces the number of users of the static mappings, which
will eventually allow them to be removed.
Note that on Tegra30, the number of register "banks" will decrease to 2,
and the packing of specific bits into registers will change significantly.
That's why this change adds the "*_bank" fields to the pingroup tables,
rather than implementing some more hard-coded scheme.
Also, completely remove the implementation of suspend/resume; Tegra doesn't
yet support suspend/resume, and the implementation is complex for the
general pinmux driver:
* Not all registers are used within each bank, so we probably shouldn't
just iterate over every register in the bank, and save/restore it,
since that would mean touching undefined registers.
* Registers are shared between pingroups, so we can't simply iterate over
each pingroup, and save/restore the registers it uses.
It'd probably be best have probe() calculate a bitmask of actually-used
registers for each bank, and have suspend/resume iterate over those
bitmaps.
Oh, and Real Soon Now, I should be looking into converting this driver to
the new pinmux/pinctrl subsystem, so I didn't want to put too much work
into the current incarnation.
v2: s/space/bank/ to match comments on reg_* fields in pinmux.h.
Re-order bank/reg parameters to pg_readl/pg_writel.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
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Signed-off-by: Stephen Warren <swarren@nvidia.com>
[olof: switch probe function to __devinit]
Signed-off-by: Olof Johansson <olof@lixom.net>
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Add a pinmux node to tegra20.dtsi in order to instantiate the future
pinmux device.
v2: Specify reg property precisely; don't just point at the whole APB_MISC
register range.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
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The Tegra GPIO driver will be converted from static registration via
postcore_initcall() to be a platform device later in this patch series.
A new Tegra pinmux platform device will also be added.
Prepare for this by modifying all boards to register the appropriate
platform devices before-hand, so that when the drivers are converted,
those devices will be probed, and git bisectability will be maintained.
v2: Add resource definitions for GPIO and pinmux
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
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git://git.pengutronix.de/git/imx/linux-2.6 into imx/devel
Conflicts:
arch/arm/mach-mx5/clock-mx51-mx53.c
arch/arm/mach-mx5/devices-imx53.h
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into next/devel
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The wl1271 daughter card for AM18x EVMs is a combo wireless connectivity
add-on card, based on the LS Research TiWi module with Texas
Instruments' wl1271 solution.
It is a 4-wire, 1.8V, embedded SDIO WLAN device with an external IRQ
line and is power-controlled by a GPIO-based fixed regulator.
Add support for the WLAN capabilities of this expansion board.
Signed-off-by: Ido Yariv <ido@wizery.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
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Some devices connected to the MMC bus are power controlled by external
means. For instance, an SDIO device may be powered down/up by an
external gpio line.
In order to avoid toggling power from within the MMC host driver, add a
set_power callback function, which will be called by set_ios upon
powering down/up.
Signed-off-by: Ido Yariv <ido@wizery.com>
CC: Chris Ball <cjb@laptop.org>
Acked-by: Chris Ball <cjb@laptop.org>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
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The wl1271 daughter board makes use of a few GPIOs:
GPIO6_9 is used for powering down/up the WLAN functionality.
GPIO6_10 is used as an input IRQ line from the WLAN chip.
Add the required pinmux configuration for these GPIOs.
Signed-off-by: Ido Yariv <ido@wizery.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
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AM18x has two MMC slots. Add the required pinmux configuration for the
second slot.
Signed-off-by: Ido Yariv <ido@wizery.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
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This helps resolve the conflicts between the imx cleanups and the
new code that has gone into the imx tree.
Conflict resolution was originally done by Sascha Hauer.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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While suspending, we're enabling a clock in ->suspend() but we're in atomic
context, leading to this :
[30803.667305] PM: late suspend of devices complete after 1.237 msecs
[30803.667449] BUG: sleeping function called from invalid context at kernel/mutex.c:271
[30803.667464] in_atomic(): 0, irqs_disabled(): 128, pid: 4941, name: pm-suspend
[30803.667474] INFO: lockdep is turned off.
[30803.667483] irq event stamp: 0
[30803.667489] hardirqs last enabled at (0): [< (null)>] (null)
[30803.667503] hardirqs last disabled at (0): [<c001e4a8>] copy_process.part.48+0x1e0/0xa7c
[30803.667543] softirqs last enabled at (0): [<c001e4a8>] copy_process.part.48+0x1e0/0xa7c
[30803.667562] softirqs last disabled at (0): [< (null)>] (null)
[30803.667574] Backtrace:
[30803.667611] [<c0010e00>] (dump_backtrace+0x0/0x110) from [<c0424c00>] (dump_stack+0x18/0x1c)
[30803.667624] r6:00000000 r5:00000000 r4:d9648000 r3:d9648000
[30803.667652] [<c0424be8>] (dump_stack+0x0/0x1c) from [<c0424eec>] (__might_sleep.part.101+0x90/0xa8)
[30803.667673] [<c0424e5c>] (__might_sleep.part.101+0x0/0xa8) from [<c001a5c4>] (__might_sleep+0x80/0x94)
[30803.667686] r4:c05d58c0
[30803.667705] [<c001a544>] (__might_sleep+0x0/0x94) from [<c043230c>] (mutex_lock_nested+0x2c/0x30c)
[30803.667735] [<c04322e0>] (mutex_lock_nested+0x0/0x30c) from [<c0017834>] (clk_enable+0x28/0x50)
[30803.667747] r8:c0438464 r7:00000003 r6:00000000 r5:00000000 r4:c05d2e98
[30803.667780] [<c001780c>] (clk_enable+0x0/0x50) from [<c0017260>] (mx5_suspend_enter+0x1c/0x98)
[30803.667792] r4:00000003 r3:c060dfe0
[30803.667821] [<c0017244>] (mx5_suspend_enter+0x0/0x98) from [<c0059b48>] (suspend_enter+0xec/0x15c)
[30803.667833] r4:00000003 r3:c0017244
[30803.667856] [<c0059a5c>] (suspend_enter+0x0/0x15c) from [<c0059c4c>] (suspend_devices_and_enter+0x94/0x130)
[30803.667868] r6:00000000 r5:00000003 r4:c0c0af00 r3:00002710
[30803.667897] [<c0059bb8>] (suspend_devices_and_enter+0x0/0x130) from [<c0059db0>] (enter_state+0xc8/0x130)
[30803.667909] r6:00000000 r5:00000003 r4:c05286e4
[30803.667934] [<c0059ce8>] (enter_state+0x0/0x130) from [<c00592d4>] (state_store+0xac/0xc0)
[30803.667945] r6:00000003 r5:00000003 r4:df39d000 r3:00000003
[30803.667978] [<c0059228>] (state_store+0x0/0xc0) from [<c01b0100>] (kobj_attr_store+0x1c/0x28)
[30803.668009] [<c01b00e4>] (kobj_attr_store+0x0/0x28) from [<c00e435c>] (sysfs_write_file+0x88/0xbc)
[30803.668032] [<c00e42d4>] (sysfs_write_file+0x0/0xbc) from [<c0091fa0>] (vfs_write+0xbc/0x138)
[30803.668051] [<c0091ee4>] (vfs_write+0x0/0x138) from [<c0092204>] (sys_write+0x44/0x70)
[30803.668062] r8:00000000 r7:00000004 r6:00000003 r5:002694d0 r4:d966acc0
[30803.668094] [<c00921c0>] (sys_write+0x0/0x70) from [<c000db00>] (ret_fast_syscall+0x0/0x3c)
[30803.668106] r9:d9648000 r8:c000dcc4 r6:00000001 r5:002694d0 r4:00000003
[30803.669927] PM: early resume of devices complete after 0.972 msecs
Just move the clk_enable/disable in ->prepare() and ->finish()
Signed-off-by: Arnaud Patard <arnaud.patard@rtp-net.org>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
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'features/imx-multi-irq-v2' into imx-features
Conflicts:
arch/arm/plat-mxc/avic.c
arch/arm/plat-mxc/include/mach/common.h
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Also, add handle_irq callbacks to machine descriptors.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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This fix the mx25 building issue of no IIM base definition
Signed-off-by: Jason Liu <jason.hui@linaro.org>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Convert i.MX avic irq handler to use generic irq chip. This not only
provides a cleanup implementation of irq chip handler, but also
implements suspend/resume interface with the help of generic irq chip
interface.
Change mxc_irq_chip to a new structure mxc_extra_irq to handle fiq
and priority functions.
Signed-off-by: Hui Wang <jason77.wang@gmail.com>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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This patch add poweroff support on mx31moboard platform.
A watchdog timeout is generated while enabling the watchdog
reset IO to trigger a PMIC poweroff.
Signed-off-by: Philippe Rétornaz <philippe.retornaz@epfl.ch>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Add watchdog support for mach-qong target.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Tested-by : Stefano Babic <sbabic@denx.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Update sdhc support on efika to make use of the latest mmc fixes.
Signed-off-by: Arnaud Patard <arnaud.patard@rtp-net.org>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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'features/imx-pata', 'features/multisoc' and 'features/mxs' into imx-features-for-arnd
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Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
Tested-by: Shawn Guo <shawn.guo@freescale.com> (for mx23evk and mx28evk)
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Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
Tested-by: Shawn Guo <shawn.guo@freescale.com>
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Add these fixed regulators to enable basic audio-support until full regulator
support is done.
Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
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According to spec, set to 1 is the enable of fractional devide
or the clock can not be generated properly.
Signed-off-by: Dong Aisheng <b29396@freescale.com>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Reviewed-by: Wolfram Sang <w.sang@pengutronix.de>
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Signed-off-by: Dong Aisheng <b29396@freescale.com>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Reviewed-by: Wolfram Sang <w.sang@pengutronix.de>
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Signed-off-by: Dong Aisheng <b29396@freescale.com>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Reviewed-by: Wolfram Sang <w.sang@pengutronix.de>
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Signed-off-by: Dong Aisheng <b29396@freescale.com>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Reviewed-by: Wolfram Sang <w.sang@pengutronix.de>
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Set pll0 as parent.
Signed-off-by: Dong Aisheng <b29396@freescale.com>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Reviewed-by: Wolfram Sang <w.sang@pengutronix.de>
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Now that we can compile all ARMv4/v5 based i.MX SoCs into a single
kernel, update the defconfigs accordingly
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Rename it from mx51_defconfig to mx5_defconfig since the i.MX53
is now supported aswell. Also, remove the DEBUG_LL and enable
some more drivers useful for i.MX5 boards. For supporting
1GiB of SDRAM vmsplit 2/2 is enabled.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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For this we need CONFIG_AUTO_ZRELADDR and CONFIG_ARM_PATCH_PHYS_VIRT.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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For this we need CONFIG_AUTO_ZRELADDR and CONFIG_ARM_PATCH_PHYS_VIRT.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Update to use generic function for displaying silicon revision
Tested on my mx53 loco board:
CPU identified as i.MX53, silicon rev 2.0
Test on my mx51 babbage board:
CPU identified as i.MX51, silicon rev 3.0
Signed-off-by: Jason Liu <jason.hui@linaro.org>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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update to use generic function for displaying silicon revision
Signed-off-by: Jason Liu <jason.hui@linaro.org>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Update to use generic function for displaying silicon revision
Tested on mx31pdk board as print the following information:
CPU identified as i.MX31, silicon rev 2.0
Signed-off-by: Jason Liu <jason.hui@linaro.org>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Silicon revision is useful information to have during kernel boot.
Print the MX27 silicon revision.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Jason Liu <jason.hui@linaro.org>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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