summaryrefslogtreecommitdiffstats
path: root/arch
Commit message (Collapse)AuthorAgeFilesLines
* locking: Convert __raw_spin* functions to arch_spin*Thomas Gleixner2009-12-1424-238/+238
| | | | | | | | | | Name space cleanup. No functional change. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Acked-by: Peter Zijlstra <peterz@infradead.org> Acked-by: David S. Miller <davem@davemloft.net> Acked-by: Ingo Molnar <mingo@elte.hu> Cc: linux-arch@vger.kernel.org
* locking: Rename __RAW_SPIN_LOCK_UNLOCKED to __ARCH_SPIN_LOCK_UNLOCKEDThomas Gleixner2009-12-1416-18/+18
| | | | | | | | | | Further name space cleanup. No functional change Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Acked-by: Peter Zijlstra <peterz@infradead.org> Acked-by: David S. Miller <davem@davemloft.net> Acked-by: Ingo Molnar <mingo@elte.hu> Cc: linux-arch@vger.kernel.org
* locking: Convert raw_spinlock to arch_spinlockThomas Gleixner2009-12-1439-133/+133
| | | | | | | | | | | | | | | | | | | The raw_spin* namespace was taken by lockdep for the architecture specific implementations. raw_spin_* would be the ideal name space for the spinlocks which are not converted to sleeping locks in preempt-rt. Linus suggested to convert the raw_ to arch_ locks and cleanup the name space instead of using an artifical name like core_spin, atomic_spin or whatever No functional change. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Acked-by: Peter Zijlstra <peterz@infradead.org> Acked-by: David S. Miller <davem@davemloft.net> Acked-by: Ingo Molnar <mingo@elte.hu> Cc: linux-arch@vger.kernel.org
* Merge branch 'x86-fixes-for-linus' of ↵Linus Torvalds2009-12-1422-78/+133
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip * 'x86-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip: x86, mce: Clean up thermal init by introducing intel_thermal_supported() x86, mce: Thermal monitoring depends on APIC being enabled x86: Gart: fix breakage due to IOMMU initialization cleanup x86: Move swiotlb initialization before dma32_free_bootmem x86: Fix build warning in arch/x86/mm/mmio-mod.c x86: Remove usedac in feature-removal-schedule.txt x86: Fix duplicated UV BAU interrupt vector nvram: Fix write beyond end condition; prove to gcc copy is safe mm: Adjust do_pages_stat() so gcc can see copy_from_user() is safe x86: Limit the number of processor bootup messages x86: Remove enabling x2apic message for every CPU doc: Add documentation for bootloader_{type,version} x86, msr: Add support for non-contiguous cpumasks x86: Use find_e820() instead of hard coded trampoline address x86, AMD: Fix stale cpuid4_info shared_map data in shared_cpu_map cpumasks Trivial percpu-naming-introduced conflicts in arch/x86/kernel/cpu/intel_cacheinfo.c
| * x86, mce: Clean up thermal init by introducing intel_thermal_supported()Hidetoshi Seto2009-12-141-5/+12
| | | | | | | | | | | | | | | | | | | | It looks better to have a common function. No change in functionality. Signed-off-by: Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com> Cc: Cyrill Gorcunov <gorcunov@openvz.org> LKML-Reference: <4B25FDDC.407@jp.fujitsu.com> Signed-off-by: Ingo Molnar <mingo@elte.hu> Cc: Cyrill Gorcunov <gorcunov@openvz.org>
| * x86, mce: Thermal monitoring depends on APIC being enabledCyrill Gorcunov2009-12-141-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add check if APIC is not disabled since thermal monitoring depends on it. As only apic gets disabled we should not try to install "thermal monitor" vector, print out that thermal monitoring is enabled and etc... Note that "Intel Correct Machine Check Interrupts" already has such a check. Also I decided to not add cpu_has_apic check into mcheck_intel_therm_init since even if it'll call apic_read on disabled apic -- it's safe here and allow us to save a few code bytes. Reported-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Cyrill Gorcunov <gorcunov@openvz.org> Signed-off-by: Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com> LKML-Reference: <4B25FDC2.3020401@jp.fujitsu.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
| * x86: Gart: fix breakage due to IOMMU initialization cleanupYinghai Lu2009-12-142-6/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This fixes the following breakage of the commit 75f1cdf1dda92cae037ec848ae63690d91913eac: - GART systems that don't AGP with broken BIOS and more than 4GB memory are forced to use swiotlb. They can allocate aperture by hand and use GART. - GART systems without GAP must disable GART on shutdown. - swiotlb usage is forced by the boot option, gart_iommu_hole_init() is not called, so we disable GART early_gart_iommu_check(). Signed-off-by: Yinghai Lu <yinghai@kernel.org> Signed-off-by: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp> LKML-Reference: <1260759135-6450-3-git-send-email-fujita.tomonori@lab.ntt.co.jp> Signed-off-by: Ingo Molnar <mingo@elte.hu>
| * x86: Move swiotlb initialization before dma32_free_bootmemFUJITA Tomonori2009-12-141-1/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The commit 75f1cdf1dda92cae037ec848ae63690d91913eac introduced a bug that we initialize SWIOTLB right after dma32_free_bootmem so we wrongly steal memory area allocated for GART with broken BIOS earlier. This moves swiotlb initialization before dma32_free_bootmem(). Signed-off-by: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp> Cc: yinghai@kernel.org LKML-Reference: <1260759135-6450-2-git-send-email-fujita.tomonori@lab.ntt.co.jp> Signed-off-by: Ingo Molnar <mingo@elte.hu>
| * x86: Fix build warning in arch/x86/mm/mmio-mod.cJoe Perches2009-12-141-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Stephen Rothwell reported these warnings: arch/x86/mm/mmio-mod.c: In function 'print_pte': arch/x86/mm/mmio-mod.c:100: warning: too many arguments for format arch/x86/mm/mmio-mod.c:106: warning: too many arguments for format The 'fmt' was left out accidentally. Reported-by: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: Joe Perches <joe@perches.com> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Linus <torvalds@linux-foundation.org> LKML-Reference: <1260775443.18538.16.camel@Joe-Laptop.home> Signed-off-by: Ingo Molnar <mingo@elte.hu>
| * x86: Fix duplicated UV BAU interrupt vectorCliff Wickman2009-12-131-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Interrupt vector 0xec has been doubly defined in irq_vectors.h It seems arbitrary whether LOCAL_PENDING_VECTOR or UV_BAU_MESSAGE is the higher number. As long as they are unique. If they are not unique we'll hit a BUG in alloc_system_vector(). Signed-off-by: Cliff Wickman <cpw@sgi.com> Cc: <stable@kernel.org> LKML-Reference: <E1NJ9Pe-0004P7-0Q@eag09.americas.sgi.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
| * x86: Limit the number of processor bootup messagesMike Travis2009-12-116-29/+47
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When there are a large number of processors in a system, there is an excessive amount of messages sent to the system console. It's estimated that with 4096 processors in a system, and the console baudrate set to 56K, the startup messages will take about 84 minutes to clear the serial port. This set of patches limits the number of repetitious messages which contain no additional information. Much of this information is obtainable from the /proc and /sysfs. Some of the messages are also sent to the kernel log buffer as KERN_DEBUG messages so dmesg can be used to examine more closely any details specific to a problem. The new cpu bootup sequence for system_state == SYSTEM_BOOTING: Booting Node 0, Processors #1 #2 #3 #4 #5 #6 #7 Ok. Booting Node 1, Processors #8 #9 #10 #11 #12 #13 #14 #15 Ok. ... Booting Node 3, Processors #56 #57 #58 #59 #60 #61 #62 #63 Ok. Brought up 64 CPUs After the system is running, a single line boot message is displayed when CPU's are hotplugged on: Booting Node %d Processor %d APIC 0x%x Status of the following lines: CPU: Physical Processor ID: printed once (for boot cpu) CPU: Processor Core ID: printed once (for boot cpu) CPU: Hyper-Threading is disabled printed once (for boot cpu) CPU: Thermal monitoring enabled printed once (for boot cpu) CPU %d/0x%x -> Node %d: removed CPU %d is now offline: only if system_state == RUNNING Initializing CPU#%d: KERN_DEBUG Signed-off-by: Mike Travis <travis@sgi.com> LKML-Reference: <4B219E28.8080601@sgi.com> Signed-off-by: H. Peter Anvin <hpa@zytor.com>
| * x86: Remove enabling x2apic message for every CPUMike Travis2009-12-111-1/+1
| | | | | | | | | | | | | | | | | | Print only once that the system is supporting x2apic mode. Signed-off-by: Mike Travis <travis@sgi.com> Acked-by: Cyrill Gorcunov <gorcunov@openvz.org> LKML-Reference: <4B226E92.5080904@sgi.com> Signed-off-by: H. Peter Anvin <hpa@zytor.com>
| * x86, msr: Add support for non-contiguous cpumasksBorislav Petkov2009-12-112-4/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The current rd/wrmsr_on_cpus helpers assume that the supplied cpumasks are contiguous. However, there are machines out there like some K8 multinode Opterons which have a non-contiguous core enumeration on each node (e.g. cores 0,2 on node 0 instead of 0,1), see http://www.gossamer-threads.com/lists/linux/kernel/1160268. This patch fixes out-of-bounds writes (see URL above) by adding per-CPU msr structs which are used on the respective cores. Additionally, two helpers, msrs_{alloc,free}, are provided for use by the callers of the MSR accessors. Cc: H. Peter Anvin <hpa@zytor.com> Cc: Mauro Carvalho Chehab <mchehab@redhat.com> Cc: Aristeu Rozanski <aris@redhat.com> Cc: Randy Dunlap <randy.dunlap@oracle.com> Cc: Doug Thompson <dougthompson@xmission.com> Signed-off-by: Borislav Petkov <borislav.petkov@amd.com> LKML-Reference: <20091211171440.GD31998@aftab> Signed-off-by: H. Peter Anvin <hpa@zytor.com>
| * Merge commit 'linus/master' into x86/urgentH. Peter Anvin2009-12-11345-6021/+9125
| |\
| * | x86: Use find_e820() instead of hard coded trampoline addressYinghai Lu2009-12-117-25/+27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Jens found the following crash/regression: [ 0.000000] found SMP MP-table at [ffff8800000fdd80] fdd80 [ 0.000000] Kernel panic - not syncing: Overlapping early reservations 12-f011 MP-table mpc to 0-fff BIOS data page and [ 0.000000] Kernel panic - not syncing: Overlapping early reservations 12-f011 MP-table mpc to 6000-7fff TRAMPOLINE and bisected it to b24c2a9 ("x86: Move find_smp_config() earlier and avoid bootmem usage"). It turns out the BIOS is using the first 64k for mptable, without reserving it. So try to find good range for the real-mode trampoline instead of hard coding it, in case some bios tries to use that range for sth. Reported-by: Jens Axboe <jens.axboe@oracle.com> Signed-off-by: Yinghai Lu <yinghai@kernel.org> Tested-by: Jens Axboe <jens.axboe@oracle.com> Cc: Randy Dunlap <randy.dunlap@oracle.com> LKML-Reference: <4B21630A.6000308@kernel.org> Signed-off-by: Ingo Molnar <mingo@elte.hu>
| * | x86, AMD: Fix stale cpuid4_info shared_map data in shared_cpu_map cpumasksPrarit Bhargava2009-12-101-6/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The per_cpu cpuid4_info shared_map can contain stale data when CPUs are added and removed. The stale data can lead to a NULL pointer derefernce panic on a remove of a CPU that has had siblings previously removed. This patch resolves the panic by verifying a cpu is actually online before adding it to the shared_cpu_map, only examining cpus that are part of the same lower level cache, and by updating other siblings lowest level cache maps when a cpu is added. Signed-off-by: Prarit Bhargava <prarit@redhat.com> LKML-Reference: <20091209183336.17855.98708.sendpatchset@prarit.bos.redhat.com> Signed-off-by: H. Peter Anvin <hpa@zytor.com>
* | | Merge branch 'next-spi' of git://git.secretlab.ca/git/linux-2.6Linus Torvalds2009-12-141-0/+35
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'next-spi' of git://git.secretlab.ca/git/linux-2.6: (23 commits) spi: fix probe/remove section markings Add OMAP spi100k driver spi-imx: don't access struct device directly but use dev_get_platdata spi-imx: Add mx25 support spi-imx: use positive logic to distinguish cpu variants spi-imx: correct check for platform_get_irq failing ARM: NUC900: Add spi driver support for nuc900 spi: SuperH MSIOF SPI Master driver V2 spi: fix spidev compilation failure when VERBOSE is defined spi/au1550_spi: fix setupxfer not to override cfg with zeros spi/mpc8xxx: don't use __exit_p to wrap plat_mpc8xxx_spi_remove spi/i.MX: fix broken error handling for gpio_request spi/i.mx: drain MXC SPI transfer buffer when probing device MAINTAINERS: add SPI co-maintainer. spi/xilinx_spi: fix incorrect casting spi/mpc52xx-spi: minor cleanups xilinx_spi: add a platform driver using the xilinx_spi common module. xilinx_spi: add support for the DS570 IP. xilinx_spi: Switch to iomem functions and support little endian. xilinx_spi: Split into of driver and generic part. ...
| * | | ARM: NUC900: Add spi driver support for nuc900Wan ZongShun2009-12-131-0/+35
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Wan ZongShun <mcuos.com@gmail.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
* | | | Merge branch 'for-linus' of git://git.monstr.eu/linux-2.6-microblazeLinus Torvalds2009-12-1449-484/+1683
|\ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'for-linus' of git://git.monstr.eu/linux-2.6-microblaze: (46 commits) microblaze: Remove rt_sigsuspend wrapper microblaze: nommu: Don't clobber R11 on syscalls microblaze: Remove show_tmem function microblaze: Support for WB cache microblaze: Add PVR for Microblaze v7.30.a microblaze: Remove ancient and fake microblaze version from cpu_ver table microblaze: Remove panic_timeout init value microblaze: Do not count system calls in default microblaze: Enable DTC compilation microblaze: Core oprofile configs and hooks microblaze: Fix level interrupt ACKing microblaze: Enable futimesat syscall microblaze: Checking DTS against PVR for write-back cache microblaze: Remove duplicity from pgalloc.h microblaze: Futex support microblaze: Adding dev_arch_data functions microblaze: Fix the heartbeat gpio to be more robust microblaze: Simple __copy_tofrom_user for noMMU microblaze: Export memory_start for modules microblaze: Use lowest-common-denominator default CPU settings ...
| * | | | microblaze: Remove rt_sigsuspend wrapperMichal Simek2009-12-143-13/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Generic rt_sigsuspend syscalls doesn't need any asm wrapper. Signed-off-by: Michal Simek <monstr@monstr.eu>
| * | | | microblaze: nommu: Don't clobber R11 on syscallssteve@digidescorp.com2009-12-141-2/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The noMMU syscall trap has a bug that causes R11 to be zero on return to userland. Remove the extra "save" of R11 responsible for the bug. Remove reloading of mode indicator because r11 already contains it. Signed-off-by: Steven J. Magnani <steve@digidescorp.com> Signed-off-by: Michal Simek <monstr@monstr.eu>
| * | | | microblaze: Remove show_tmem functionMichal Simek2009-12-141-10/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | show_tmem function do nothing that's why I removed it. There is also cleaning of commented ancient code. Signed-off-by: Michal Simek <monstr@monstr.eu>
| * | | | microblaze: Support for WB cacheMichal Simek2009-12-144-268/+574
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Microblaze version 7.20.d is the first MB version which can be run on MMU linux. Please do not used previous version because they contain HW bug. Based on WB support was necessary to redesign whole cache design. Microblaze versions from 7.20.a don't need to disable IRQ and cache before working with them that's why there are special structures for it. Signed-off-by: Michal Simek <monstr@monstr.eu>
| * | | | microblaze: Add PVR for Microblaze v7.30.aMichal Simek2009-12-141-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Microblaze v7.30.a will have 0x10 version string. Signed-off-by: Michal Simek <monstr@monstr.eu>
| * | | | microblaze: Remove ancient and fake microblaze version from cpu_ver tableMichal Simek2009-12-141-5/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We need to continue with next microblaze PVR version that's why I have to remove that ancient version. These version strings not match any versions. From Microblaze v5.00.a is possible to use this style. I believe that none use ancients versions. If yes they will be just labeled as unknown version. Signed-off-by: Michal Simek <monstr@monstr.eu>
| * | | | microblaze: Remove panic_timeout init valueMichal Simek2009-12-141-2/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | panic_timeout is in BSS section and it is cleared with BSS section. This means that value is setup to 0. Signed-off-by: Michal Simek <monstr@monstr.eu>
| * | | | microblaze: Do not count system calls in defaultMichal Simek2009-12-141-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There is not necessary to count system calls that's why I added DEBUG macro Signed-off-by: Michal Simek <monstr@monstr.eu>
| * | | | microblaze: Enable DTC compilationMichal Simek2009-12-141-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For simpleImage format we need to compile DTC. There is still possibility to compile only Linux kernel without DTB compiled-in. Signed-off-by: Michal Simek <monstr@monstr.eu>
| * | | | microblaze: Core oprofile configs and hooksJohn Williams2009-12-144-0/+39
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Microblaze uses timer interrupt mode. Microblaze don't have any performance counter that's why we use just simple implementation. Signed-off-by: John Williams <john.williams@petalogix.com> Signed-off-by: Michal Simek <monstr@monstr.eu>
| * | | | microblaze: Fix level interrupt ACKingsteve@digidescorp.com2009-12-141-1/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Level interrupts need to be ack'd in the unmask handler, as in powerpc. Among other issues, this bug causes the system clock to appear to run at double-speed. Signed-off-by: Steven J. Magnani <steve@digidescorp.com> Signed-off-by: Michal Simek <monstr@monstr.eu>
| * | | | microblaze: Enable futimesat syscallMichal Simek2009-12-141-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Futimesat was disabled. LTP testing shows that MB has no problem with this syscall. Signed-off-by: Michal Simek <monstr@monstr.eu>
| * | | | microblaze: Checking DTS against PVR for write-back cacheMichal Simek2009-12-142-12/+29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | WB cache has special flag in PVR. There is added checking mechanism for PVR and DTS. Signed-off-by: Michal Simek <monstr@monstr.eu>
| * | | | microblaze: Remove duplicity from pgalloc.hMichal Simek2009-12-141-6/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | just file cleanup Signed-off-by: Michal Simek <monstr@monstr.eu>
| * | | | microblaze: Futex supportMichal Simek2009-12-141-1/+126
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Microblaze v7.20 provides new lwx, swx instructions which bring possibility to implement lock rutines. There are some tests in open posix thread LTP part but current toolchain not support it. Signed-off-by: Michal Simek <monstr@monstr.eu>
| * | | | microblaze: Adding dev_arch_data functionsMichal Simek2009-12-141-0/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The functions, dev_arch_data_set_node and get_node are missing and are needed by some device drivers such as I2C. Signed-off-by: John Linn <john.linn@xilinx.com> Signed-off-by: Michal Simek <monstr@monstr.eu>
| * | | | microblaze: Fix the heartbeat gpio to be more robustJohn Linn2009-12-141-5/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The device tree handling for the gpio in the heart beat was not handling the system when there was no gpio and it wasn't working with a newer version of the gpio core which does not have the is-bidir property. Signed-off-by: John Linn <john.linn@xilinx.com> Signed-off-by: Michal Simek <monstr@monstr.eu>
| * | | | microblaze: Simple __copy_tofrom_user for noMMUJohn Williams2009-12-142-6/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is first patch which clear part of uaccess.h. uaccess.h will be clear later. Signed-off-by: John Williams <john.williams@petalogix.com> Signed-off-by: Michal Simek <monstr@monstr.eu>
| * | | | microblaze: Export memory_start for modulesMichal Simek2009-12-141-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | memory_start symbol is needed by kernel modules. Signed-off-by: Michal Simek <monstr@monstr.eu>
| * | | | microblaze: Use lowest-common-denominator default CPU settingsJohn Williams2009-12-141-6/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This will ensure that kernels built with no custom CPU settings will still boot OK on hardware that has additional CPU hardware instructions etc. Signed-off-by: John Williams <john.williams@petalogix.com> Signed-off-by: Michal Simek <monstr@monstr.eu>
| * | | | microblaze: Update default generic DTSMichal Simek2009-12-141-3/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | It is generated with longer compatible list Signed-off-by: Michal Simek <monstr@monstr.eu>
| * | | | microblaze: Enable asm optimization only for HW with barrel-shifterMichal Simek2009-12-141-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Asm code uses barrel-shifter instruction that's why we have to protect cases when HW don't have it. Reported-by: John Linn <john.linn@xilinx.com> Signed-off-by: Michal Simek <monstr@monstr.eu>
| * | | | microblaze: Remove the buggy ALLOW_EDIT_AUTO config optionJohn Williams2009-12-142-28/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This was intended to allow manual override of CPU settings copied automatically to Kconfig.auto, however it's problematic for several reasons, but mostly: * If the defconfig doesn't have ALLOW_EDIT_AUTO=y, then it's impossible for that defconfig to iverride the values in the kernel source tree. This leads to very strange errors where the kernel is compiled with the wrong CPUFLAGS. Next patch in the series will back out the default in Kconfig.auto to baseline settings, so a kernel built with no default values will at least boot on any hardware, just not make use of additional CPU features. Signed-off-by: John Williams <john.williams@petalogix.com> Signed-off-by: Michal Simek <monstr@monstr.eu>
| * | | | microblaze: Move cache macro from cache.h to cacheflush.hMichal Simek2009-12-143-16/+18
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Michal Simek <monstr@monstr.eu>
| * | | | microblaze: support U-BOOT image formatMichal Simek2009-12-141-2/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Two version are generated. linux.bin.ub which is created from linux.bin file and simpleImage.<dts>.ub which is created from stripped simpleImage.<dts> file Load address and entry point is for microblaze first instruction which is CONFIG_KERNEL_BASE_ADDR variable. There is possible for simpleImage format parse _start symbol too. simpleImage.<dts> is still stripped elf file I cleared simpleImage.<dts>.unstrip file because there are so big. Signed-off-by: Michal Simek <monstr@monstr.eu>
| * | | | microblaze: Ptrace notifying from signal codeMichal Simek2009-12-141-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | After the signal frame is set up on the userspace stack, ptrace() should be given an opportunity to single-step into the signal handler FRV, Blackfin, mn10300 and UM. Worth to look at that patches. Signed-off-by: Michal Simek <monstr@monstr.eu>
| * | | | microblaze: Extend cpuinfo for support write-back cachesMichal Simek2009-12-143-2/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There is missing checking agains PVR but this is not important for now. There are some missing checking too. Signed-off-by: Michal Simek <monstr@monstr.eu>
| * | | | microblaze: Fix cache_line_lenghtMichal Simek2009-12-144-20/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We used cache_line as cache_line_lenght. For this reason we did cache flushing 4 times longer than was necessary. Signed-off-by: Michal Simek <monstr@monstr.eu>
| * | | | microblaze: Detect new 7.20.d versionMichal Simek2009-12-141-0/+1
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Michal Simek <monstr@monstr.eu>
| * | | | microblaze: Support both levels for resetMichal Simek2009-12-141-4/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Till this patch reset always perform writen to 1. Now we can use negative logic and perform reset write to 0. It is opposite level than is currently read from that pin Signed-off-by: Michal Simek <monstr@monstr.eu>
| * | | | microblaze: Fix announce message for reset gpioMichal Simek2009-12-141-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | I had to change message for gpio-reset because I always not to see it. Prefix RESET is big and visible. Signed-off-by: Michal Simek <monstr@monstr.eu>
OpenPOWER on IntegriCloud