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* [PATCH] uml: support AES i586 crypto driverPaolo 'Blaisorblade' Giarrusso2005-05-015-8/+17
| | | | | | | | | | | | | | | | | | | | We want to make possible, for the user, to enable the i586 AES implementation. This requires a restructure. - Add a CONFIG_UML_X86 to notify that we are building a UML for i386. - Rename CONFIG_64_BIT to CONFIG_64BIT as is used for all other archs - Tell crypto/Kconfig that UML_X86 is as good as X86 - Tell it that it must exclude not X86_64 but 64BIT, which will give the same results. - Tell kbuild to descend down into arch/i386/crypto/ to build what's needed. Signed-off-by: Paolo 'Blaisorblade' Giarrusso <blaisorblade@yahoo.it> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] uml: workaround old problematic sed behaviourRob Landley2005-05-011-1/+2
| | | | | | | | | | | | | Old versions of sed from 1998 (predating the first release of gcc 2.95, but still in use by debian stable) don't understand the single-line version of the sed append command. Since newer versions of sed still understand the... ahem, "vintage" form of the command, change our code to use that. Signed-off-by: Rob Landley <rob@landley.net> Acked-by: Ian McDonald <imcdnzl@gmail.com> Signed-off-by: Paolo 'Blaisorblade' Giarrusso <blaisorblade@yahoo.it> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] uml: fix handling of no fpx_regsAndree Leidenfrost2005-05-011-3/+4
| | | | | | | | | | | Paolo 'Blaisorblade' Giarrusso <blaisorblade@yahoo.it> Fix the error path, which is triggered when the processor misses the fpx regs (i.e. the "fxsr" cpuinfo feature). For instance by VIA C3 Samuel2. Signed-off-by: Paolo 'Blaisorblade' Giarrusso <blaisorblade@yahoo.it> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] uml: add nfsd syscall when nfsd is modularblaisorblade@yahoo.it2005-05-011-7/+1
| | | | | | | | | | | | This trick is useless, because sys_ni.c will handle this problem by itself, like it does even on UML for other syscalls. Also, it does not provide the NFSD syscall when NFSD is compiled as a module, which is a big problem. Signed-off-by: Paolo 'Blaisorblade' Giarrusso <blaisorblade@yahoo.it> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] x86_64: saved_command_line overflow fixAlexander Nyberg2005-05-011-3/+0
| | | | | | | | | This strcpy can run off the end of saved_command_line, and we don't need it any more anyway. Signed-off-by: Alexander Nyberg <alexn@telia.com> Cc: Andi Kleen <ak@muc.de> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] x86-64: Handle empty E820 regions correctlyVenkatesh Pallipadi2005-05-011-8/+18
| | | | | | | | | | | | Brings sanitize_e820_map() in x86-64 in sync with that of i386. x86_64 version was missing the changes from this patch. http://linux.bkbits.net:8080/linux-2.6/cset@3e5e4083Y3HevldZl5KCy94V4DcZww?nav=index.html|src/|src/arch|src/arch/i386|src/arch/i386/kernel|related/arch/i386/kernel/setup.c Signed-off-by: Venkatesh Pallipadi <venkatesh.pallipadi@intel.com> Acked-by: Andi Kleen <ak@muc.de> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] Linux 2.6.x VM86 interrupt emulation fixesPavel Pisa2005-05-011-6/+9
| | | | | | | | | | | | | | | | | | | | | | | Patch solves VM86 interrupt emulation deadlock on SMP systems. The VM86 interrupt emulation has been heavily tested and works well on UP systems after last update, but it seems to deadlock when we have used it on SMP/HT boxes now. It seems, that disable_irq() cannot be called from interrupts, because it waits until disabled interrupt handler finishes (/kernel/irq/manage.c:synchronize_irq():while(IRQ_INPROGRESS);). This blocks one CPU after another. Solved by use disable_irq_nosync. There is the second problem. If IRQ source is fast, it is possible, that interrupt is sometimes processed and re-enabled by the second CPU, before it is disabled by the first one, but negative IRQ disable depths are not allowed. The spinlocking and disabling IRQs over call to disable_irq_nosync/enable_irq is the only solution found reliable till now. Signed-off-by: Michal Sojka <sojkam1@control.felk.cvut.cz> Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] Increase number of e820 entries hard limit from 32 to 128Venkatesh Pallipadi2005-05-014-10/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | The specifications that talk about E820 map doesn't have an upper limit on the number of e820 entries. But, today's kernel has a hard limit of 32. With increase in memory size, we are seeing the number of E820 entries reaching close to 32. Patch below bumps the number upto 128. The patch changes the location of EDDBUF in zero-page (as it comes after E820). As, EDDBUF is not used by boot loaders, this patch should not have any effect on bootloader-setup code interface. Patch covers both i386 and x86-64. Tested on: * grub booting bzImage * lilo booting bzImage with EDID info enabled * pxeboot of bzImage Side-effect: bss increases by ~ 2K and init.data increases by ~7.5K on all systems, due to increase in size of static arrays. Signed-off-by: Venkatesh Pallipadi <venkatesh.pallipadi@intel.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] x86_64: interrupt handling fixAndi Kleen2005-05-011-1/+4
| | | | | | | | | | - Initialize workmask correctly on interrupt signal handling - Readd missing cli's in the interrupt return path. Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] cpuid x87 bit on AMD falsely marked as PNIZwane Mwaikambo2005-05-012-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | http://bugme.osdl.org/show_bug.cgi?id=4426 vendor_id : AuthenticAMD cpu family : 6 model : 10 model name : AMD Athlon(tm) XP stepping : 0 cpu MHz : 2204.807 <snipped> cpuid level : 1 wp : yes flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 mmx fxsr sse pni syscall mmxext 3dnowext 3dnow bogomips : 4358.14 We're marking bit 0 of extended function 0x80000001 cpuid as PNI support on AMD processors, when it actually denotes x87 FPU present. Patch for i386 and x86_64 below. Signed-off-by: Zwane Mwaikambo <zwane@arm.linux.org.uk> Cc: Andi Kleen <ak@suse.de> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] irq and pci_ids for Intel ICH7DH & ICH7-M DHJason Gaston2005-05-011-0/+2
| | | | | | | | | This patch adds the Intel ICH7DH and ICH7-M DH DID's to the irq.c and pci_ids.h files. Signed-off-by: �Jason Gaston <Jason.d.gaston@intel.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] i386: fix hpet for systems that don't support legacy replacementjohn stultz2005-05-014-27/+36
| | | | | | | | | | | | | | | Currently the i386 HPET code assumes the entire HPET implementation from the spec is present. This breaks on boxes that do not implement the optional legacy timer replacement functionality portion of the spec. This patch, which is very similar to my x86-64 patch for the same issue, fixes the problem allowing i386 systems that cannot use the HPET for the timer interrupt and RTC to still use the HPET as a time source. I've tested this patch on a system systems without HPET, with HPET but without legacy timer replacement, as well as HPET with legacy timer replacement. Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] CPUID bug and inconsistency fixH. Peter Anvin2005-05-011-2/+8
| | | | | | | | | | | | | | The recent support for K8 multicore was misported from x86-64 to i386, due to an unnecessary inconsistency between the CPUID code. Sure, there is are no x86-64 VIA chips yet, but it should happen eventually. This patch fixes the i386 bug as well as makes x86-64 match i386 in the handing of the CPUID array. Signed-off-by: H. Peter Anvin <hpa@zytor.com> Cc: Andi Kleen <ak@suse.de> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] Enable write combining for server works LE rev > 6Lee Revell2005-05-011-5/+9
| | | | | | | | | Enable write combining for server works LE rev > 6 per http://www.ussg.iu.edu/hypermail/linux/kernel/0104.3/1007.html Signed-Off-By: Lee Revell <rlrevell@joe-job.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] x86: entry.S trap return fixesStas Sergeev2005-05-012-7/+2
| | | | | | | | | | | do_debug() and do_int3() return void. This patch fixes the CONFIG_KPROBES variant of do_int3() to return void too and adjusts entry.S accordingly. Signed-off-by: Stas Sergeev <stsp@aknet.ru> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] x86 reboot: Add reboot fixup for gx1/cs5530aJaya Kumar2005-05-014-0/+77
| | | | | | | | | | | This patch by Jaya Kumar introduces a generic infrastructure to deal with x86 chipsets with nonstandard reset sequences, and adds support for the Geode gx1/cs5530a chipset. Signed-off-by: Jaya Kumar <jayalk@intworks.biz> Signed-off-by: H. Peter Anvin <hpa@zytor.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] check nmi watchdog is brokenJack F Vogel2005-05-016-15/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | A bug against an xSeries system showed up recently noting that the check_nmi_watchdog() test was failing. I have been investigating it and discovered in both i386 and x86_64 the recent change to the routine to use the cpu_callin_map has uncovered a problem. Prior to that change, on an SMP box, the test was trivally passing because all cpu's were found to not yet be online, but now with the callin_map they are discovered, it goes on to test the counter and they have not yet begun to increment, so it announces a CPU is stuck and bails out. On all the systems I have access to test, the announcement of failure is also bougs... by the time you can login and check /proc/interrupts, the NMI count is happily incrementing on all CPUs. Its just that the test is being done too early. I have tried moving the call to the test around a bit, and it was always too early. I finally hit on this proposed solution, it delays the routine via a late_initcall(), seems like the right solution to me. Signed-off-by: Adrian Bunk <bunk@stusta.de> Cc: Andi Kleen <ak@muc.de> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] i386/x86_64 segment register access updateH. J. Lu2005-05-013-10/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The new i386/x86_64 assemblers no longer accept instructions for moving between a segment register and a 32bit memory location, i.e., movl (%eax),%ds movl %ds,(%eax) To generate instructions for moving between a segment register and a 16bit memory location without the 16bit operand size prefix, 0x66, mov (%eax),%ds mov %ds,(%eax) should be used. It will work with both new and old assemblers. The assembler starting from 2.16.90.0.1 will also support movw (%eax),%ds movw %ds,(%eax) without the 0x66 prefix. I am enclosing patches for 2.4 and 2.6 kernels here. The resulting kernel binaries should be unchanged as before, with old and new assemblers, if gcc never generates memory access for unsigned gsindex; asm volatile("movl %%gs,%0" : "=g" (gsindex)); If gcc does generate memory access for the code above, the upper bits in gsindex are undefined and the new assembler doesn't allow it. Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] ppc64: use smp_mb and smp_wmbAnton Blanchard2005-05-012-12/+12
| | | | | | | | Use smp_mb and smp_wmb. In particular smp_wmb is lighter weight than wmb. Signed-off-by: Anton Blanchard <anton@samba.org> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] ppc64: enforce medium thread priority in hypervisor callsAnton Blanchard2005-05-011-0/+8
| | | | | | | | | Calls into the hypervisor do not raise the thread priority. Ensure we are running at medium priority upon entry to the hypervisor. Signed-off-by: Anton Blanchard <anton@samba.org> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] ppc64: firmware workaroundAnton Blanchard2005-05-011-1/+7
| | | | | | | | | | Recent gcc 4.0 testing uncovered a firmware issue. Some properties are larger than 31 bytes and due to gcc 4.0s better stack allocation this overflow ran over non volatile register storage. Signed-off-by: Anton Blanchard <anton@samba.org> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] PPC64: Remove hot busy-wait loop in __hash_pageOlof Johansson2005-05-011-1/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | It turns out that our current __hash_page code will do a very hot busy-wait loop waiting on _PAGE_BUSY to be cleared. It even does ldarx/stdcx in the loop, which will bounce reservations around like crazy if there's more than one CPU spinning on the same PTE (or even another PTE in the same reservation granule). The end result is that each fault takes longer when there's contention, which in turn increases the chance of another thread hitting the same fault and also piling up. Not pretty. There's two options here: 1. Do an out-of-line busy loop a'la spinlocks with just loads (no reserves) 2. Just bail and refault if needed. (2) makes sense here: If the PTE is busy, chances are it's in flux anyway and the other code path making a change might just be ready to hash it. This fixes a stampede seen on a large-ish system where a multithreaded HPC app faults in the same text pages on several cpus at the same time. Signed-off-by: Olof Johansson <olof@lixom.net> Cc: Paul Mackerras <paulus@samba.org> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] ppc64: tell firmware about kernel capabilitiesPaul Mackerras2005-05-012-10/+157
| | | | | | | | | | | | | | On pSeries systems, according to the platform architecture specs, we are supposed to be supplying a structure to firmware that tells firmware about our capabilities, such as which version of the data structures that describe available memory we are expecting to see. The way we end up having to supply this data structure is a bit gross, since it was designed for AIX and doesn't suit us very well. This patch adds the code to supply this data structure to the firmware. Signed-off-by: Paul Mackerras <paulus@samba.org> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] ppc64: update to use the new 4L headersBenjamin Herrenschmidt2005-05-012-120/+123
| | | | | | | | | This patch converts ppc64 to use the generic pgtable-nopud.h instead of the "fixup" header. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] ppc64: nvram cleanupsakpm@osdl.org2005-05-011-9/+8
| | | | | | | | | | | - Fix arch/ppc64/kernel/nvram.c:342: warning: `part' might be used uninitialized in this function - Various codingstyle tweaks. Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] ppc64: Fix irq parsing on powermacPaul Mackerras2005-05-011-0/+4
| | | | | | | | | | | | | | | | | | | When I tried Ben's patches to the powermac sound driver on my G5, I found that it was taking enormous numbers of sound DMA transmit interrupts. This turned out to be because it was incorrectly configured as level-sensitive instead of edge-sensitive, which in turn was because the code that parses the interrupt tree that Open Firmware gives us was incorrectly assigning another device the same irq number as the sound DMA transmit interrupt (i.e. 1). This patch fixes the problem, in a somewhat quick and dirty way for now, but one which will work for all the machines we currently run on. Ultimately Ben and I want to do something more general and robust, but this should go in for 2.6.12. Signed-off-by: Paul Mackerras <paulus@samba.org> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] ppc64: remove unused argument to create_slbeOlof Johansson2005-05-011-5/+4
| | | | | | | | | | Remove vsid argument to create_slbe, since it's no longer used. Spotted by R Sharada. Signed-off-by: Olof Johansson <olof@austin.ibm.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] ppc64: add PT_NOTE section to vDSOBenjamin Herrenschmidt2005-05-016-3/+35
| | | | | | | | | | | | | | | | | | | | This patch from Roland adds a PT_NOTE section to both 32 and 64 bits vDSOs to expose the kernel version to glibc, thus avoiding a uname syscall on every launch. This is equivalent to the patches Roland posted already for x86 and x86-64. Note: the 64 bits .note is actually using the 32 bits format. This is normal. The ELF spec specifies a different format for 64 bits .note, but for some reason, this was never properly implemented, the core dumps for example are all using 32 bits format .note, and binutils cannot even read a 64 bits format .note. Talking to our toolchain folks, they think we'd rather stick to 32 bits format .note everywhere and get the spec fixed some day ... Signed-off-by: Roland McGrath <roland@redhat.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] ppc32: workaround for spurious IRQs on PQ2Dan Malek2005-05-011-0/+5
| | | | | | | | | | | | | | | There is a problem with large amounts of spurious IRQs on PowerPC 82xx systems. The problem is corrected by adding sync at the end of cpm2_mask_and_ack. This may be needed on 8xx as well but has not yet been confirmed. Signed-off-by: Eugene Surovegin <ebs@ebshome.net> Signed-off-by: Dan Malek <dan@embeddedalley.com> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Paul Mackerras <paulus@samba.org> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] ppc32: Fix address checking on lmw/stmw align exceptionPaul Mackerras2005-05-011-0/+4
| | | | | | | | | | The handling of misaligned load/store multiple instructions did not check to see if the address was ok to access before using __{get,put}_user(). Signed-off-by: Kumar Gala <kumar.gala@freescale.com> Signed-off-by: Paul Mackerras <paulus@samba.org> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] ppc32: Fix a sleep issues on some laptopsBenjamin Herrenschmidt2005-05-011-100/+114
| | | | | | | | | | | Some earlier models of aluminium powerbooks and ibook G4s have a clock chip that requires some tweaking before and after sleep. It seems that without that magic incantation to disable and re-enable clock spreading, RAM isn't properly refreshed during sleep. This fixes it. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] ppc32: add rtc hooks in PPC7D platform fileChris Elston2005-05-011-0/+42
| | | | | | | | | This patch adds the hooks into the PPC7D platforms file to support the DS1337 RTC device as the clock device for the PPC7D board. Signed-off-by: Chris Elston <chris.elston@radstone.co.uk> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] ppc32: fix for misreported SDRAM size on Radstone PPC7D platformChris Elston2005-05-012-6/+13
| | | | | | | | | | This patch fixes the SDRAM output from /proc/cpuinfo. The previous code assumed that there was only one bank of SDRAM, and that the size in the memory configuration register was the total size. Signed-off-by: Chris Elston <chris.elston@radstone.co.uk> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] ppc32: refactor FPU exception handlingPaul Mackerras2005-05-0112-176/+228
| | | | | | | | | | | | | | | Moved common FPU exception handling code out of head.S so it can be used by several of the sub-architectures that might of a full PowerPC FPU. Also, uses new CONFIG_PPC_FPU define to fix alignment exception handling for floating point load/store instructions to only occur if we have a hardware FPU. Signed-off-by: Jason McMullan <jason.mcmullan@timesys.com> Signed-off-by: Kumar Gala <kumar.gala@freescale.com> Signed-off-by: Paul Mackerras <paulus@samba.org> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] ppc32: Fix errata for some G3 CPUsBenjamin Herrenschmidt2005-05-012-6/+40
| | | | | | | | | | | | | | Some G3 CPUs can crash in funny way if a store from an FPU register instruction is executed on a register that has never been initialized since power on. This patch fixes it by making sure all FP registers have been properly initialized at kernel boot and when waking from sleep. It also makes the code that decides wether HID0_BTIC and HID0_DPM are allowed on a given CPU smarter (it can actually _clear_ them now if they are not allowed instead of just setting them when they are allowed in case the firmware got them wrong) Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] kbuild/ppc: tell when uimage was not builtSam Ravnborg2005-04-301-1/+2
| | | | | | | | | | | | Tom Rini said: Note that there is still a trivial'ish change to make. When mkimage doesn't exist on the host we should say "uImage not made" or something similar. So I did like Tom asked. Signed-off-by: Sam Ravnborg <sam@ravnborg.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] kbuild/i386: re-introduce dependency on vmlinux for install target, ↵Sam Ravnborg2005-04-301-3/+4
| | | | | | | | | | | | | | | | | | | | | and add kernel_install Removing the dependency on vmlinux for the install target raised a few complaints, so instead a new target i added: kernel_install. kernel_install will install the kernel just like the ordinary install target. The only difference is that install has a dependency on vmlinux, kernel_install does not. Therefore kernel_install is the best choice when accessing the kernel over a NFS mount or as another user. kernel_install is similar to modules_install in the fact that neither does a full kernel compile before performing the install. In this way they are good for root use. Also added back the dependency on vmlinux for the install target so peoples scripts are no longer broken. Signed-off-by: Sam Ravnborg <sam@ravnborg.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* Merge of master.kernel.org:/home/rmk/linux-2.6-rmk.gitLinus Torvalds2005-04-301-1/+16
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| * [PATCH] ARM: IntegratorCP: Fix CLCD MUX selection valuesRussell King2005-04-301-1/+16
| | | | | | | | | | | | | | The documentation on these values seems to be rather wrong. These values have been determined by mere trial and error. Signed-off-by: Russell King <rmk@arm.linux.org.uk>
* | Merge of master.kernel.org:/home/rmk/linux-2.6-rmk.gitLinus Torvalds2005-04-303-19/+52
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| * [PATCH] ARM: PXA I2C: add platform deviceRussell King2005-04-301-0/+25
| | | | | | | | | | | | Add the PXA I2C platform device. Signed-off-by: Russell King <rmk@arm.linux.org.uk>
| * [PATCH] ARM: RTC: allow driver methods to return errorRussell King2005-04-302-19/+27
| | | | | | | | | | | | | | Allow RTC drivers to return error codes from their read_time or read_alarm methods. Signed-off-by: Russell King <rmk@arm.linux.org.uk>
* | [PATCH] ppc64: fix 32-bit signal frame back linkPaul Mackerras2005-04-301-2/+2
|/ | | | | | | | | | | | | | | | | When the kernel creates a signal frame on the user stack, it puts the old stack pointer value at the beginning so that the signal frame is linked into the chain of stack frames like any other frame. Unfortunately, for 32-bit processes we are writing the old stack pointer as a 64-bit value rather than a 32-bit value, and the process sees that as a null pointer, since it only looks at the first 32 bits, which are zero since ppc is bigendian and the stack pointer is below 4GB. This bug is in SLES9 and RHEL4 too, hence the ccs. This patch fixes the bug by making the signal code write the old stack pointer as a u32 instead of an unsigned long. Signed-off-by: Paul Mackerras <paulus@samba.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* Merge of master.kernel.org:/home/rmk/linux-2.6-rmk.gitLinus Torvalds2005-04-298-29/+434
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| * [PATCH] ARM: 2660/2: fix ixdp2800 boot and pci initLennert Buytenhek2005-04-292-14/+135
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Patch from Lennert Buytenhek The IXDP2800 is an evalution platform for the IXP2800 processor that has two IXP2800s connected to the same PCI bus. This is problematic as both CPUs will try to configure the PCI bus as they boot linux. Contrary to on the other IXP2000 platforms, the boot loader on the IXDP2800 doesn't configure the PCI bus properly, so we do want the linux instance on one of the CPUs to do that. Making one of the CPUs ignore the PCI bus (and thus act like a pure PCI slave device) is not an option because there is a 82559 NIC on the PCI bus for each of the CPUs. The chosen solution is to have the master CPU configure the PCI bus while the slave is kept in a quiescent state, and then to have the slave CPU scan the PCI bus (without assigning resources) while the master is kept in a quiescent state. After this ritual, the master deletes the slave NIC from its PCI device list, the slave deletes the master NIC from its device list, and (almost) all is well. There's still one little problem: each of the CPUs has a 1G SDRAM BAR, but the IXP2000 only has 512M of outbound PCI memory window. We solve this by hand-assigning the master and slave SDRAM BARs to a location outside each of the IXP's outbound PCI windows, and by having the rest of the BARs autoconfigured in the outbound PCI windows, in the range [e0000000..ffffffff], so that there is a 1:1 pci:phys mapping between them. Even with this patch, a number of issues still remain -- just imagine what happens if one of the CPUs is rebooted, by watchdog or by hand, but the other one isn't. But those issues are not easily fixable given the strange PCI layout of this board and the behavior of the boot loader shipped with the platform. Signed-off-by: Lennert Buytenhek Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * [PATCH] ARM: 2656/1: Access permission bits are wrong for kernel XIP ↵George G. Davis2005-04-291-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | sections on ARMv6 Patch from George G. Davis This patch is required for kernel XIP support on ARMv6 machines. It ensures that the access permission bits for kernel XIP section descriptors are APX=1 and AP[1:0]=01, which is Kernel read-only/User no access permissions. Prior to this change, kernel XIP section descriptor access permissions were set to Kernel no access/User no access on ARMv6 machines and the kernel would therefore hang upon entry to userspace when set_fs(USER_DS) was executed. Signed-off-by: Steve Longerbeam Signed-off-by: George G. Davis Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * [PATCH] ARM: 2651/3: kernel helpers for NPTL supportNicolas Pitre2005-04-293-9/+276
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Patch from Nicolas Pitre This patch entirely reworks the kernel assistance for NPTL on ARM. In particular this provides an efficient way to retrieve the TLS value and perform atomic operations without any instruction emulation nor special system call. This even allows for pre ARMv6 binaries to be forward compatible with SMP systems without any penalty. The problematic and performance critical operations are performed through segment of kernel provided user code reachable from user space at a fixed address in kernel memory. Those fixed entry points are within the vector page so we basically get it for free as no extra memory page is required and nothing else may be mapped at that location anyway. This is different from (but doesn't preclude) a full blown VDSO implementation, however a VDSO would prevent some assembly tricks with constants that allows for efficient branching to those code segments. And since those code segments only use a few cycles before returning to user code, the overhead of a VDSO far call would add a significant overhead to such minimalistic operations. The ARM_NR_set_tls syscall also changed number. This is done for two reasons: 1) this patch changes the way the TLS value was previously meant to be retrieved, therefore we ensure whatever library using the old way gets fixed (they only exist in private tree at the moment since the NPTL work is still progressing). 2) the previous number was allocated in a range causing an undefined instruction trap on kernels not supporting that syscall and it was determined that allocating it in a range returning -ENOSYS would be much nicer for libraries trying to determine if the feature is present or not. Signed-off-by: Nicolas Pitre Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * [PATCH] ARM: 2655/1: ARM1136 SWP instruction abort handler fixGeorge G. Davis2005-04-291-0/+16
| | | | | | | | | | | | | | | | | | Patch from George G. Davis As noted in http://www.arm.com/linux/patch-2.6.9-arm1.gz, the "Faulty SWP instruction on 1136 doesn't set bit 11 in DFSR." So the v6_early_abort handler does not report the correct rd/wr direction for the SWP instruction which may result in SEGVS or hangs. In order to work around this problem, this patch merely updates the fix contained in the ARM Ltd. patch to use the macroised abort handler fixups. Signed-off-by: George G. Davis Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * [PATCH] ARM: 2659/1: do not assign PCI I/O address zero on IXP2000Lennert Buytenhek2005-04-291-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Patch from Lennert Buytenhek Assigning the address zero to a PCI device BAR causes some part of the PCI subsystem to believe that resource allocation for that BAR failed due to resource conflicts, which will make attempts to enable the device fail. Work around this by assigning I/O addresses starting from 00010000. While we're at it, make the PCI I/O resource end at 0001ffff, since we only have 64k of outbound I/O window on the IXP2000, and we don't do bank switching. Signed-off-by: Lennert Buytenhek Signed-off-by: Deepak Saxena Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * [PATCH] ARM: 2658/1: start ixp2000 pci memory resource at 0xe0000000Lennert Buytenhek2005-04-291-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Patch from Lennert Buytenhek On the IXDP2800, the bootloader does an awful job of configuring the PCI bus, so we make linux reconfigure everything. Having a 1:1 pci:phys address mapping generally simplifies everything, so try to allocate PCI addresses from the [e0000000..ffffffff] range, which is the physical address range of the outbound PCI window on the IXP2000. This does not affect any of the other IXP2000 platforms since they all use their bootloader's PCI resource assignment. Signed-off-by: Lennert Buytenhek Signed-off-by: Deepak Saxena Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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