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* git://git.kernel.org/pub/scm/linux/kernel/git/davem/sparc-2.6:
sparc64: Update defconfig.
sparc: Kill user copy check code.
sparc64: Fix perf_arch_get_caller_regs().
sparc64: Add missing ID to parport probing code.
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Signed-off-by: David S. Miller <davem@davemloft.net>
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For whatever reason GCC isn't able to figure things out in
the control flow (in particular when min() and max() expressions
are involved) on sparc as well as it can on x86.
So lots of useless incorrect user copy warnings get spewed and the
full-on compile failure mode of the user copy checks were never usable
on sparc at all.
People can debug these kinds of problems on x86.
Signed-off-by: David S. Miller <davem@davemloft.net>
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After b0f82b81fe6bbcf78d478071f33e44554726bc81 ("perf: Drop the skip
argument from perf_arch_fetch_regs_caller") the build broke on sparc64
due to the lack of a module symbol export of __perf_arch_fetch_caller_regs.
But that assembler helper can actually be complete eliminated now that
the semantics of this interface have been greatly simplified.
Signed-off-by: David S. Miller <davem@davemloft.net>
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SunBlade-2500 has 'parallel' device node with compatible
property "pnpALI,1533,3" so add that to the ID table.
Reported-by: Mikael Pettersson <mikpe@it.uu.se>
Tested-by: Mikael Pettersson <mikpe@it.uu.se>
Signed-off-by: David S. Miller <davem@davemloft.net>
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* 'rs485fix' of git://www.jni.nu/cris:
CRIS: ioctl for getting RS485 information
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Add ioctl to CRIS serial driver to get RS485 data from user-space.
Signed-off-by: Claudio Scordino <claudio@evidence.eu.com>
Signed-off-by: Jesper Nilsson <jesper.nilsson@axis.com>
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git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc
* 'merge' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc:
powerpc: fix build with make 3.82
Revert "Input: appletouch - fix integer overflow issue"
memblock: Fix memblock_is_region_reserved() to return a boolean
powerpc: Trim defconfigs
powerpc: fix i8042 module build error
sound/soc: mpc5200_psc_ac97: Use gpio pins for cold reset
powerpc/5200: add mpc5200_psc_ac97_gpio_reset
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Thomas Backlund reported that the powerpc build broke with make 3.82.
It failed with the following message:
arch/powerpc/Makefile:183: *** mixed implicit and normal rules. Stop.
The fix is to avoid mixing non-wildcard and wildcard targets.
Reported-by: Thomas Backlund <tmb@mandriva.org>
Tested-by: Thomas Backlund <tmb@mandriva.org>
Cc: Michal Marek <mmarek@suse.cz>
Cc: stable <stable@kernel.org>
Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
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of_i8042_{kbd,aux}_irq needs to be exported
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
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Work around a silicon bug in the ac97 reset functionality of the
mpc5200(b). The implementation of the ac97 "cold" reset is flawed.
If the sync and output lines are high when reset is asserted the
attached ac97 device may go into test mode. Avoid this by
reconfiguring the psc to gpio mode and generating the reset manually.
From MPC5200B User's Manual:
"Some AC97 devices goes to a test mode, if the Sync line is high
during the Res line is low (reset phase). To avoid this behavior the
Sync line must be also forced to zero during the reset phase. To do
that, the pin muxing should switch to GPIO mode and the GPIO control
register should be used to control the output lines."
Signed-off-by: Eric Millbrandt <emillbrandt@dekaresearch.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
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This trims all our defconfigs using make savedefconfig
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
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git://git.kernel.org/pub/scm/linux/kernel/git/vapier/blackfin
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/vapier/blackfin: (32 commits)
Blackfin: gpio: add a debounce stub
Blackfin: update defconfigs
Blackfin: remove CONFIG_MEM_GENERIC_BOARD
Blackfin: dpmc: punt unnecessary RTC_ISTAT clearing
Blackfin: unify rotary encoder bitmasks
Blackfin: unify SDH/RSI bitmasks
Blackfin: BF54x: tweak DMAC MMR naming to match other ports
Blackfin: TWI: clean up the MMR names
Blackfin: add EVT_OVERRIDE/IPRIO core MMR helpers
Blackfin: add support for dynamic ftrace
Blackfin: add support for LZO compressed kernels
Blackfin: portmux: fix peripheral map overflow when requesting pins
Blackfin: document SPI CS limitations with CPHA=0
Blackfin: remove useless and outdated documentation
Blackfin: BF51x/BF52x: support GPIO Hysteresis/Schmitt Trigger options
Blackfin: gpio/portmux: clean up whitespace corruption
Blackfin: make sure mmiowb inserts a write barrier with SSYNC
Blackfin: fix DMA/cache bug when resuming from suspend to RAM
Blackfin: BF51x: fix handling of PH8 (the "internal" SPI0SEL4 pin)
Blackfin: add a GPIO_DEFAULT_BOOT_SPI_CS
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The GPIO API was extended recently to include debounce functions, but
since the on-chip Blackfin GPIO modules don't support this stuff, make
a stub in the non-GPIOLIB case so drivers build properly.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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MEM_GENERIC_BOARD depends on GENERIC_BOARD, but this flag was removed
in 4f25eb85d64640bc656e72917113a84701521b99, therefore all references
to it from the source can be removed.
Signed-off-by: Christian Dietrich <qy03fugy@stud.informatik.uni-erlangen.de>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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The RTC ISTAT bits do not affect wakeups, and the RTC driver already
takes care of clearing this MMR when necessary. So drop the useless
clearing in the core Blackfin power code.
Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Avoid duplication and ugly global namespace pollution.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Avoid duplication and ugly global namespace pollution.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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The standard short name for control is CTL and not CTRL. Use TWI0_xxx
even on parts that only have one TWI bus to keep things simple. Drop
all the cdef helpers since the bus driver takes care of everything.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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These were partially defined, so fill out the def/cdef pieces properly.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Some processors have groups of pins that aren't an even number of 16.
This causes the array size calculation to under count the number of
needed entries due to integer truncation. So on the BF51x, while we
should have 3 bitmaps (41 / 16), we end up with 2 and pin requests for
the 3rd bank end up scribbling over the top of the GPIO IRQ array.
Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Newer parts have optional Hysteresis/Schmitt Trigger options to help with
dirty signals. So add some kconfig options for tuning this and enable it
by default for people.
Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Random tabs instead of spaces, mixes of the two, and unicode spaces
instead of ascii spaces.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Add SSYNC to our implementation of I/O write barrier to ensure ordering
of I/O space writes. This will make sure that writes following the
barrier will arrive after all previous writes.
Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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The dma_memcpy() function takes care of flushing different caches for us.
Normally this is what we want, but when resuming from mem, we don't yet
have caches enabled. If these functions happen to be placed into L1 mem
(which is what we're trying to relocate), then things aren't going to
work. So define a non-cache dma_memcpy() variant to utilize in situations
like this.
Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Even though the PH8 pin is only internal to the processor packaging, it
can be controlled like any other GPIO pin. Now that we have a proper GPIO
define, we can fix the SPI0 CS4 define for the internal SPI flash.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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This is parallel to the existing P_DEFAULT_BOOT_SPI_CS, but in terms of
the GPIO value so it can be used with the normal gpio API.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Run ONES on the incoming value rather than random garbage. This fixes
random crashes with some networking code.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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The duplicated bit banging logic is getting out of hand, so unify the
local API to make management a lot easier. This also makes the code
a lot easier to follow.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Anomaly 05000491 says that IFLUSH cannot have certain types of memory
stalls triggered before it has completed in order to function correctly.
One such condition is that it be in L1 instruction. So add a config
option to move it there, default it to on, and throw up a warning when
it is turned off and this anomaly exists.
Since the anomaly should be worked around, we can drop the older method
of calling IFLUSH multiple times.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
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Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Design found that these anomalies had the same root issue, so they've
merged 475 into 220. We need to do the same to update to the latest
anomaly sheets.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Keep all anomaly/arch checks in one place to keep logic simple.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Rather than do our own thing, use what common code provides.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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The Blackfin processor has no FPU, so there are no FPU regs to dump.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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These are useful when working with C structs of MMRs as the appropriate
size is selected based on the given argument.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Now that the NFC driver has its own defines, scrub the ones from the
global namespace to avoid ugly collisions with common code.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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git://git.kernel.org/pub/scm/linux/kernel/git/djbw/async_tx
* 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/djbw/async_tx: (30 commits)
DMAENGINE: at_hdmac: locking fixlet
DMAENGINE: pch_dma: kill another usage of __raw_{read|write}l
dma: dmatest: fix potential sign bug
ioat2: catch and recover from broken vtd configurations v6
DMAENGINE: add runtime slave control to COH 901 318 v3
DMAENGINE: add runtime slave config to DMA40 v3
DMAENGINE: generic slave channel control v3
dmaengine: Driver for Topcliff PCH DMA controller
intel_mid: Add Mrst & Mfld DMA Drivers
drivers/dma: Eliminate a NULL pointer dereference
dma/timb_dma: compile warning on 32 bit
DMAENGINE: ste_dma40: support older silicon
DMAENGINE: ste_dma40: support disabling physical channels
DMAENGINE: ste_dma40: no disabled phy channels on ux500
DMAENGINE: ste_dma40: fix suspend bug
DMAENGINE: ste_dma40: add DB8500 memcpy channels
DMAENGINE: ste_dma40: no flow control on memcpy
DMAENGINE: ste_dma40: arch updates for LCLA and LCPA
DMAENGINE: ste_dma40: allocate LCLA dynamically
DMAENGINE: ste_dma40: no premature stop
...
Fix up trivial conflicts in arch/arm/mach-ux500/devices-db8500.c
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This makes sure the DMA40 driver will also work on the oldest
silicon revisions that have the on-chip memory on another location
in the DB8500 and also requires explicit suspend before starting
or resuming a logical channel.
Signed-off-by: Linus Walleij <linus.walleij@stericsson.com>
[added parenthesis to the definition of U8500_DMA_LCPA_BASE_ED]
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
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Make sure we have no disabled physical channels when we start on
the ux500 machines.
Signed-off-by: Jonas Aaberg <jonas.aberg@stericsson.com>
Signed-off-by: Linus Walleij <linus.walleij@stericsson.com>
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
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This adds all available memcpy channels to the DB8500 in the
ux500 platform (and fixes a typo).
Signed-off-by: Jonas Aaberg <jonas.aberg@stericsson.com>
Signed-off-by: Linus Walleij <linus.walleij@stericsson.com>
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
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On memcpy DMA operations we don't need flow control.
Signed-off-by: Jonas Aaberg <jonas.aberg@stericsson.com>
Signed-off-by: Linus Walleij <linus.walleij@stericsson.com>
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
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This follows on the patch to allocate LCLA dynamically: the
on-chip memory is needed for other things so now that that
we're using it dynamically we can remove the LCLA resource
altogether and free up some ESRAM memory.
Signed-off-by: Jonas Aaberg <jonas.aberg@stericsson.com>
Signed-off-by: Linus Walleij <linus.walleij@stericsson.com>
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
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