summaryrefslogtreecommitdiffstats
path: root/arch
Commit message (Collapse)AuthorAgeFilesLines
* [MIPS] remove LASAT Networks platforms supportYoichi Yuasa2007-07-1071-3730/+0
| | | | | Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Add debugfs files to show fpuemu statisticsAtsushi Nemoto2007-07-101-0/+34
| | | | | | | | | | | Export contents of struct mips_fpu_emulator_stats via debugfs. There is no way to read these statistics for now but they (at least the "emulated" count) might be sometimes useful for performance tuning on FPU-less CPUs. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Add some debugfs files to debug unaligned accessesAtsushi Nemoto2007-07-102-3/+54
| | | | | | | | | | | | | | | Currently a number of unaligned instructions is counted but not used. Add /debug/mips/unaligned_instructions file to show the value. And add /debug/mips/unaligned_action to control behavior upon an unaligned access. Possible actions are: 0: silently fixup the unaligned access. 1: send SIGBUS. 2: dump registers, process name, etc. and fixup. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] rbtx4938: Fix secondary PCIC and glue internal NICsAtsushi Nemoto2007-07-102-63/+70
| | | | | | | | | | | | | | * Fix pci ops for secondary PCIC * Do not reserve 1MB for PCI MEM region (leave PCIBIOS_MIN_MEM zero) * Use platform_device to provide ethernet addresses for internal NICs. (background: TX49XX SoCs include PCI NIC (TC35815 compatible) connected via its internal PCI bus, but the NIC's PROM interface is not connected to SEEPROM. So we must provide its ethernet address by another way.) * Check return value of early_read_config_word() Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Move FPU affinity code into separate file.Ralf Baechle2007-07-103-169/+177
| | | | | | Gets rid of some of the CONFIG_MIPS_MT_FPAFF #ifdefery. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Make ioremap() work on TX39/49 special unmapped segmentAtsushi Nemoto2007-07-101-0/+2
| | | | | | | | | | | | | TX39XX and TX49XX have "reserved" segment in CKSEG3 area. 0xff000000-0xff3fffff on TX49XX and 0xff000000-0xfffeffff on TX39XX are reserved (unmapped, uncached). Controllers on these SoCs are placed in this segment. This patch add plat_ioremap() and plat_iounmap() to override default behavior and implement these hooks for TX39/TX49. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] rbtx4938: Update and minimize defconfigAtsushi Nemoto2007-07-101-794/+102
| | | | | Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] rbtx4938: Convert SPI codes to use generic SPI driversAtsushi Nemoto2007-07-108-634/+218
| | | | | | | | | | | Use rtc-rs5c348 and at25 spi protocol driver and spi_txx9 spi controller driver instead of platform dependent codes. This patch also removes dependencies to old RTC interfaces such as rtc_mips_get_time, etc. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] rbtx4938: Add generic GPIO supportAtsushi Nemoto2007-07-103-0/+106
| | | | | | | | GPIO 0..15 are for TX4938 PIO pins, GPIO 16..18 are for FPGA-driven chipselect signals for SPI devices. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] SNI RM updatesThomas Bogendoerfer2007-07-108-112/+95
| | | | | | | | | | | | - use RTC_CLASS instead of GEN_RTC - get rid of ds1216 in favour of a RTC_CLASS driver - use correct console device for older RM400 - use physical addresses for 82596 device - use 128 byte L1 cache line size (this is needed because most of the SNI caches are using 128 L2 cache lines) Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] PMC MSP71xx default configurationMarc St-Jean2007-07-101-0/+1495
| | | | | | | | Patch to add default configuration for the PMC-Sierra MSP71xx devices. Signed-off-by: Marc St-Jean <Marc_St-Jean@pmc-sierra.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] PMC MSP71xx PCI supportMarc St-Jean2007-07-104-0/+1263
| | | | | | | Patch to add PCI support for the PMC-Sierra MSP71xx devices. Signed-off-by: Marc St-Jean <Marc_St-Jean@pmc-sierra.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] PMC MSP71xx mips commonMarc St-Jean2007-07-106-2/+121
| | | | | | | Patch to add mips common support for the PMC-Sierra MSP71xx devices. Signed-off-by: Marc St-Jean <Marc_St-Jean@pmc-sierra.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] PMC MSP71xx core platformMarc St-Jean2007-07-1010-0/+1669
| | | | | | | Patch to add core platform support for the PMC-Sierra MSP71xx devices. Signed-off-by: Marc St-Jean <Marc_St-Jean@pmc-sierra.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] New files for lemote fulong mini-PC supportSongmao Tian2007-07-1015-55/+2840
| | | | | | Signed-off-by: Fuxin Zhang <zhangfx@lemote.com> Signed-off-by: Songmao Tian <tiansm@lemote.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] define Hit_Invalidate_I to Index_Invalidate_I for loongson2Fuxin Zhang2007-07-1010-10/+122
| | | | | Signed-off-by: Fuxin Zhang <zhangfx@lemote.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Enable support for the userlocal hardware registerRalf Baechle2007-07-103-4/+12
| | | | | | | | Which will cut down the cost of RDHWR $29 which is used to obtain the TLS pointer and so far being emulated in software down to a single cycle operation. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] FP affinity: Coding style cleanups Ralf Baechle2007-07-102-48/+51
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Put an end to <asm/serial.h>'s long and annyoing existenceRalf Baechle2007-07-1014-41/+371
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Remove Momenco Ocelot C supportFranck Bui-Huu2007-07-1059-2511/+0
| | | | | | | | | | | | | | | | | | | Signed-off-by: Franck Bui-Huu <fbuihuu@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org> delete mode 100644 arch/mips/configs/ocelot_c_defconfig delete mode 100644 arch/mips/momentum/ocelot_c/Makefile delete mode 100644 arch/mips/momentum/ocelot_c/cpci-irq.c delete mode 100644 arch/mips/momentum/ocelot_c/dbg_io.c delete mode 100644 arch/mips/momentum/ocelot_c/irq.c delete mode 100644 arch/mips/momentum/ocelot_c/ocelot_c_fpga.h delete mode 100644 arch/mips/momentum/ocelot_c/platform.c delete mode 100644 arch/mips/momentum/ocelot_c/prom.c delete mode 100644 arch/mips/momentum/ocelot_c/reset.c delete mode 100644 arch/mips/momentum/ocelot_c/setup.c delete mode 100644 arch/mips/momentum/ocelot_c/uart-irq.c delete mode 100644 arch/mips/pci/fixup-ocelot-c.c delete mode 100644 arch/mips/pci/pci-ocelot-c.c
* [MIPS] IP32: Remove experimental tag from kconfig.Ralf Baechle2007-07-101-2/+1
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] PCI: Make dev pointer argument of pcibios_map_irq const.Ralf Baechle2007-07-1027-27/+28
| | | | | | | This is to break the code of people who think they are supposed to scribble into the pci device structure - it's off limits. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] EV64120: Remove supportYoichi Yuasa2007-07-1056-1621/+2
| | | | | Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] DECstation: Optimised early printk()Maciej W. Rozycki2007-07-103-7/+29
| | | | | | | | | | | | | | | | | | | | | | | This is an optimised implementation of early printk() for the DECstation. After the recent conversion to a MIPS-specific generic routine using a character-by-character output the performance dropped significantly. This change reverts to the previous speed -- even at 9600 bps of the serial console the difference is visible with a naked eye; I presume for a framebuffer it is even worse (it may depend on exactly which one is used though). Additionally the change includes a fix for a problem that the old implementation had -- the format used would not actually limit the length of the string output. This new implementation uses a local buffer to deal with it -- even with this additional copying it is much faster than the generic function. Plus this driver is registered much earlier than the generic one, allowing one to see critical messages, such as one about an incorrect CPU setting used, that are produced beforehand. :-) Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] No I/O ports on the DECstationMaciej W. Rozycki2007-07-101-0/+4
| | | | | | | | There are no I/O ports on the DECstation whatsoever in any configuration as neither the CPU nor the peripheral buses used have a concept of such. Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Remove unused watchpoint support and arch/mips/lib-{32,64}Atsushi Nemoto2007-07-107-131/+0
| | | | | Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] update cobalt_defconfigYoichi Yuasa2007-07-101-270/+228
| | | | | | | | Enable Cobalt button support and change ATA driver from BLK_DEV_VIA82CXXX to PATA_VIA.. Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Remove unused dump_tlb functionsAtsushi Nemoto2007-07-103-265/+2
| | | | | | | Remove unused dump_tlb functions and cleanup some includes. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Unify dump_tlbAtsushi Nemoto2007-07-106-294/+60
| | | | | | | | Unify lib-{32,64}/dump_tlb.c into lib/dump_tlb.c and move lib-32/r3k_dump_tlb.c to lib directory. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] MIPSsim: Move code away from the other MIPS Inc. BSP code.Ralf Baechle2007-07-1012-33/+125
| | | | | | It shares no code at all. While at it also fix up the beginning bitrot. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Hook for platforms to define cachability of /dev/mem regionsRalf Baechle2007-07-101-0/+10
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Transform old-style macros to newer "__noreturn"Robert P. J. Day2007-07-107-16/+16
| | | | | | | | Convert old/obsolete NORET_TYPE and ATTRIB_NORET macros to use the newer standard of "__noreturn" as defined in compiler-gcc.h. Signed-off-by: Robert P. J. Day <rpjday@mindspring.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] SMTC: Use current_cpu_data instead of cpu_data[smp_processor_id]Ralf Baechle2007-07-101-1/+1
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Add generic GPIO to Au1x00Florian Fainelli2007-07-102-43/+82
| | | | | | | | | | This patch adds support for the generic GPIO API to Au1x00 boards. It requires the generic GPIO patch for MIPS boards by Yoichi Yuasa. Now there is a MIPS target using it, can you queue these patchset for 2.6.22 ? Thank you very much in advance. Signed-off-by: Florian Fainelli <florian.fainelli@telecomint.eu> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Add generic GPIO supportYoichi Yuasa2007-07-101-0/+3
| | | | | Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Simplify missing-syscalls for N32 and O32Atsushi Nemoto2007-07-101-22/+10
| | | | | | | | | Use standard missing-syscalls with EXTRA_CFLAGS instead of duplicating the command. And move the archprepare rule before the archclean rule. Suggested by Franck Bui-Huu. Also add "echo" to show the target ABI. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Remove unused config entriesYoichi Yuasa2007-07-101-11/+0
| | | | | Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* sched: x86, track TSC-unstable eventsIngo Molnar2007-07-091-1/+8
| | | | | | | | track TSC-unstable events and propagate it to the scheduler code. Also allow sched_clock() to be used when the TSC is unstable, the rq_clock() wrapper creates a reliable clock out of it. Signed-off-by: Ingo Molnar <mingo@elte.hu>
* sched: zap the migration init / cache-hot balancing codeIngo Molnar2007-07-095-66/+0
| | | | | | | | | | | | | | | | | | | | | | the SMP load-balancer uses the boot-time migration-cost estimation code to attempt to improve the quality of balancing. The reason for this code is that the discrete priority queues do not preserve the order of scheduling accurately, so the load-balancer skips tasks that were running on a CPU 'recently'. this code is fundamental fragile: the boot-time migration cost detector doesnt really work on systems that had large L3 caches, it caused boot delays on large systems and the whole cache-hot concept made the balancing code pretty undeterministic as well. (and hey, i wrote most of it, so i can say it out loud that it sucks ;-) under CFS the same purpose of cache affinity can be achieved without any special cache-hot special-case: tasks are sorted in the 'timeline' tree and the SMP balancer picks tasks from the left side of the tree, thus the most cache-cold task is balanced automatically. Signed-off-by: Ingo Molnar <mingo@elte.hu>
* Clean up E7520/7320/7525 quirk printk.Dave Jones2007-07-071-3/+2
| | | | | | | | | | | | | | | The printk level in this printk is bogus, as the previous printk didn't have a terminating \n resulting in .. Intel E7520/7320/7525 detected.<6>Disabling irq balancing and affinity It also never printed a \n at all in the case where we didn't do the quirk. Change it to only make noise if it actually does something useful. Signed-off-by: Dave Jones <davej@redhat.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* GEODE: reboot fixup for geode machines with CS5536 boardsAndres Salomon2007-07-062-2/+15
| | | | | | | | | | | | Writing to MSR 0x51400017 forces a hard reset on CS5536-based machines, this has the reboot fixup do just that if such a board is detected. Acked-by: Jordan Crouse <jordan.crouse@amd.com> Signed-off-by: Andres Salomon <dilinger@debian.org> Cc: Alan Cox <alan@lxorguk.ukuu.org.uk> Cc: Andi Kleen <ak@suse.de> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linusLinus Torvalds2007-07-065-12/+19
|\ | | | | | | | | | | | | | | | | | | | | | | * 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus: [MIPS] Fix scheduling latency issue on 24K, 34K and 74K cores [MIPS] Add macros to encode processor revisions. [MIPS] RM7000: Enable ICACHE_REFILLS_WORKAROUND_WAR. [MIPS] SMTC: Fix cut'n'paste bug in Kconfig.debug [MIPS] Change libgcc-style functions from lib-y to obj-y [MIPS] Fix timer/performance interrupt detection [MIPS] AP/SP: Avoid triggering the 34K E125 performance issue [MIPS] 64-bit TO_PHYS_MASK macro for RM9000 processors
| * [MIPS] Fix scheduling latency issue on 24K, 34K and 74K coresRalf Baechle2007-07-061-2/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The idle loop goes to sleep using the WAIT instruction if !need_resched(). This has is suffering from from a race condition that if if just after need_resched has returned 0 an interrupt might set TIF_NEED_RESCHED but we've just completed the test so go to sleep anyway. This would be trivial to fix by just disabling interrupts during that sequence as in: local_irq_disable(); if (!need_resched()) __asm__("wait"); local_irq_enable(); but the processor architecture leaves it undefined if a processor calling WAIT with interrupts disabled will ever restart its pipeline and indeed some processors have made use of the freedom provided by the architecture definition. This has been resolved and the Config7.WII bit indicates that the use of WAIT is safe on 24K, 24KE and 34K cores. It also is safe on 74K starting revision 2.1.0 so enable the use of WAIT with interrupts disabled for 74K based on a c0_prid of at least that. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * [MIPS] SMTC: Fix cut'n'paste bug in Kconfig.debugRalf Baechle2007-07-061-1/+1
| | | | | | | | | | | | This effectivly turned the SMTC_IDLE_HOOK_DEBUG debug option into a no-op. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * [MIPS] Change libgcc-style functions from lib-y to obj-yRalf Baechle2007-07-061-1/+1
| | | | | | | | | | | | | | | | | | Reported by Eugene Surovegin <ebs@ebshome.net>. If only modules were users of these functions they did not get linked into the kernel proper, so later module loads would fail as well. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * [MIPS] Fix timer/performance interrupt detectionChris Dearman2007-07-061-4/+4
| | | | | | | | | | Signed-off-by: Chris Dearman <chris@mips.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * [MIPS] AP/SP: Avoid triggering the 34K E125 performance issueRalf Baechle2007-07-061-4/+0
| | | | | | | | | | | | | | C0_status doesn't need to be initialized at this point anyway; the register will be initialized later. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | i386: es7000 build breakage fixVivek Goyal2007-07-061-0/+48
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | o Commit 1833d6bc72893265f22addd79cf52e6987496e0f broke the build if compiled with CONFIG_ES7000=y and CONFIG_X86_GENERICARCH=n arch/i386/kernel/built-in.o(.init.text+0x4fa9): In function `acpi_parse_madt': : undefined reference to `acpi_madt_oem_check' arch/i386/kernel/built-in.o(.init.text+0x7406): In function `smp_read_mpc': : undefined reference to `mps_oem_check' arch/i386/kernel/built-in.o(.init.text+0x8990): In function `connect_bsp_APIC': : undefined reference to `enable_apic_mode' make: *** [.tmp_vmlinux1] Error 1 o Fix the build issue. Provided the definitions of missing functions. o Don't have ES7000 machine. Only compile tested. Cc: Len Brown <lenb@kernel.org> Cc: Natalie Protasevich <protasnb@gmail.com> Cc: Roland Dreier <rolandd@cisco.com> Cc: Andi Kleen <ak@suse.de> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* | MTRR: Fix race causing set_mtrr to go into infinite loopLoic Prylli2007-07-061-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Processors synchronization in set_mtrr requires the .gate field to be set after .count field is properly initialized. Without an explicit barrier, the compiler was reordering those memory stores. That was sometimes causing a processor (in ipi_handler) to see the .gate change and decrement .count before the latter is set by set_mtrr() (which then hangs in a infinite loop with irqs disabled). Signed-off-by: Loic Prylli <loic@myri.com> Cc: Andi Kleen <ak@suse.de> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* | i386: fix regression, endless loop in ptrace singlestep over an int80Jason Wessel2007-07-061-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The commit 635cf99a80f4ebee59d70eb64bb85ce829e4591f introduced a regression. Executing a ptrace single step after certain int80 accesses will infinitely loop and never advance the PC. The TIF_SINGLESTEP check should be done on the return from the syscall and not before it. I loops on each single step on the pop right after the int80 which writes out to the console. At that point you can issue as many single steps as you want and it will not advance any further. The test case is below: /* Test whether singlestep through an int80 syscall works. */ #define _GNU_SOURCE #include <stdio.h> #include <unistd.h> #include <fcntl.h> #include <sys/ptrace.h> #include <sys/wait.h> #include <sys/mman.h> #include <asm/user.h> #include <string.h> static int child, status; static struct user_regs_struct regs; static void do_child() { char str[80] = "child: int80 test\n"; ptrace(PTRACE_TRACEME, 0, 0, 0); kill(getpid(), SIGUSR1); write(fileno(stdout),str,strlen(str)); asm ("int $0x80" : : "a" (20)); /* getpid */ } static void do_parent() { unsigned long eip, expected = 0; again: waitpid(child, &status, 0); if (WIFEXITED(status) || WIFSIGNALED(status)) return; if (WIFSTOPPED(status)) { ptrace(PTRACE_GETREGS, child, 0, &regs); eip = regs.eip; if (expected) fprintf(stderr, "child stop @ %08lx, expected %08lx %s\n", eip, expected, eip == expected ? "" : " <== ERROR"); if (*(unsigned short *)eip == 0x80cd) { fprintf(stderr, "int 0x80 at %08x\n", (unsigned int)eip); expected = eip + 2; } else expected = 0; ptrace(PTRACE_SINGLESTEP, child, NULL, NULL); } goto again; } int main(int argc, char * const argv[]) { child = fork(); if (child) do_parent(); else do_child(); return 0; } Signed-off-by: Jason Wessel <jason.wessel@windriver.com> Cc: Jeremy Fitzhardinge <jeremy@goop.org> Cc: <stable@kernel.org> Cc: Chuck Ebbert <76306.1226@compuserve.com> Acked-by: Andi Kleen <ak@suse.de> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
OpenPOWER on IntegriCloud