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* sh: minor fixesMagnus Damm2007-09-213-2/+1
| | | | | | | | | | This patch contains the following fixes: - Adds sh7785 support to CONFIG_EARLY_SCIF_CONSOLE_PORT. - Removes duplicate include from rts7751r2d irq code. - Removes CONFIG_CPU_HAS_INTC from sh7720 Kconfig entry. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: intc - irl mode update for sh7780 and sh7785Magnus Damm2007-09-212-4/+84
| | | | | | | | | | | | | | This patch contains the following fixes and improvements: - Fix address typo for INTMSK2 / INTMSKCLR2 registers on sh7780. - Adds IRQ_MODE_IRLnnnn_MASK using intc controller for IRL masking. - Good old IRQ_MODE_IRLnnnn should not register any intc controller. - plat_irq_setup_pins() now selects IRL or IRQ mode. - the holding function is now disabled using ICR0. By default all external pin interrupts are disabled. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: remove CONFIG_CPU_HAS_INTC_IRQMagnus Damm2007-09-213-25/+1
| | | | | | | | | All processor specific interrupt code is now converted to make use of the new intc code. The config option CONFIG_CPU_HAS_INTC_IRQ is because of that pointless. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Fix up heartbeat build and resource size.Paul Mundt2007-09-2111-15/+15
| | | | | | | | | We were abusing the resource size for the number of bits, this has been reworked using proper platform data, so this can be tidied up now. Boards in general only have a 1-byte wide resource, which the ioremap_nocache() case already handles. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: defconfigs for R2D-PLUS and for R2D-1Magnus Damm2007-09-212-329/+1310
| | | | | | | | | | | | | | This patch removes the old r2d config file named rts7751r2d_defconfig and adds separate config files for the two r2d board versions. The two new defconfigs are identical with the exception of board selection: - rts7751r2dplus_defconfig selects CONFIG_RTS7751R2D_PLUS=y - rts7751r2d1_defconfig selects CONFIG_RTS7751R2D_1=y Please remember to update both files with r2d changes in the future. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Kill off volatile silliness in sq_flush_range().Paul Mundt2007-09-211-2/+2
| | | | | | | | | | | CC arch/sh/kernel/cpu/sh4/sq.o arch/sh/kernel/cpu/sh4/sq.c: In function 'sq_flush_range': arch/sh/kernel/cpu/sh4/sq.c:65: warning: passing argument 1 of 'prefetch' discards qualifiers from pointer target type This didn't actually need to be volatile in the first place, so just kill off the qualifier entirely. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: More license string silliness.Paul Mundt2007-09-212-2/+2
| | | | | | 'GPL v2' vs 'GPLv2'. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: heartbeat driver update.Paul Mundt2007-09-217-39/+87
| | | | | | | | | Add some flags for the heartbeat driver, and kill off some duplication in the bit positions for the boards that don't have special cases. This also allows for variable access widths and inversion. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: intc - add support for sh7206Magnus Damm2007-09-212-52/+159
| | | | | | | | | This patch converts the cpu specific interrupt setup code for sh7206 from ipr to intc. New vectors are also added to match the information provided by the datasheet. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: intc - add support for sh7619Magnus Damm2007-09-212-38/+57
| | | | | | | | | This patch converts the cpu specific interrupt setup code for sh7619 from ipr to intc. New vectors are also added to match the information provided by the datasheet. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: fix irqs for the second serial port on sh7206Magnus Damm2007-09-211-4/+4
| | | | | | | | | This patch makes sure the serial port interrupt irqs matches the datasheet. Only irqs for SCIF1 are changed. While at some cosmetic spaces are added. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: intc - primary priority masking fixesMagnus Damm2007-09-211-5/+28
| | | | | | | | | | | | | | | | | | | | This patch contains various intc fixes for problems reported by Markus Brunner on the linuxsh-dev mailing list: http://marc.info/?l=linuxsh-dev&m=118701948224991&w=1 Apart from added comments, the fixes are: - add intc_set_priority() function prototype to hw_irq.h - fix off-by-one error in intc_set_priority() - make sure _INTC_WIDTH() is set for primary priority masking Big thanks to Markus for finding these problems. Version two fixes a compile error and an inverted primary check. Signed-off-by: Magnus Damm <damm@igel.co.jp> Acked-by: Markus Brunner <super.firetwister@gmail.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: intc - mark data structures as __initdataMagnus Damm2007-09-2111-79/+76
| | | | | | | | | | | With the intc core improved it is now possible to put the intc data structures in the initdata section. Version two of this patch puts the __initdata inside DECLARE_INTC_DESC() and removes the __initdata included in the board specific r2d code. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: x3 - add ipi vectorsMagnus Damm2007-09-211-0/+9
| | | | | | | | With the intc dual prio register support in place it is now possible to add the ipi vectors to x3. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: replace sh specific CONFIG_VOYAGERGX with CONFIG_MFD_SM501Magnus Damm2007-09-214-31/+25
| | | | | | | | | This patch replaces all instances of CONFIG_VOYAGERGX with CONFIG_MFD_SM501. While at it we make sure the r2d code compiles both with and without SM501. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: intc - convert board specific r2d codeMagnus Damm2007-09-214-62/+151
| | | | | | | | | | | | | | | | | | | | | This patch converts the board specific interrupt code for r2d to make use of intc. While at it we improve the Kconfig to avoid confusion. - Two sets of interrupt tables exist - one for R2D-1 and one for R2D-PLUS. - R2D-1 and R2D-PLUS use the same irq constants. - R2D-1 has AX88796 support, R2D-PLUS does not hook up that IRQ. - R2D-PLUS has KEY support, R2D-1 does not hook up that IRQ. - The number and order of IRQ values are disconnected from register bits. - Interrupt sources now start from IRQ 100. - The machvec demux function converts from irlm IRQ 0-14 to IRQ 100++. Tested on R2D-1 and R2D-PLUS boards. Version 2 adds CONFIG_RTS7751R2D_1 and CONFIG_RTS7751R2D_PLUS together with intc structured as __initdata. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: intc - rework core codeMagnus Damm2007-09-212-212/+328
| | | | | | | | | | | | | | | | | This patch reworks the intc core, implementing the following features: - Support dual priority registers - one set and one clear register - All 8/16/32 bit register combinations are now supported - Both single mask and single enable bitmap register are supported - Add code to set interrupt priority - Speedup sense and priority configuration code - Allocate data using bootmem, allows intc data structures to be __initdata - Save memory - allocated memory footprint is smaller than intc structures Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: intc - add a clear register to struct intc_prio_regMagnus Damm2007-09-2110-96/+104
| | | | | | | | We need a secondary register member in struct intc_prio_reg to support dual priority registers used by ipi on x3. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: x3 - fix setup_bootmem_node() compile error with shx3_defconfigMagnus Damm2007-09-211-0/+1
| | | | | | | | | This makes sure the function prototype for setup_bootmem_node() gets included. The file setup-shx3.c does not compile otherwise for CONFIG_NUMA=n. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Add SH7720 CPU support.Markus Brunner2007-09-2110-9/+271
| | | | | | | | This adds support for the SH7720 (SH3-DSP) CPU. Signed-off by: Markus Brunner <super.firetwister@gmail.com> Signed-off by: Mark Jonas <toertel@gmail.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Kill off duplicate symbol exports on SMP.Paul Mundt2007-09-211-6/+1
| | | | | | | synchronize_irq() was being exported twice, kill off the duplicate export. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Wire up CSM node for SH-X3.Paul Mundt2007-09-211-5/+8
| | | | | | | Now that NODES_SHIFT is bumped up, we can plug in the CSM block as a separate node, too. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Bump up NODES_SHIFT for SH-X3.Paul Mundt2007-09-211-0/+1
| | | | | | | This was at 1, which is where most subtypes want it. SH-X3 has more nodes, so bump it up to 3. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: x3proto: Trivial ILSEL build fix.Paul Mundt2007-09-211-3/+3
| | | | Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: x3proto: Hook up ethernet and USB platform devices.Paul Mundt2007-09-211-0/+82
| | | | | | | Now that we have a way of enabling the IRQs, hook up the platform devices and wrap in to ILSEL for mapping the vectors. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: x3proto: ILSEL IRQ support.Paul Mundt2007-09-212-1/+152
| | | | | | | | This adds functionality for the on-board ILSEL IRQs that chain IRL mode events. Many on-board devices (ethernet, usb, etc.) rely on ILSEL IRQs directly. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Initial support for SH-X3 prototype board.Paul Mundt2007-09-214-0/+60
| | | | | | | | This adds initial support for the SH-X3 prototype board. Only simple logic for the IRQ controller and the heartbeat driver for now. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Plug in SH-X3 SCIF0 for sercon earlyprintk.Paul Mundt2007-09-211-1/+3
| | | | Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: intc: Fix sense regs oops for IRL IRQs.Paul Mundt2007-09-211-1/+1
| | | | | | | | IRL doesn't always define sense registers, so don't bother trying to iterate through the table. This ended up causing an oops on SH-X3 when using IRL mode. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: remove intc2 codeMagnus Damm2007-09-214-91/+0
| | | | | | | There is no point in keeping around the now unused intc2 code. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: intc - convert voyagergx codeMagnus Damm2007-09-213-136/+63
| | | | | | | | | | | | | | | | | | | | This patch converts the sh-specific voyagergx interrupt code to make use of intc. A lot of "interesting" old cruft gets replaced with intc tables and some simple demux code. - All interrupt sources in the sm501 data sheet are now in the header. - The number and order of IRQ values are disconnected from register bits. - Interrupt sources now start from IRQ 200. - set_irq_chained_handler() is now used to hook up the demux function. In the future it would probably make sense to move the interrupt demuxer into into the mfd driver, but this is probably a nice step in the right direction until that happens. Tested on a R2D-1 board using the serial port hooked up to the sm501. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: intc - add single bitmap register supportMagnus Damm2007-09-211-11/+62
| | | | | | | | | | | | This patch adds single bitmap register support to intc. The current code only handles 16 and 32 bit registers where a set bit means interrupt enabled, but this is easy to extend in the future. The INTC_IRQ() macro is also added to provide a way to hook in interrupt controllers for FPGAs in boards or companion chips. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: intc - remove redundant irq code for shminMagnus Damm2007-09-212-25/+5
| | | | | | | | | This patch removes redundant interrupt code for the shmin board which is using a sh770x processor and 4 IRQ lines as individual interrupts (IRQ-mode). Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: intc - remove redundant irq code for sh03, snapgear and titanMagnus Damm2007-09-215-87/+15
| | | | | | | | | | | | | | This patch removes redundant board specific interrupt code for boards using sh775x processors and 4 IRQ lines in "Individual Interrupt Mode" aka IRLM. Three boards are affected: sh03, snapgear and titan. The right way to do this is to use cpu specific code provided by intc. A nice side effect is that sh03 now compiles, board not BROKEN any more. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* rtc: rtc-sh: Support 4-digit year on SH7705/SH7710/SH7712.Paul Mundt2007-09-212-3/+19
| | | | | | | | | | | | | | All SH-4 parts have a 4-digit year, while the SH-3 parts typically only use a 2-digit one. The SH7705, SH7710, and SH7712 SH-3 parts however opted to extend it to 4-digit and still look and act like an SH-3 RTC in all other ways. This adds a capability flag (RTC_CAP_4_DIGIT_YEAR) that these corner-case CPU subtypes can set in their platform data and cleans up some of the ifdef mess in the driver as a result. Reported-by: Markus Brunner <super.firetwister@gmail.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Initial multiple-node support for SH-X3.Paul Mundt2007-09-212-0/+17
| | | | | | Wire up CPU#0 URAM as node 1 on SH-X3. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: intc - add support for x3Magnus Damm2007-09-212-17/+189
| | | | | | | | | | | This patch converts the cpu specific interrupt setup code for x3 from intc2 to intc. New vectors are also added to match the preliminary information. Use plat_irq_setup_pins() to select between IRQ and IRL mode for IRQ0-3. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: intc - fix IRQ4 and IRQ5 typo on sh3Magnus Damm2007-09-213-3/+3
| | | | | | | | | | The intc tables for sh3 currently contain a typo where the bit fields in IPRD are mixed up for IRQ4 and IRQ5. This patch makes sure the correct bit fields are used - all according to the datasheets. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Fix cache disabling build failures on nommu.Paul Mundt2007-09-211-10/+14
| | | | | | | The cache disabling stuff screwed up some of the sh4 nommu builds, fix it up again. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: simplify se7780 IRQ codeMagnus Damm2007-09-212-28/+1
| | | | | | | | The new intc code handles IRQ3 and IRQ7 in the cpu specific code already, so there is no reason to duplicate that here. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: intc - add support for SH7760Magnus Damm2007-09-212-109/+147
| | | | | | | | | | | | | | | | This patch converts the cpu specific interrupt setup code for sh7760 from ipr + intc2 to intc. New vectors are also added to match the information provided by the datasheet. Vectors for IRQ4-IRQ7 are enabled by default. Use plat_irq_setup_pins() if pins IRL0-3 should be used in IRLM mode. The patch also adds the SIM block to the serial port platform data. Version two of this patch fixes MMCIF problems reported by Manuel Lauss. Signed-off-by: Magnus Damm <damm@igel.co.jp> Acked-by: Manuel Lauss <mano@roarinelk.homelinux.net> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: intc - add support for SH7785Magnus Damm2007-09-212-34/+223
| | | | | | | | | | | | This patch converts the cpu specific interrupt setup code for sh7785 from intc2 to intc. New vectors are also added to match the information provided by the datasheet. No IRQ/IRL pin vectors are enabled by default. Use plat_irq_setup_pins() to select between IRL and IRQ mode. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Support explicit L1 cache disabling.Paul Mundt2007-09-216-26/+49
| | | | | | | | | This reworks the cache mode configuration in Kconfig, and allows for explicit selection of write-back/write-through/off configurations. All of the cache flushing routines are optimized away for the off case. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: intc - avoid SH7710 specific vector on SH7712Magnus Damm2007-09-211-2/+7
| | | | | | | | This patch makes sure that the sh7710 specific ipsec vector is missing if building for a sh7712. All according to the datasheet. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: intc - add missing vectors for SH7707Magnus Damm2007-09-211-0/+8
| | | | | | | | | This patch adds a few missing vectors for sh7707. The only interrupt controller differences between sh7707 and sh7709 seem to be added vectors for one LCD controller and two PCMCIA slots. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: intc - add support for SH7706, SH7707, SH7708, SH7709Magnus Damm2007-09-215-194/+220
| | | | | | | | | | | | | | | | | | | This patch unifies the cpu specific interrupt setup code for sh7706, sh7707, sh7708 and sh7709 and moves the code into a new file called setup-sh770x.c. It makes sense to share the setup code between these processors because most hardware blocks are identical from a software point of view. With this patch the sh770x processors now have a complete set of vectors that match with the information provided by the data sheets. This is a big improvement for sh7708. Vectors for IRQ4 and IRQ5 are enabled by default. Use plat_irq_setup_pins() if pins IRQ0-3 should be used in IRQ mode. This patch also unifies the platform device setup code which means that the rtc driver now has platform data for all sh770x processors. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: intc - add support for SH7710Magnus Damm2007-09-212-55/+132
| | | | | | | | | | | | | | | | | This patch converts the cpu specific interrupt setup code for sh7710 from ipr to intc. While at it new vectors are added to match the information provided by the datasheet. Version two simplifies the Kconfig part. Vectors for IRQ4 and IRQ5 are enabled by default. Use plat_irq_setup_pins() if pins IRQ0-3 should be used in IRQ mode. This patch also adds sh7710 specific platform data for the rtc driver. The base address of SCIF1 is adjusted to match the datasheet. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: intc - add support for SH7705Magnus Damm2007-09-212-45/+119
| | | | | | | | | | | | | | | This patch converts the cpu specific interrupt setup code for sh7705 from ipr to intc. While at it new vectors are added to match the information provided by the datasheet. Vectors for IRQ4 and IRQ5 are enabled by default. Use plat_irq_setup_pins() if pins IRQ0-3 should be used in IRQ mode. This patch also adds sh7705 specific platform data for the rtc driver. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* [x86 setup] Fix typo in arch/i386/boot/header.SPaul Bolle2007-09-201-1/+1
| | | | | | | | There's an obvious typo in arch/i386/boot/header.S (in your linux-2.6-x86setup.git) that I noticed by just studying the code. Signed-off-by: Paul Bolle <pebolle@tiscali.nl> Signed-off-by: H. Peter Anvin <hpa@zytor.com>
* [acpi] Correct the decoding of video mode numbers in wakeup.SH. Peter Anvin2007-09-202-65/+23
| | | | | | | | | | | | | | | wakeup.S looks at the video mode number from the setup header and looks to see if it is a VESA mode. Unfortunately, the decoding is done incorrectly and it will attempt to frob the VESA BIOS for any mode number 0x0200 or larger. Correct this, and remove a bunch of #if 0'd code. Massive thanks to Jeff Chua for reporting the bug, and suffering though a large number of experiments in order to track this problem down. Cc: Pavel Machek <pavel@ucw.cz> Signed-off-by: H. Peter Anvin <hpa@zytor.com>
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