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* ARM: mxc: Fix i2c_board_info definitionsSascha Hauer2009-08-145-18/+9
| | | | | | | | | Fix i2c_board_info definitions - we were defining the 'type' field of these structures twice since the first argument of I2C_BOARD_INFO sets this field. Move the second definition into I2C_BOARD_INFO(). Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Acked-by: Jean Delvare <khali@linux-fr.org>
* Add support for Eukrea's MBIMX27Eric Benard2009-08-074-0/+279
| | | | | | | | | MBIMX27 is the evaluation board for CPUIMX27 and integrates : a QVGA TFT, a SPI touchscreen controler, a SDCard connector wired to SDHC1. Signed-off-by: Eric Benard <eric@eukrea.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Add support for Eukrea's CPUIMX27Eric Benard2009-08-074-1/+275
| | | | | | | | | | CPUIMX27 is built around Freescale's i.MX27 and has up to 64MB of NOR Flash, up to 512MB of NAND Flash and up to 256MB of mDDR, it includes an ethernet PHY in MII mode, an I2C RTC and a ST16554 QuadUART on nCS3. Signed-off-by: Eric Benard <eric@eukrea.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* MX27: Add USB platform devices and resourcesjavier Martin2009-08-073-1/+104
| | | | | | | This adds clocks and resources for usb in i.mx27 SoC. Signed-off-by: Javier Martin <javier.martin@vista-silicon.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* MX3: add additional USB pins to iomuxDaniel Mack2009-08-071-0/+13
| | | | | Signed-off-by: Daniel Mack <daniel@caiaq.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ehci mxc: Fix clocksSascha Hauer2009-08-071-0/+6
| | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* MX3: Add USB platform devices and resourcesDaniel Mack2009-08-072-0/+68
| | | | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Daniel Mack <daniel@caiaq.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* [ARM] MXC: remove the now unused #ifndef CONFIG_COMMON_CLKDEVSascha Hauer2009-08-071-154/+0
| | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* [ARM] MXC: Switch MX1 to clkdev supportSascha Hauer2009-08-072-56/+29
| | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* MXC PLL decoding: calculate mfn value with less magicSascha Hauer2009-08-071-7/+9
| | | | | | Also, use cpu_is_* macros rather than CONFIG_ARCH_* Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* MXC: pwm driver fixesSascha Hauer2009-08-071-1/+3
| | | | | | | - fix off-by-one error in divider calculation - disable pwm in pwm_disable Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* MXC gpio interrupt support: move register definitions to .c fileSascha Hauer2009-08-074-42/+17
| | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* mxc gpio: CONFIG_ARCH_* -> cpu_is_*()Sascha Hauer2009-08-071-14/+11
| | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* pcm038: Add support for SJA1000 on baseboardSascha Hauer2009-08-071-0/+29
| | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* pcm037: Add support for SJA1000 on baseboardSascha Hauer2009-08-071-0/+30
| | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* imxfb: Add support for multiple displaysSascha Hauer2009-08-073-57/+88
| | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* imxfb: calculate bpix value from bits_per_pixelSascha Hauer2009-08-071-1/+2
| | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* mx1: Codingstyle: Let the compiler count arraysSascha Hauer2009-08-072-62/+39
| | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* mx3: Codingstyle: Let the compiler count arraysSascha Hauer2009-08-074-24/+16
| | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* mx2: Codingstyle: Let the compiler count arraysSascha Hauer2009-08-071-92/+73
| | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* mx2: remove mxc_irda platform deviceSascha Hauer2009-08-072-25/+0
| | | | | | | Irda support is handled by the normal ims serial driver, so we do not need this device. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* MXC iomux-v3: Fix defines for PAD_CTL registersSascha Hauer2009-08-071-17/+13
| | | | | | | The old defines leaked in from an old version of the patch. Change the defines to match the register layout of the iomuxer. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* mxc: turn to soc specific init_irq functionsSascha Hauer2009-08-0722-21/+53
| | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* mxc: remove do not include directlySascha Hauer2009-08-075-21/+0
| | | | | | Everyone should be free to include the files he actually needs. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* MXC: remove board specific setup of MXC_LL_UART_[PV]ADDRSascha Hauer2009-08-0717-119/+21
| | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* MXC uncompress macros: determine uart base by machine typeSascha Hauer2009-08-071-18/+42
| | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* mxc: remove ARCH_NR_GPIOSSascha Hauer2009-08-072-6/+0
| | | | | | Use the default value of 256 which is enough for all i.MX SoCs. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* system.c: runtime base addressSascha Hauer2009-08-075-9/+19
| | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* MXC: pass base/irq to mxc_timer_initSascha Hauer2009-08-077-25/+9
| | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Merge branch 'perf-counters-for-linus' of ↵Linus Torvalds2009-07-221-20/+233
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/peterz/linux-2.6-perf * 'perf-counters-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/peterz/linux-2.6-perf: (31 commits) perf_counter tools: Give perf top inherit option perf_counter tools: Fix vmlinux symbol generation breakage perf_counter: Detect debugfs location perf_counter: Add tracepoint support to perf list, perf stat perf symbol: C++ demangling perf: avoid structure size confusion by using a fixed size perf_counter: Fix throttle/unthrottle event logging perf_counter: Improve perf stat and perf record option parsing perf_counter: PERF_SAMPLE_ID and inherited counters perf_counter: Plug more stack leaks perf: Fix stack data leak perf_counter: Remove unused variables perf_counter: Make call graph option consistent perf_counter: Add perf record option to log addresses perf_counter: Log vfork as a fork event perf_counter: Synthesize VDSO mmap event perf_counter: Make sure we dont leak kernel memory to userspace perf_counter tools: Fix index boundary check perf_counter: Fix the tracepoint channel to perfcounters perf_counter, x86: Extend perf_counter Pentium M support ...
| * perf_counter: Remove unused variablesPeter Zijlstra2009-07-221-2/+0
| | | | | | | | | | | | Fix a gcc unused variables warning. Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
| * perf_counter, x86: Extend perf_counter Pentium M supportDaniel Qarras2009-07-131-4/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | I've attached a patch to remove the Pentium M special casing of EMON and as noticed at least with my Pentium M the hardware PMU now works: Performance counter stats for '/bin/ls /var/tmp': 1.809988 task-clock-msecs # 0.125 CPUs 1 context-switches # 0.001 M/sec 0 CPU-migrations # 0.000 M/sec 224 page-faults # 0.124 M/sec 1425648 cycles # 787.656 M/sec 912755 instructions # 0.640 IPC Vince suggested that this code was trying to address erratum Y17 in Pentium-M's: http://download.intel.com/support/processors/mobile/pm/sb/25266532.pdf But that erratum (related to IA32_MISC_ENABLES.7) does not affect perfcounters as we dont use this toggle to disable RDPMC and WRMSR/RDMSR access to performance counters. We keep cr4's bit 8 (X86_CR4_PCE) clear so unprivileged RDPMC access is not allowed anyway. Cc: Vince Weaver <vince@deater.net> Cc: Peter Zijlstra <a.p.zijlstra@chello.nl> Cc: Stephane Eranian <eranian@googlemail.com> LKML-Reference: <new-submission> Signed-off-by: Ingo Molnar <mingo@elte.hu>
| * perf_counter: Clean up global vs counter enablePeter Zijlstra2009-07-101-8/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Ingo noticed that both AMD and P6 call x86_pmu_disable_counter() on *_pmu_enable_counter(). This is because we rely on the side effect of that call to program the event config but not touch the EN bit. We change that for AMD by having enable_all() simply write the full config in, and for P6 by explicitly coding it. Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl> LKML-Reference: <new-submission> Signed-off-by: Ingo Molnar <mingo@elte.hu>
| * perf_counter: Fix up P6 PMU detailsPeter Zijlstra2009-07-101-5/+23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The P6 doesn't seem to support cache ref/hit/miss counts, so we extend the generic hardware event codes to have 0 and -1 mean the same thing as for the generic cache events. Furthermore, it turns out the 0 event does not count (that is, its reported that on PPro it actually does count something), therefore use a event configuration that's specified not to count to disable the counters. Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl> LKML-Reference: <new-submission> Signed-off-by: Ingo Molnar <mingo@elte.hu>
| * perf_counter: Add P6 PMU supportVince Weaver2009-07-101-14/+213
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add basic P6 PMU support. The P6 uses the EVNTSEL0 EN bit to enable/disable both its counters. We use this for the global enable/disable, and clear all config bits (except EN) to disable individual counters. Actual ia32 hardware doesn't support lfence, so use a locked op without side-effect to implement a full barrier. perf stat and perf record seem to function correctly. [a.p.zijlstra@chello.nl: cleanups and complete the enable/disable code] Signed-off-by: Vince Weaver <vince@deater.net> Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl> LKML-Reference: <Pine.LNX.4.64.0907081718450.2715@pianoman.cluster.toy> Signed-off-by: Ingo Molnar <mingo@elte.hu>
* | Merge git://git.kernel.org/pub/scm/linux/kernel/git/sam/kbuild-fixesLinus Torvalds2009-07-201-1/+1
|\ \ | | | | | | | | | | | | | | | | | | | | | * git://git.kernel.org/pub/scm/linux/kernel/git/sam/kbuild-fixes: vmlinux.lds.h: restructure BSS linker script macros kconfig: initialize the screen before using curses(3) functions kconfig: variable argument lists needs `stdarg.h' kbuild, deb-pkg: fix install scripts for posix sh
| * | vmlinux.lds.h: restructure BSS linker script macrosTim Abbott2009-07-181-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The BSS section macros in vmlinux.lds.h currently place the .sbss input section outside the bounds of [__bss_start, __bss_end]. On all architectures except for microblaze that handle both .sbss and __bss_start/__bss_end, this is wrong: the .sbss input section is within the range [__bss_start, __bss_end]. Relatedly, the example code at the top of the file actually has __bss_start/__bss_end defined twice; I believe the right fix here is to define them in the BSS_SECTION macro but not in the BSS macro. Another problem with the current macros is that several architectures have an ALIGN(4) or some other small number just before __bss_stop in their linker scripts. The BSS_SECTION macro currently hardcodes this to 4; while it should really be an argument. It also ignores its sbss_align argument; fix that. mn10300 is the only user at present of any of the macros touched by this patch. It looks like mn10300 actually was incorrectly converted to use the new BSS() macro (the alignment of 4 prior to conversion was a __bss_stop alignment, but the argument to the BSS macro is a start alignment). So fix this as well. I'd like acks from Sam and David on this one. Also CCing Paul, since he has a patch from me which will need to be updated to use BSS_SECTION(0, PAGE_SIZE, 4) once this gets merged. Signed-off-by: Tim Abbott <tabbott@ksplice.com> Cc: Paul Mundt <lethal@linux-sh.org> Cc: David Howells <dhowells@redhat.com> Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
* | | Merge branch 'for-linus' of ↵Linus Torvalds2009-07-2028-109/+139
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/vapier/blackfin * 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/vapier/blackfin: (21 commits) Blackfin: define HARDIRQ_BITS again for now arch/blackfin: Add kmalloc NULL tests Blackfin: add CPLB entries for Core B on-chip L1 SRAM regions Blackfin: work around anomaly 05000189 Blackfin: drop per-cpu loops_per_jiffy tracking Blackfin: fix bugs in GPIO resume code Blackfin: bf537-stamp: fix irq decl for AD7142 Blackfin: fix handling of IPEND in interrupt context save Blackfin: drop duplicate runtime checking of anomaly 05000448 Blackfin: fix incomplete renaming of the bfin-twi-lcd driver Blackfin: fix wrong CTS inversion Blackfin: update handling of anomaly 364 (wrong rev id in BF527-0.1) Blackfin: fix early_dma_memcpy() handling of busy channels Blackfin: handle BF561 Core B memory regions better when SMP=n Blackfin: fix miscompilation in lshrdi3 Blackfin: fix silent crash when no uClinux MTD filesystem exists Blackfin: restore exception banner when dumping crash info Blackfin: work around anomaly 05000281 Blackfin: update anomaly lists to match latest sheets/usage Blackfin: drop dead flash_probe call ...
| * | | Blackfin: define HARDIRQ_BITS again for nowMike Frysinger2009-07-161-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The default values of HARDIRQ_BITS and PREEMPT_BITS in common code leads to build failure: In file included from include/linux/interrupt.h:12, from include/linux/kernel_stat.h:8, from arch/blackfin/kernel/asm-offsets.c:32: include/linux/hardirq.h:66:2: error: #error PREEMPT_ACTIVE is too low! So until that gets resolved, just declare our own default value again. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * | | arch/blackfin: Add kmalloc NULL testsJulia Lawall2009-07-161-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Check that the result of kmalloc is not NULL before passing it to other functions. In the first two cases, the new code returns -ENOMEM, which seems compatible with what is done for similar functions for other architectures. In the last two cases, the new code fails silently, ie just returns, because the function has void return type. The semantic match that finds this problem is as follows: (http://www.emn.fr/x-info/coccinelle/) // <smpl> @@ expression *x; identifier f; constant char *C; @@ x = \(kmalloc\|kcalloc\|kzalloc\)(...); ... when != x == NULL when != x != NULL when != (x || ...) ( kfree(x) | f(...,C,...,x,...) | *f(...,x,...) | *x->f ) // </smpl> Signed-off-by: Julia Lawall <julia@diku.dk> Signed-off-by: Sonic Zhang <sonic.zhang@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * | | Blackfin: add CPLB entries for Core B on-chip L1 SRAM regionsGraf Yang2009-07-161-6/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Blackfin SMP port was missing CPLB entries for Core B on-chip L1 SRAM regions. Any code that attempted to use these would wrongly crash due to a CPLB miss. Signed-off-by: Graf Yang <graf.yang@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * | | Blackfin: work around anomaly 05000189Robin Getz2009-07-161-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Similar to anomaly 05000281 but not as bad, we cannot return to the instruction causing a fault otherwise we'll trigger a second false exception. The system can still recover, but it isn't correct. Signed-off-by: Robin Getz <robin.getz@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * | | Blackfin: drop per-cpu loops_per_jiffy trackingMichael Hennerich2009-07-163-6/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On Blackfin SMP, a per-cpu loops_per_jiffy is pointless since both cores always run at the same CCLK. In addition, the current implementation has flaws since the main consumer for loops_per_jiffy (asm/delay.h) uses the global kernel loops_per_jiffy and not the per_cpu one. So punt all of the per-cpu handling and go back to the global shared one. Signed-off-by: Michael Hennerich <michael.hennerich@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * | | Blackfin: fix bugs in GPIO resume codeMichael Hennerich2009-07-161-4/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Change the bfin_gpio_pm_hibernate_restore() function to: 1) AND restored DATA with DIR (not OR) to get correct final state 2) Restore DATA before setting DIR to avoid glitches Signed-off-by: Michael Hennerich <michael.hennerich@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * | | Blackfin: bf537-stamp: fix irq decl for AD7142Barry Song2009-07-161-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The AD7142 add-on card hooks the IRQ line up to PG5, not PF5. Signed-off-by: Barry Song <barry.song@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * | | Blackfin: fix handling of IPEND in interrupt context saveRobin Getz2009-07-161-3/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The interrupt context save logic incorrectly stored the address of the IPEND register rather than its value due to a missing dereference. While we're here, also enable this code for all kernel debugging scenarios and not just when KGDB is enabled. Signed-off-by: Robin Getz <robin.getz@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * | | Blackfin: drop duplicate runtime checking of anomaly 05000448Robin Getz2009-07-161-4/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We already catch this anomaly at compile time, and the runtime version is such that it ends up checking on all parts rather than just the ones that might actually have it. Signed-off-by: Robin Getz <robin.getz@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * | | Blackfin: fix incomplete renaming of the bfin-twi-lcd driverMichael Hennerich2009-07-167-7/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The sed used to rename the bfin-twi-lcd only replaced the first instance rather than all which led to the resources not being enabled when the driver was built as a module. Signed-off-by: Michael Hennerich <michael.hennerich@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * | | Blackfin: fix wrong CTS inversionSonic Zhang2009-07-166-6/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Blackfin serial headers were inverting the CTS value leading to wrong handling of the CTS line which broke CTS/RTS handling completely. Signed-off-by: Sonic Zhang <sonic.zhang@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * | | Blackfin: update handling of anomaly 364 (wrong rev id in BF527-0.1)Graf Yang2009-07-161-14/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This anomaly only applies to the BF527-0.1, not the BF526-0.1, and not any other revision of the BF527. So make sure we don't go returning 0xffff for other cases. Signed-off-by: Graf Yang <graf.yang@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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