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* ARM: S3C: CPUFREQ: Add debugfs support for cpufreqBen Dooks2009-07-3010-0/+317
| | | | | | | | | Add debugfs support for the cpufreq driver to allow information about the system state to be exported to the user. Signed-off-by: Ben Dooks <ben@simtec.co.uk> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
* ARM: S3C2410: Add armclk for cpufreq supportBen Dooks2009-07-301-0/+9
| | | | | | | | | Add armclk for use with the cpufreq support and anything else that may want it. This clock is just a direct descendant of fclk. Signed-off-by: Ben Dooks <ben@simtec.co.uk> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
* ARM: BAST: CPUFREQ: Add board supportBen Dooks2009-07-301-0/+9
| | | | | | | | Add board support for CPUFREQ with the Simtec BAST board registering the necessary information with the core. Signed-off-by: Ben Dooks <ben@simtec.co.uk> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
* ARM: S3C2410: Add S3C2410A sysdev.Ben Dooks2009-07-307-2/+60
| | | | | | | | | | Add a sysdev S3C2410A sysdev to allow the differentiation of the S3C2410A from the S3C2410. This is needed for the CPUFREQ code to enable the extra features and update cpu specific information. Signed-off-by: Ben Dooks <ben@simtec.co.uk> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
* ARM: S3C24XX: CPUFREQ: S3C2412/S3C2443 IO timing supportBen Dooks2009-07-306-1/+329
| | | | | | | Add IO bank timing support for S3C2412/S3C2443. Signed-off-by: Ben Dooks <ben@simtec.co.uk> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
* ARM: S3C2412: Update memory register mapping and definitionsBen Dooks2009-07-303-2/+40
| | | | | | | | | | | | Update the mapping of the memory controler registers and add the missing definitions of the register block for the SSMC. The register contents definitions can be found in the pl093 header. Signed-off-by: Ben Dooks <ben@simtec.co.uk> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
* ARM: S3C: Update CPU register mapping practices.Ben Dooks2009-07-302-3/+9
| | | | | | | | | | | | Currently map-base.h defines the main virtual address mappings made for all the support S3C SoC series, but does not then define any base for per-cpu mappings to be made from. Add S3C_ADDR_CPU() macro to define an virtual address as an offset from the last of the core mappings. Signed-off-by: Ben Dooks <ben@simtec.co.uk> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
* ARM: S3C2412: CPUFREQ: Add core support.Ben Dooks2009-07-303-0/+258
| | | | | | | Add core support for frequency scaling on the S3C2412 SoC. Signed-off-by: Ben Dooks <ben@simtec.co.uk> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
* ARM: OSIRIS: CPUFREQ: Add CPU frequency scaling supportBen Dooks2009-07-302-0/+10
| | | | | | | Add CPU frequency scalling support to the Simtec Osiris. Signed-off-by: Ben Dooks <ben@simtec.co.uk> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
* ARM: S3C2440: CPUFREQ: Add crystal frequency Kconfig entries.Ben Dooks2009-07-302-2/+20
| | | | | | | | | Add entries to select the crystal to select for each different supported board. This information is then available for anything else requiring this, such as the CPUFreq PLL tables. Signed-off-by: Ben Dooks <ben@simtec.co.uk> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
* ARM: S3C2440: CPUFREQ: Add PLL tablesBen Dooks2009-07-304-0/+241
| | | | | | | Add PLL tables for the S3C2440. Signed-off-by: Ben Dooks <ben@simtec.co.uk> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
* ARM: S3C2440: CPUFREQ: Add core support.Ben Dooks2009-07-303-0/+318
| | | | | | | Add core support for frequency scaling on the S3C2440 SoC. Signed-off-by: Ben Dooks <ben@simtec.co.uk> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
* ARM: S3C2410: CPUFREQ: Add PLL tableBen Dooks2009-07-303-0/+103
| | | | | | | Add PLL table for the S3C2410 SoC. Signed-off-by: Ben Dooks <ben@simtec.co.uk> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
* ARM: S3C2410: CPUFREQ: Add core support.Ben Dooks2009-07-306-0/+241
| | | | | | | Add core support for frequency scaling on the S3C2410 SoC. Signed-off-by: Ben Dooks <ben@simtec.co.uk> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
* ARM: S3C2410: CPUFREQ: Add io-timing support.Ben Dooks2009-07-303-0/+442
| | | | | | | Add io-timing support for frequency scaling on the S3C2410 SoC. Signed-off-by: Ben Dooks <ben@simtec.co.uk> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
* ARM: Add S3C24XX to CPUFreq KConfigBen Dooks2009-07-301-0/+41
| | | | | | | Add the S3C24XX to the main ARM CPUFreq Kconfig support list. Signed-off-by: Ben Dooks <ben@simtec.co.uk> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
* ARM: Add ARCH_HAS_CPUFREQ for presence of CPUFREQ driverBen Dooks2009-07-301-1/+13
| | | | | | | | | | Add ARCH_HAS_CPUFREQ so that each machine config can select it if they have CPUFREQ driver support. This means that the CPUFREQ specific area does not need the if statement updating each time a new machine is added. Signed-off-by: Ben Dooks <ben@simtec.co.uk> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
* ARM: S3C: CPUFREQ: Move struct s3c_cpufreq_config to cpu-freq-core.hBen Dooks2009-07-302-20/+25
| | | | | | | | | Move the structure s3c_cpufreq_config from cpu-freq.h to the less advertised cpu-freq-core.h as it is not needed by anything outside the core drivers. Signed-off-by: Ben Dooks <ben@simtec.co.uk> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
* ARM: S3C: CPUFREQ: Documentation for cpufreq headerBen Dooks2009-07-301-10/+81
| | | | | | | | Update arch/arm/plat-s3c/include/plat/cpu-freq.h to include kerneldoc style documentation. Signed-off-by: Ben Dooks <ben@simtec.co.uk> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
* ARM: S3C24XX: CPUFREQ: Add core support.Ben Dooks2009-07-303-0/+889
| | | | | | | | Add the core of the support for enabling the CPUFreq driver on all S3C24XX based systems. Signed-off-by: Ben Dooks <ben@simtec.co.uk> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
* ARM: S3C24XX: Add BWSCON per-bank information.Ben Dooks2009-07-301-0/+10
| | | | | | | | | Add definitions and an accessor macro to deal with reading bus information from S3C2410_BWSCON for any given numbered bank. Signed-off-by: Ben Dooks <ben@simtec.co.uk> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
* S3C64XX: Fix ARMCLK configurationMark Brown2009-07-291-1/+1
| | | | | | | | | | | The value of armclk_mask needs to be inverted for use as a mask on the register value when updating ARM_RATIO. This is critical for cpufreq support, without it attempts to scale the frequency of the core trash pretty much the entire clock tree. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
* S3C64XX: Fix get_rate() for ARMCLKMark Brown2009-07-291-1/+1
| | | | | | | | | If the requested clock is faster than the parent clock then the parent clock is the closest we can get to the request so we need to return that instead of the requested clock. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
* S3C24XX: GPIO: Fix pin range check in s3c_gpiolib_getchipLars-Peter Clausen2009-07-291-1/+1
| | | | | | | | | | In the s3c_gpiolib_getchip implementation for s3c24xx the check whether a pin is in the gpio banks range is reversed. Thus the function returns NULL for valid pins and the gpio chip if its not valid. As a result gpio states are not saved/restored properly during suspend/resume. Signed-off-by: Ben Dooks <ben-linux@fluff.org>
* Merge branch 'drm-radeon-kms' of ↵Linus Torvalds2009-07-291-0/+1
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/airlied/drm-2.6 * 'drm-radeon-kms' of git://git.kernel.org/pub/scm/linux/kernel/git/airlied/drm-2.6: (35 commits) drm/radeon: set fb aperture sizes for framebuffer handoff. drm/ttm: fix highuser vs dma32 confusion. drm/radeon: Fix size used for benchmarking BO copies. drm/radeon: Add radeon.test parameter for running BO GPU copy tests. drm/radeon/kms: allow interruptible waits for objects. drm/ttm: powerpc: Fix Highmem cache flushing. x86: Export kmap_atomic_prot() needed for TTM. drm/ttm: Fix ttm in-kernel copying of pages with non-standard caching attributes. drm/ttm: Fix an oops and sync object leak. drm/radeon/kms: vram sizing on certain r100 chips needs workaround. drm/radeon: Pay more attention to object placement requested by userspace. drm/radeon: Fall back to evicting BOs with memcpy if necessary. drm/radeon: Don't unreserve twice on failure to validate. drm/radeon/kms: fix bandwidth computation on avivo hardware drm/radeon/kms: add initial colortiling support. drm/radeon/kms: fix hotspot handling on pre-avivo chips drm/radeon/kms: enable frac fb divs on rs600/rs690/rs740 drm/radeon/kms: add PLL flag to prefer frequencies <= the target freq drm/radeon/kms: block RN50 from using 3D engine. drm/radeon/kms: fix VRAM sizing like DDX does it. ...
| * x86: Export kmap_atomic_prot() needed for TTM.Thomas Hellstrom2009-07-291-0/+1
| | | | | | | | | | | | | | | | | | This functionality is needed to kmap_atomic() highmem pages that may potentially have or are about to set up other mappings with non-standard caching attributes. Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
* | mm: Remove duplicate definitions in MIPS and SHBenjamin Herrenschmidt2009-07-272-19/+0
| | | | | | | | | | | | | | | | Those definitions are already provided by asm-generic Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Acked-by: Paul Mundt <lethal@linux-sh.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* | Merge branch 'fixes-for-linus' of git://git.monstr.eu/linux-2.6-microblazeLinus Torvalds2009-07-2717-220/+126
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'fixes-for-linus' of git://git.monstr.eu/linux-2.6-microblaze: microblaze: Makefile cleanup microblaze: Typo fix for cpu param inconsistency microblaze: Add support for R_MICROBLAZE_64_NONE microblaze: Get module loading working microblaze: remove sys_ipc microblaze: Support unaligned address for put/get_user macros microblaze: Detect new Microblaze 7.20 versions microblaze: Fix do_page_fault for no context microblaze: Add _PAGE_FILE macros to pgtable.h microblaze: Fix put_user macro for 64bits arguments microblaze: Clear print messages for DTB passing via r7 microblaze: Not to clear r7 after copying DTB to kernel microblaze: Add messages about FDT blob microblaze: Final support for statically linked DTB microblaze: remove duplicated #include microblaze: Define tlb_flush macro
| * | microblaze: Makefile cleanupSam Ravnborg2009-07-272-18/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Reviewed the Makefile on request by Michal and this is the resulting changes. o Use ':=' for assignmnet so we do not re-evaluate for each use o Use $(shell echo xxx) to remove "" o Replaced CFLAGS_KERNEL with KBUILD_CFLAGS The settings are equally relevant for modules and the linked kernel o Dropped LDFLAGS_BLOB - it is no longer used o Refactored assignmnets to libs-y and core-y o Use MMU for the MMU specific extension. "MMUEXT" was hurting my eyes and I did not wanted it spread to m68k Signed-off-by: Sam Ravnborg <sam@ravnborg.org> Signed-off-by: Michal Simek <monstr@monstr.eu>
| * | microblaze: Typo fix for cpu param inconsistencyMichal Simek2009-07-272-2/+2
| | | | | | | | | | | | Signed-off-by: Michal Simek <monstr@monstr.eu>
| * | microblaze: Add support for R_MICROBLAZE_64_NONEMichal Simek2009-07-271-0/+4
| | | | | | | | | | | | | | | | | | For example reiserfs use this relocation type. Signed-off-by: Michal Simek <monstr@monstr.eu>
| * | microblaze: Get module loading workingJohn Williams2009-07-271-5/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | New reloc type R_MICROBLAZE_32_PCREL_LO requires a null handler (no work to do). Remove legacy hack for broken linker pre gcc-4.1.1, that required us to extract an offset from the code, add it to the addend, then rewrite the instruction. Fixup the invalid reloc type error output. Boot tested with the xilinx_emaclite ethernet driver. Signed-off-by: John Williams <john.williams@petalogix.com> Signed-off-by: Michal Simek <monstr@monstr.eu>
| * | microblaze: remove sys_ipcArnd Bergmann2009-07-272-100/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | The ipc system call is now unused in microblaze, as the system call table points directly to the indidual system calls for IPC. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Michal Simek <monstr@monstr.eu>
| * | microblaze: Support unaligned address for put/get_user macrosMichal Simek2009-07-272-64/+47
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch add support for cases where load/store instruction in put/get_user macro gets unaligned pointer to data and this address is not valid. I prevent all cases which can failed. I had to disable first stage of unaligned handler which is used only for noMMU kernel and the whole work is done when interrupt is enabled. You have enable HW support for detect unaligned access in Microblaze. This patch fixed three LTP tests: getpeername01, getsockname01, socketpair01 Signed-off-by: Michal Simek <monstr@monstr.eu>
| * | microblaze: Detect new Microblaze 7.20 versionsMichal Simek2009-07-271-0/+2
| | | | | | | | | | | | Signed-off-by: Michal Simek <monstr@monstr.eu>
| * | microblaze: Fix do_page_fault for no contextMichal Simek2009-07-271-9/+4
| | | | | | | | | | | | | | | | | | | | | | | | Calling fixup when we are in kernel mode. This prevent fault for copy_to/from_user. This fault was find thanks to writev01/03/04 LTP tests. Signed-off-by: Michal Simek <monstr@monstr.eu>
| * | microblaze: Add _PAGE_FILE macros to pgtable.hMichal Simek2009-07-271-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | We need to define _PAGE_FILE macro and change pte functions. Microblaze use the same MMU as PowerPC that's why we define _PAGE_FILE in the same style. This change fixed remap_file_pages01 LTP test. Signed-off-by: Michal Simek <monstr@monstr.eu>
| * | microblaze: Fix put_user macro for 64bits argumentsMichal Simek2009-07-271-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For 64bits arguments gcc caused that put_user macro works with wrong value because of optimalization. Adding volatile caused that gcc not optimized it. It is possible to use (as Blackfin do) two put_user macros with 32bits arguments but there is one more instruction which is due to duplication zero return value which is called put_user_asm macro. Signed-off-by: Michal Simek <monstr@monstr.eu>
| * | microblaze: Clear print messages for DTB passing via r7Michal Simek2009-07-271-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | It is necessary to zeroed r7 when r7 points to bad dtb - this caused that we have correct messages about compiled-in dtb or passing via r7 Signed-off-by: Michal Simek <monstr@monstr.eu>
| * | microblaze: Not to clear r7 after copying DTB to kernelMichal Simek2009-07-271-1/+0
| | | | | | | | | | | | | | | | | | | | | I can't clear r7 because if I do it I lose information where DTB come from. Signed-off-by: Michal Simek <monstr@monstr.eu>
| * | microblaze: Add messages about FDT blobMichal Simek2009-07-271-3/+6
| | | | | | | | | | | | | | | | | | Print accurate message about place where FDT blob is. Signed-off-by: Michal Simek <monstr@monstr.eu>
| * | microblaze: Final support for statically linked DTBJohn Williams2009-07-273-15/+26
| | | | | | | | | | | | | | | | | | | | | | | | | | | If r7 is zero at kernel boot, or does not point to a valid DTB, then we fall back to a DTB (assumed to be) linked statically in the kernel, instead of blindly copying bogus cruft into the kernel DTB memory region Signed-off-by: John Williams <john.williams@petalogix.com> Signed-off-by: Michal Simek <monstr@monstr.eu>
| * | microblaze: remove duplicated #includeHuang Weiyi2009-07-271-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | Remove duplicated #include('s) in arch/microblaze/include/asm/io.h Signed-off-by: Huang Weiyi <weiyi.huang@gmail.com> Signed-off-by: Michal Simek <monstr@monstr.eu>
| * | microblaze: Define tlb_flush macroMichal Simek2009-07-271-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | This fix remove bug which we had till now in all Microblaze MMU code. Primary tested on mmap01 LTP test. We forget to flush invalid tlb which were changed - we used them and there were wrong old data which wasn't correct. Signed-off-by: Michal Simek <monstr@monstr.eu>
* | | Merge branch 'x86-fixes-for-linus' of ↵Linus Torvalds2009-07-2710-23/+37
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip * 'x86-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip: x86: geode: Mark mfgpt irq IRQF_TIMER to prevent resume failure x86, amd: Don't probe for extended APIC ID if APICs are disabled x86, mce: Rename incorrect macro name "CONFIG_X86_THRESHOLD" x86-64: Fix bad_srat() to clear all state x86, mce: Fix set_trigger() accessor x86: Fix movq immediate operand constraints in uaccess.h x86: Fix movq immediate operand constraints in uaccess_64.h x86: Add reboot fixup for SBC-fitPC2 x86: Include all of .data.* sections in _edata on 64-bit x86: Add quirk for Intel DG45ID board to avoid low memory corruption
| * | | x86: geode: Mark mfgpt irq IRQF_TIMER to prevent resume failureThomas Gleixner2009-07-241-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Timer interrupts are excluded from being disabled during suspend. The clock events code manages the disabling of clock events on its own because the timer interrupt needs to be functional before the resume code reenables the device interrupts. The mfgpt timer request its interrupt without setting the IRQF_TIMER flag so suspend_device_irqs() disables it as well which results in a fatal resume failure. Adding IRQF_TIMER to the interupt flags when requesting the mrgpt timer interrupt solves the problem. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> LKML-Reference: <new-submission> Cc: Andres Salomon <dilinger@debian.org> Cc: stable@kernel.org
| * | | x86, amd: Don't probe for extended APIC ID if APICs are disabledJeremy Fitzhardinge2009-07-221-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If we've logically disabled apics, don't probe the PCI space for the AMD extended APIC ID. [ Impact: prevent boot crash under Xen. ] Signed-off-by: Jeremy Fitzhardinge <jeremy.fitzhardinge@citrix.com> Reported-by: Bastian Blank <bastian@waldi.eu.org> Signed-off-by: H. Peter Anvin <hpa@zytor.com>
| * | | x86, mce: Rename incorrect macro name "CONFIG_X86_THRESHOLD"Hidehiro Kawai2009-07-211-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONFIG_X86_THRESHOLD used in arch/x86/kernel/irqinit.c is always undefined. Rename it to the correct name "CONFIG_X86_MCE_THRESHOLD". Signed-off-by: Hidehiro Kawai <hidehiro.kawai.ez@hitachi.com> Reviewed-by: Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com> Cc: Andi Kleen <andi@firstfloor.org> LKML-Reference: <4A667FD4.3010509@hitachi.com> Signed-off-by: H. Peter Anvin <hpa@zytor.com>
| * | | x86-64: Fix bad_srat() to clear all stateAndi Kleen2009-07-211-2/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Need to clear both nodes and nodes_add state for start/end. Signed-off-by: Andi Kleen <ak@linux.intel.com> LKML-Reference: <20090718065657.GA2898@basil.fritz.box> Signed-off-by: H. Peter Anvin <hpa@zytor.com> Cc: stable@kernel.org
| * | | x86, mce: Fix set_trigger() accessorJan Beulich2009-07-211-4/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix the condition checking the result of strchr() (which previously could result in an oops), and make the function return the number of bytes actively used. [ Impact: fix oops ] Signed-off-by: Jan Beulich <jbeulich@novell.com> Cc: Andi Kleen <andi@firstfloor.org> LKML-Reference: <4A5F04B7020000780000AB59@vpn.id2.novell.com> Signed-off-by: H. Peter Anvin <hpa@zytor.com>
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