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| * | | | | x86, nx: Don't force pages RW when setting NX bitsMatthieu CASTET2011-02-021-8/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Xen want page table pages read only. But the initial page table (from head_*.S) live in .data or .bss. That was broken by 64edc8ed5ffae999d8d413ba006850e9e34166cb. There is absolutely no reason to force these pages RW after they have already been marked RO. Signed-off-by: Matthieu CASTET <castet.matthieu@free.fr> Tested-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com> Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
* | | | | | x86, mm: avoid possible bogus tlb entries by clearing prev mm_cpumask after ↵Suresh Siddha2011-02-031-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | switching mm Clearing the cpu in prev's mm_cpumask early will avoid the flush tlb IPI's while the cr3 is still pointing to the prev mm. And this window can lead to the possibility of bogus TLB fills resulting in strange failures. One such problematic scenario is mentioned below. T1. CPU-1 is context switching from mm1 to mm2 context and got a NMI etc between the point of clearing the cpu from the mm_cpumask(mm1) and before reloading the cr3 with the new mm2. T2. CPU-2 is tearing down a specific vma for mm1 and will proceed with flushing the TLB for mm1. It doesn't send the flush TLB to CPU-1 as it doesn't see that cpu listed in the mm_cpumask(mm1). T3. After the TLB flush is complete, CPU-2 goes ahead and frees the page-table pages associated with the removed vma mapping. T4. CPU-2 now allocates those freed page-table pages for something else. T5. As the CR3 and TLB caches for mm1 is still active on CPU-1, CPU-1 can potentially speculate and walk through the page-table caches and can insert new TLB entries. As the page-table pages are already freed and being used on CPU-2, this page walk can potentially insert a bogus global TLB entry depending on the (random) contents of the page that is being used on CPU-2. T6. This bogus TLB entry being global will be active across future CR3 changes and can result in weird memory corruption etc. To avoid this issue, for the prev mm that is handing over the cpu to another mm, clear the cpu from the mm_cpumask(prev) after the cr3 is changed. Marking it for -stable, though we haven't seen any reported failure that can be attributed to this. Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com> Acked-by: Ingo Molnar <mingo@elte.hu> Cc: stable@kernel.org [v2.6.32+] Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* | | | | | Merge branch 'perf-fixes-for-linus' of ↵Linus Torvalds2011-02-031-2/+10
|\ \ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip * 'perf-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip: perf: Fix reading in perf_event_read() watchdog: Don't change watchdog state on read of sysctl watchdog: Fix sysctl consistency watchdog: Fix broken nowatchdog logic perf: Fix Pentium4 raw event validation perf: Fix alloc_callchain_buffers()
| * | | | | | perf: Fix Pentium4 raw event validationStephane Eranian2011-01-271-2/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch fixes some issues with raw event validation on Pentium 4 (Netburst) based processors. As I was testing libpfm4 Netburst support, I ran into two problems in the p4_validate_raw_event() function: - the shared field must be checked ONLY when HT is on - the binding to ESCR register was missing The second item was causing raw events to not be encoded correctly compared to generic PMU events. With this patch, I can now pass Netburst events to libpfm4 examples and get meaningful results: $ task -e global_power_events:running:u noploop 1 noploop for 1 seconds 3,206,304,898 global_power_events:running Signed-off-by: Stephane Eranian <eranian@google.com> Acked-by: Cyrill Gorcunov <gorcunov@openvz.org> Cc: peterz@infradead.org Cc: paulus@samba.org Cc: davem@davemloft.net Cc: fweisbec@gmail.com Cc: perfmon2-devel@lists.sf.net Cc: eranian@gmail.com Cc: robert.richter@amd.com Cc: acme@redhat.com Cc: gorcunov@gmail.com Cc: ming.m.lin@intel.com LKML-Reference: <4d3efb2f.1252d80a.1a80.ffffc83f@mx.google.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
* | | | | | | Merge branch 'for-linus' of git://git390.marist.edu/pub/scm/linux-2.6Linus Torvalds2011-02-025-30/+9
|\ \ \ \ \ \ \ | |_|/ / / / / |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'for-linus' of git://git390.marist.edu/pub/scm/linux-2.6: [S390] reset default for CONFIG_CHSC_SCH [S390] qdio: prevent compile warning under CONFIG_32BIT [S390] use asm-generic/cacheflush.h [S390] tlb: fix build error caused by THP [S390] missing sacf in uaccess [S390] pgtable_list corruption [S390] dasd: prevent panic with unresumed devices
| * | | | | | [S390] reset default for CONFIG_CHSC_SCHSebastian Ott2011-01-311-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 6f9a3c33 "[S390] cleanup s390 Kconfig" accidentally changed the default for CONFIG_CHSC_SCH. Reset it to m. Signed-off-by: Sebastian Ott <sebott@linux.vnet.ibm.com> Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
| * | | | | | [S390] use asm-generic/cacheflush.hAkinobu Mita2011-01-311-22/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The implementation of the cache flushing interfaces on the s390 is identical with the default implementation in asm-generic. Signed-off-by: Akinobu Mita <akinobu.mita@gmail.com> Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
| * | | | | | [S390] tlb: fix build error caused by THPHeiko Carstens2011-01-311-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix this build error with !CONFIG_SWAP caused by tranparent huge pages support: In file included from mm/pgtable-generic.c:9:0: /linux-2.6/arch/s390/include/asm/tlb.h: In function 'tlb_remove_page': /linux-2.6/arch/s390/include/asm/tlb.h:92:2: error: implicit declaration of function 'page_cache_release' Signed-off-by: Heiko Carstens <heiko.carstens@de.ibm.com> Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
| * | | | | | [S390] missing sacf in uaccessMartin Schwidefsky2011-01-311-6/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The uaccess functions copy_in_user_std and clear_user_std fail to switch back from secondary space mode to primary space mode with sacf in case of an unresolvable page fault. We need to make sure that the switch back to primary mode is done in all cases, otherwise the code following the uaccess inline assembly will crash. Reported-by: Alexander Graf <agraf@suse.de> Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
| * | | | | | [S390] pgtable_list corruptionMartin Schwidefsky2011-01-311-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | After page_table_free_rcu removed a page from the pgtable_list page_table_free better not add it again. Otherwise a page_table_alloc can reuse a page table fragment that is still in the rcu process. Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
* | | | | | | Merge branch 'next' of git://git.monstr.eu/linux-2.6-microblazeLinus Torvalds2011-02-023-6/+16
|\ \ \ \ \ \ \ | |_|_|/ / / / |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'next' of git://git.monstr.eu/linux-2.6-microblaze: microblaze: Fix ASM optimized code for LE microblaze: Fix unaligned issue on MMU system with BS=0 DIV=1 microblaze: Fix DTB passing from bootloader
| * | | | | | microblaze: Fix ASM optimized code for LEMichal Simek2011-01-281-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Microblaze little-endian doesn't support ASM optimized library functions(memcpy/memmove). Kconfig doens't contain any information about endian that's why it is necessary to check it in the source code. The code is used with barrel shifter is used. Signed-off-by: Michal Simek <monstr@monstr.eu>
| * | | | | | microblaze: Fix unaligned issue on MMU system with BS=0 DIV=1Michal Simek2011-01-281-4/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Unaligned code use shift for finding register operand. There is used BSRLI(r8,r8,2) macro which is expand for BS=0, DIV=1 by ori rD, r0, (1 << imm); \ idivu rD, rD, rA but if rD is equal rA then ori instruction rewrite value which should be devide. The patch remove this macro which use idivu instruction because idivu takes 32/34 cycles. The highest shifting is 20 which takes 20 cycles. Signed-off-by: Michal Simek <monstr@monstr.eu>
| * | | | | | microblaze: Fix DTB passing from bootloaderMichal Simek2011-01-281-2/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Little endian system needs to check OF_DT_HEADER but it is swapped because it is in big-endian. Microblaze LE provides lwr instruction which loads magic number in BIG endian format which can be compared. There is used the fact that if you write 0x1 as word and load it as byte then you get for big-endian zero and 1 for little-endian. Signed-off-by: Michal Simek <monstr@monstr.eu>
* | | | | | | Merge branch 'fixes' of master.kernel.org:/home/rmk/linux-2.6-armLinus Torvalds2011-02-014-30/+35
|\ \ \ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'fixes' of master.kernel.org:/home/rmk/linux-2.6-arm: ARM: smp_on_up: allow non-ARM SMP processors ARM: io: ensure inb/outb() et.al. are properly ordered on ARMv6+ ARM: initrd: disable initrd if passed address overlaps reserved region ARM: footbridge: fix debug macros ARM: mmci: round down the bytes transferred on error ARM: mmci: complete the transaction on error ARM: 6642/1: mmci: calculate remaining bytes at error correctly
| * | | | | | | ARM: smp_on_up: allow non-ARM SMP processorsRussell King2011-01-311-12/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Allow non-ARM SMP processors to use the SMP_ON_UP feature. CPUs supporting SMP must have the new CPU ID format, so check for this first. Then check for ARM11MPCore, which fails the MPIDR check. Lastly check the MPIDR reports multiprocessing extensions and that the CPU is part of a multiprocessing system. Cc: <stable@kernel.org> Reported-and-Tested-by: Stephen Boyd <sboyd@codeaurora.org> Acked-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | | | | | | ARM: io: ensure inb/outb() et.al. are properly ordered on ARMv6+Russell King2011-01-311-16/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Ensure that the ISA/PCI IO space accessors are properly ordered on ARMv6+ architectures. These should always be ordered with respect to all other accesses. This also fixes __iormb() and __iowmb() not being visible to ioread/ iowrite if a platform defines its own MMIO accessors. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | | | | | | ARM: initrd: disable initrd if passed address overlaps reserved regionRussell King2011-01-311-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Disable the initrd if the passed address already overlaps the reserved region. This avoids oopses on Netwinders when NeTTrom tells the kernel that an initrd is located at mem+4MB, but this overlaps the BSS, resulting in the kernels in-use BSS being freed. This should be applied to v2.6.37-stable. Cc: <stable@kernel.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | | | | | | ARM: footbridge: fix debug macrosRussell King2011-01-311-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 0ea1293 (arm: return both physical and virtual addresses from addruart) changed the way the 'addruart' worked, making it return both the virt and phys addresses. Unfortunately, for footbridge, these were reversed. Fix that. Tested on Netwinder. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | | | | | | | Merge branch 'omap-fixes-for-linus' of ↵Linus Torvalds2011-02-016-34/+5
|\ \ \ \ \ \ \ \ | |_|_|/ / / / / |/| | | | / / / | | |_|_|/ / / | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap-2.6 * 'omap-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap-2.6: arch/arm/mach-omap2/dma.c: Convert IS_ERR result to PTR_ERR arm: omap2: mux: fix compile warning omap1: Simplify use of omap_irq_flags omap2+: Fix unused variable warning for omap_irq_base
| * | | | | | arch/arm/mach-omap2/dma.c: Convert IS_ERR result to PTR_ERRJulia Lawall2011-01-271-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This code elsewhere returns a negative constant to an indicate an error, while IS_ERR returns the result of a >= operation. The semantic patch that fixes this problem is as follows: (http://coccinelle.lip6.fr/) // <smpl> @@ expression x; @@ if (...) { ... - return IS_ERR(x); + return PTR_ERR(x); } // </smpl> Signed-off-by: Julia Lawall <julia@diku.dk> Acked-by: Jarkko Nikula <jhnikula@gmail.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
| * | | | | | arm: omap2: mux: fix compile warningFelipe Balbi2011-01-271-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 8419fdbaf2118a0a169441be82f09f7be93a5ca1 (omap2+: Add omap_mux_get_by_name) introduced the following compile warning: arch/arm/mach-omap2/mux.c: In function '_omap_mux_get_by_name': arch/arm/mach-omap2/mux.c:163:17: warning: 'found_mode' may be used uninitialized in this function Signed-off-by: Felipe Balbi <balbi@ti.com> [tony@atomide.com: updated comments] Signed-off-by: Tony Lindgren <tony@atomide.com>
| * | | | | | omap1: Simplify use of omap_irq_flagsTony Lindgren2011-01-272-14/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 03a9e5126147c9f92aeba4b34f62b15b625087fb (omap1: Use asm_irq_flags for entry-macro.S) added support for multi-omap builds with addition of the omap_irq_flags. Commit 9f9605c2eda9679e6f63c605cbd9cbf6a9a7f3fa (omap2+: Fix unused variable warning for omap_irq_base) simplified omap2+ entry-macro.S by moving omap_irq_flags out of entry-macro.S. Simplify omap1 entry-macro.S in a similar way to keep the code consistent. Based on a similar earlier patch for omap2+ by Russell King <rmk+kernel@arm.linux.org.uk>. Signed-off-by: Tony Lindgren <tony@atomide.com>
| * | | | | | omap2+: Fix unused variable warning for omap_irq_baseRussell King2011-01-272-18/+2
| | |_|/ / / | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 5d190c40100793a6dfc37bf325677c10f3c80edf (omap2+: Initialize omap_irq_base for entry-macro.S from platform code) simplified the handling of omap_irq_base for multi-omap builds. However, this patch also introduced a build warning for !MULTI_OMAP2 builds: arch/arm/mach-omap2/io.c: In function 'omap_irq_base_init': arch/arm/mach-omap2/io.c:322: warning: unused variable 'omap_irq_base' Fix this by removing the ifdef. Also simplify things further by moving omap_irq_base out of entry-macro.S. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> [tony@atomide.com: updated comments] Signed-off-by: Tony Lindgren <tony@atomide.com>
* | | | | | Merge branch 'for-linus' of git://android.git.kernel.org/kernel/tegraLinus Torvalds2011-01-314-11/+15
|\ \ \ \ \ \ | |_|_|/ / / |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'for-linus' of git://android.git.kernel.org/kernel/tegra: ARM: tegra: clock: Add forward reference to struct clk ARM: tegra: irq: Rename gic pointers to avoid conflicts arm/tegra: Fix tegra irq_data conversion
| * | | | | ARM: tegra: clock: Add forward reference to struct clkColin Cross2011-01-262-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Colin Cross <ccross@android.com>
| * | | | | ARM: tegra: irq: Rename gic pointers to avoid conflictsColin Cross2011-01-261-9/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | A future patch will export gic_mask_irq and gic_unmask_irq. Rename the pointers in arch/arm/mach-tegra/irq.c to avoid a compile error. Signed-off-by: Colin Cross <ccross@android.com>
| * | | | | arm/tegra: Fix tegra irq_data conversionGrant Likely2011-01-261-2/+2
| | |_|/ / | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 37337a8d5e68d6e19075dbdb3acf4f1011dae972, "ARM: tegra: irq_data conversion." missed changing one reference to 'irq' in the function tegra_gpio_irq_set_type(). This patch fixes the build error. Signed-off-by: Grant Likely <grant.likely@secretlab.ca> Acked-by: Lennert Buytenhek <buytenh@secretlab.ca> Acked-by: Olof Johansson <olof@lixom.net> Signed-off-by: Colin Cross <ccross@android.com>
* | | | | Merge branch 'stable/bug-fixes-rc2' of ↵Linus Torvalds2011-01-282-13/+13
|\ \ \ \ \ | |_|_|/ / |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/konrad/xen * 'stable/bug-fixes-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/konrad/xen: xen/setup: Route halt operations to safe_halt pvop. xen/e820: Guard against E820_RAM not having page-aligned size or start. xen/p2m: Mark INVALID_P2M_ENTRY the mfn_list past max_pfn.
| * | | | xen/setup: Route halt operations to safe_halt pvop.Stefano Stabellini2011-01-271-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | With this patch, the cpuidle driver does not load and does not issue the mwait operations. Instead the hypervisor is doing them (b/c we call the safe_halt pvops call). This fixes quite a lot of bootup issues wherein the user had to force interrupts for the continuation of the bootup. Details are discussed in: http://lists.xensource.com/archives/html/xen-devel/2011-01/msg00535.html [v2: Wrote the commit description] Reported-by: Daniel De Graaf <dgdegra@tycho.nsa.gov> Tested-by: Daniel De Graaf <dgdegra@tycho.nsa.gov> Signed-off-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
| * | | | xen/e820: Guard against E820_RAM not having page-aligned size or start.Stefano Stabellini2011-01-271-1/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Under Dell Inspiron 1525, and Intel SandyBridge SDP's the BIOS e820 RAM is not page-aligned: [ 0.000000] Xen: 0000000000100000 - 00000000df66d800 (usable) We were not handling that and ended up setting up a pagetable that included up to df66e000 with the disastrous effect that when memset(NODE_DATA(nodeid), 0, sizeof(pg_data_t)); tried to clear the page it would crash at the 2K mark. Initially reported by Michael Young @ http://lists.xensource.com/archives/html/xen-devel/2011-01/msg00108.html The fix is to page-align the size and also take into consideration the start of the E820 (in case that is not page-aligned either). This fixes the bootup failure on those affected machines. This patch is a rework of the Micheal A Young initial patch and considers the case if the start is not page-aligned. Reported-by: Michael A Young <m.a.young@durham.ac.uk> Signed-off-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com> Signed-off-by: Michael A Young <m.a.young@durham.ac.uk>
| * | | | xen/p2m: Mark INVALID_P2M_ENTRY the mfn_list past max_pfn.Stefan Bader2011-01-271-12/+6
| |/ / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In case the mfn_list does not have enough entries to fill a p2m page we do not want the entries from max_pfn up to the boundary to be filled with unknown values. Hence set them to INVALID_P2M_ENTRY. Signed-off-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
* | | | Merge branch 'x86-fixes-for-linus' of ↵Linus Torvalds2011-01-283-35/+13
|\ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip * 'x86-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip: percpu, x86: Fix percpu_xchg_op() x86: Remove left over system_64.h x86-64: Don't use pointer to out-of-scope variable in dump_trace()
| * | | | percpu, x86: Fix percpu_xchg_op()Eric Dumazet2011-01-261-12/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | These recent percpu commits: 2485b6464cf8: x86,percpu: Move out of place 64 bit ops into X86_64 section 8270137a0d50: cpuops: Use cmpxchg for xchg to avoid lock semantics Caused this 'perf top' crash: Kernel panic - not syncing: Fatal exception in interrupt Pid: 0, comm: swapper Tainted: G D 2.6.38-rc2-00181-gef71723 #413 Call Trace: <IRQ> [<ffffffff810465b5>] ? panic ? kmsg_dump ? kmsg_dump ? oops_end ? no_context ? __bad_area_nosemaphore ? perf_output_begin ? bad_area_nosemaphore ? do_page_fault ? __task_pid_nr_ns ? perf_event_tid ? __perf_event_header__init_id ? validate_chain ? perf_output_sample ? trace_hardirqs_off ? page_fault ? irq_work_run ? update_process_times ? tick_sched_timer ? tick_sched_timer ? __run_hrtimer ? hrtimer_interrupt ? account_system_vtime ? smp_apic_timer_interrupt ? apic_timer_interrupt ... Looking at assembly code, I found: list = this_cpu_xchg(irq_work_list, NULL); gives this wrong code : (gcc-4.1.2 cross compiler) ffffffff810bc45e: mov %gs:0xead0,%rax cmpxchg %rax,%gs:0xead0 jne ffffffff810bc45e <irq_work_run+0x3e> test %rax,%rax je ffffffff810bc4aa <irq_work_run+0x8a> Tell gcc we dirty eax/rax register in percpu_xchg_op() Compiler must use another register to store pxo_new__ We also dont need to reload percpu value after a jump, since a 'failed' cmpxchg already updated eax/rax Wrong generated code was : xor %rax,%rax /* load 0 into %rax */ 1: mov %gs:0xead0,%rax cmpxchg %rax,%gs:0xead0 jne 1b test %rax,%rax After patch : xor %rdx,%rdx /* load 0 into %rdx */ mov %gs:0xead0,%rax 1: cmpxchg %rdx,%gs:0xead0 jne 1b: test %rax,%rax Signed-off-by: Eric Dumazet <eric.dumazet@gmail.com> Cc: Arnaldo Carvalho de Melo <acme@redhat.com> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Frederic Weisbecker <fweisbec@gmail.com> Cc: Steven Rostedt <rostedt@goodmis.org> Cc: Peter Zijlstra <a.p.zijlstra@chello.nl> Cc: Christoph Lameter <cl@linux-foundation.org> Cc: Tejun Heo <tj@kernel.org> LKML-Reference: <1295973114.3588.312.camel@edumazet-laptop> Signed-off-by: Ingo Molnar <mingo@elte.hu>
| * | | | x86: Remove left over system_64.hYinghai Lu2011-01-261-22/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Left-over from the x86 merge ... Signed-off-by: Yinghai Lu <yinghai@kernel.org> LKML-Reference: <4D3E23D1.7010405@kernel.org> Signed-off-by: Ingo Molnar <mingo@elte.hu>
| * | | | x86-64: Don't use pointer to out-of-scope variable in dump_trace()Jesper Juhl2011-01-241-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In arch/x86/kernel/dumpstack_64.c::dump_trace() we have this code: ... if (!stack) { unsigned long dummy; stack = &dummy; if (task && task != current) stack = (unsigned long *)task->thread.sp; } bp = stack_frame(task, regs); /* * Print function call entries in all stacks, starting at the * current stack address. If the stacks consist of nested * exceptions */ tinfo = task_thread_info(task); for (;;) { char *id; unsigned long *estack_end; estack_end = in_exception_stack(cpu, (unsigned long)stack, &used, &id); ... You'll notice that we assign to 'stack' the address of the variable 'dummy' which is only in-scope inside the 'if (!stack)'. So when we later access stack (at the end of the above, and assuming we did not take the 'if (task && task != current)' branch) we'll be using the address of a variable that is no longer in scope. I believe this patch is the proper fix, but I freely admit that I'm not 100% certain. Signed-off-by: Jesper Juhl <jj@chaosbits.net> LKML-Reference: <alpine.LNX.2.00.1101242232590.10252@swampdragon.chaosbits.net> Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
* | | | | Merge branch 'for-linus' of ↵Linus Torvalds2011-01-281-0/+1
|\ \ \ \ \ | |_|_|/ / |/| | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/egtvedt/avr32-2.6 * 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/egtvedt/avr32-2.6: avr32: add missing include causing undefined pgtable_page_* references
| * | | | avr32: add missing include causing undefined pgtable_page_* referencesHans-Christian Egtvedt2011-01-261-0/+1
| | |/ / | |/| | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds the linux/mm.h header file to the AVR32 arch pgalloc.c implementation to fix the undefined reference to pgtable_page_ctor() and pgtable_page_dtor(). Signed-off-by: Hans-Christian Egtvedt <hans-christian.egtvedt@atmel.com>
* | | | Merge branch 'for-linus' of ↵Linus Torvalds2011-01-261-0/+61
|\ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/dtor/input * 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/dtor/input: Input: wacom - pass touch resolution to clients through input_absinfo Input: wacom - add 2 Bamboo Pen and touch models Input: sysrq - ensure sysrq_enabled and __sysrq_enabled are consistent Input: sparse-keymap - fix KEY_VSW handling in sparse_keymap_setup Input: tegra-kbc - add tegra keyboard driver Input: gpio_keys - switch to using request_any_context_irq Input: serio - allow registered drivers to get status flag Input: ct82710c - return proper error code for ct82c710_open Input: bu21013_ts - added regulator support Input: bu21013_ts - remove duplicate resolution parameters Input: tnetv107x-ts - don't treat NULL clk as an error Input: tnetv107x-keypad - don't treat NULL clk as an error Fix up trivial conflicts in drivers/input/keyboard/Makefile due to additions of tc3589x/Tegra drivers
| * | | | Input: tegra-kbc - add tegra keyboard driverRakesh Iyer2011-01-201-0/+61
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds support for the internal matrix keyboard controller for Nvidia Tegra platforms. Signed-off-by: Rakesh Iyer <riyer@nvidia.com> Reviewed-by: Trilok Soni <tsoni@codeaurora.org> Signed-off-by: Dmitry Torokhov <dtor@mail.ru>
* | | | | console: rename acquire/release_console_sem() to console_lock/unlock()Torben Hohn2011-01-264-8/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The -rt patches change the console_semaphore to console_mutex. As a result, a quite large chunk of the patches changes all acquire/release_console_sem() to acquire/release_console_mutex() This commit makes things use more neutral function names which dont make implications about the underlying lock. The only real change is the return value of console_trylock which is inverted from try_acquire_console_sem() This patch also paves the way to switching console_sem from a semaphore to a mutex. [akpm@linux-foundation.org: coding-style fixes] [akpm@linux-foundation.org: make console_trylock return 1 on success, per Geert] Signed-off-by: Torben Hohn <torbenh@gmx.de> Cc: Thomas Gleixner <tglx@tglx.de> Cc: Greg KH <gregkh@suse.de> Cc: Ingo Molnar <mingo@elte.hu> Cc: Geert Uytterhoeven <geert@linux-m68k.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* | | | | thp: fix PARAVIRT x86 32bit noPAEAndrea Arcangeli2011-01-261-3/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This fixes TRANSPARENT_HUGEPAGE=y with PARAVIRT=y and HIGHMEM64=n. The #ifdef that this patch removes was erratically introduced to fix a build error for noPAE (where pmd.pmd doesn't exist). So then the kernel built but it failed at runtime because set_pmd_at was a noop. This will correct it by enabling set_pmd_at for noPAE mode too. Signed-off-by: Andrea Arcangeli <aarcange@redhat.com> Reported-by: werner <w.landgraf@ru.ru> Reported-by: Minchan Kim <minchan.kim@gmail.com> Tested-by: Minchan Kim <minchan.kim@gmail.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* | | | | Merge branch 'fixes' of master.kernel.org:/home/rmk/linux-2.6-armLinus Torvalds2011-01-269-34/+60
|\ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'fixes' of master.kernel.org:/home/rmk/linux-2.6-arm: ALSA: AACI: fix timeout duration ALSA: AACI: fix timeout condition checking ARM: 6636/1: ep93xx: default multiplexed gpio ports to gpio mode ARM: 6637/1: Make the argument to virt_to_phys() "const volatile" ARM: twd: ensure timer reload is reprogrammed on entry to periodic mode ARM: 6635/2: Configure reference clock for Versatile Express timers ARM: versatile: name configuration options after actual board names ARM: realview: name configuration options after actual board names ARM: realview,vexpress: fix section mismatch warning for pen_release ARM: 6632/3: mmci: stop using the blockend interrupts
| * | | | | ARM: 6636/1: ep93xx: default multiplexed gpio ports to gpio modeHartley Sweeten2011-01-251-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The EP93xx C and D GPIO ports are multiplexed with the Keypad Interface peripheral.  At power-up they default into non-GPIO mode with the Key Matrix controller enabled so these ports are unusable for GPIO.  Note that the Keypad Interface peripheral is only available in the EP9307, EP9312, and EP9315 processor variants. The keypad support will clear the DeviceConfig bits appropriately to enable the Keypad Interface when the driver is loaded.  And, when the driver is unloaded it will set the bits to return the ports to GPIO mode. To make these ports available for GPIO after power-up on all EP93xx processor variants, set the KEYS and GONK bits in the DeviceConfig register. Similarly, the E, G, and H ports are multiplexed with the IDE Interface peripheral.  At power-up these also default into non-GPIO mode.  Note that the IDE peripheral is only available in the EP9312 and EP9315 processor variants. Since an IDE driver is not even available in mainline, set the EONIDE, GONIDE, and HONIDE bits in the DeviceConfig register so that these ports will be available for GPIO use after power-up. Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com> Acked-by: Ryan Mallon <ryan@bluewatersys.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | | | | ARM: 6637/1: Make the argument to virt_to_phys() "const volatile"Catalin Marinas2011-01-251-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Changing the virt_to_phys() argument to "const volatile void *" avoids compiler warnings in some situations where this function is used. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Acked-by: Stephen Boyd <sboyd@codeaurora.org> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | | | | ARM: twd: ensure timer reload is reprogrammed on entry to periodic modeRussell King2011-01-251-5/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Ensure that the twd timer reload value is reprogrammed each time we enter periodic mode. This ensures that the reload value is always reset correctly. Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: Colin Cross <ccross@android.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | | | | ARM: 6635/2: Configure reference clock for Versatile Express timersPawel Moll2011-01-252-0/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Timers on Versatile Express mainboard are used as system clock/event sources. Driver assumes that they are clocked with 1MHz signal. Old V2M firmware apparently configured it by default, but on newer boards one can observe that "sleep 1" command takes over 30 seconds to finish, as the timers are fed with 32kHz instead... This patch performs required magic and also removes code clearing timer's control registers, as exactly the same operations are performed by the timer driver few jiffies later. Signed-off-by: Pawel Moll <pawel.moll@arm.com> Tested-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | | | | ARM: versatile: name configuration options after actual board namesRussell King2011-01-251-4/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Update the option text to those which appear on the front of the appropriate board user guides. This gives consistent board naming, and makes it obvious which option is for which platform. Acked-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | | | | ARM: realview: name configuration options after actual board namesRussell King2011-01-251-22/+27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | As no one seems to really know which configuration options tie up with which boards, I thought I'd do some investigation and try to work it out. After discussion with some folk in linaro, I think I have this nailed. The names are updated to use the name on the front of the appropriate board user guide for the various baseboards, which I've taken to be the official name for each board. I haven't significantly updated the descriptions for the tiles as that is even less clear - as far as I can see on ARMs website, there is no Cortex-A9 tile for Realview EB - only ARM11MPCore, ARM1156T2F-S, ARM1176TZF-S and Cortex-R4F. So exactly what this 'Multicore Cortex-A9 Tile' is... Acked-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | | | | ARM: realview,vexpress: fix section mismatch warning for pen_releaseRussell King2011-01-252-2/+2
| | |/ / / | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix two section mismatch warnings in the platform SMP bringup code for Realview and Versatile Express: WARNING: arch/arm/mach-realview/built-in.o(.text+0x8ac): Section mismatch in reference from the function write_pen_release() to the variable .cpuinit.data:pen_release The function write_pen_release() references the variable __cpuinitdata pen_release. This is often because write_pen_release lacks a __cpuinitdata annotation or the annotation of pen_release is wrong. WARNING: arch/arm/mach-vexpress/built-in.o(.text+0x7b4): Section mismatch in reference from the function write_pen_release() to the variable .cpuinit.data:pen_release The function write_pen_release() references the variable __cpuinitdata pen_release. This is often because write_pen_release lacks a __cpuinitdata annotation or the annotation of pen_release is wrong. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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