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* [ARM] 4577/1: ITE 8152 PCI bridge supportMike Rapoport2007-10-153-3/+413
| | | | | | | This patch provides driver for ITE 8152 PCI bridge. Signed-off-by: Mike Rapoport <mike@compulab.co.il> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] 4576/1: CM-X270 machine supportMike Rapoport2007-10-156-0/+2297
| | | | | | | This patch provides core support for CM-X270 platform. Signed-off-by: Mike Rapoport <mike@compulab.co.il> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] pxa: Avoid pxa_gpio_mode() in gpio_direction_{in,out}put()Russell King2007-10-151-0/+38
| | | | | | | | | | | | | | | | | pxa_gpio_mode() is a universal call that fiddles with the GAFR (gpio alternate function register.) GAFR does not exist on PXA3 CPUs, but instead the alternate functions are controlled via the MFP support code. Platforms are expected to configure the MFP according to their needs in their platform support code rather than drivers. We extend this idea to the GAFR, and make the gpio_direction_*() functions purely operate on the GPIO level. This means platform support code is entirely responsible for configuring the GPIOs alternate functions on all PXA CPU types. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] pxa: move pxa_set_mode() from pxa2xx_mainstone.c to mainstone.cRussell King2007-10-151-0/+19
| | | | Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] pxa: move pxa_set_mode() from pxa2xx_lubbock.c to lubbock.cRussell King2007-10-151-0/+19
| | | | Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] pxa: PXA3xx base supporteric miao2007-10-1514-8/+1233
| | | | | Signed-off-by: eric miao <eric.y.miao@gmail.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] pxa: tidy up arch/arm/mach-pxa/MakefileRussell King2007-10-151-16/+16
| | | | Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] 4560/1: pxa: move processor specific set_wake logic out of irq.ceric miao2007-10-124-73/+116
| | | | | | | | | | | | | a function pxa_init_irq_set_wake() was introduced, so that processor specific code could install their own version code setting PFER and PRER registers within pxa_gpio_irq_type are removed, and the edge configuration is postponed to the (*set_wake) and copies the GRER and GFER register, which will always be set up correctly by pxa_gpio_irq_type() Signed-off-by: eric miao <eric.y.miao@gmail.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] 4559/1: pxa: make PXA_LAST_GPIO a run-time variableeric miao2007-10-123-1/+5
| | | | | | | | | | | | | | | This definition produces processor specific code in generic function pxa_gpio_mode(), thus creating inconsistencies for support of pxa25x and pxa27x in a single zImage. As David Brownell suggests, make it a run-time variable and initialize at run-time according to the number of GPIOs on the processor. For now the initialization happens in pxa_init_irq_gpio(), since there is already a parameter for that, besides, this is and MUST be earlier than any subsequent calls to pxa_gpio_mode(). Signed-off-by: eric miao <eric.y.miao@gmail.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] 4558/1: pxa: remove MACH_TYPE_LUBBOCK assignment and leave it to boot ↵eric miao2007-10-121-4/+0
| | | | | | | | | | | loader since both u-boot and blob support passing MACH_TYPE_LUBBOCK to the kernel, it should be quite safe to remove this Signed-off-by: eric miao <eric.y.miao@gmail.com> Acked-by: Nicolas Pitre <nico@cam.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] pxa: Make CPU_XSCALE depend on PXA25x or PXA27xRussell King2007-10-121-1/+1
| | | | | | | PXA3 SoCs are supported by the Xscale3 CPU code rather than the Xscale CPU code. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] pxa: mark pxa_set_cken deprecatedRussell King2007-10-121-2/+2
| | | | | | | Allow the generic clock support code to fiddle with the CKEN register and mark pxa_set_cken() deprecated. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] pxa: remove get_lcdclk_frequency_10khz()Russell King2007-10-123-15/+1
| | | | | | | get_lcdclk_frequency_10khz() is now redundant, remove it. Hide pxa27x_get_lcdclk_frequency_10khz() from public view. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] pxa: Make STUART and FICP clocks availableRussell King2007-10-122-3/+3
| | | | Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] pxa: introduce clk support for PXA SoC clocksRussell King2007-10-124-29/+176
| | | | Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] pxa: make pxa27x devices globally visibleRussell King2007-10-122-2/+5
| | | | Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] pxa: fix naming of memory/lcd/core clock functionsRussell King2007-10-124-23/+61
| | | | | | | Rename pxa25x and pxa27x memory/lcd/core clock functions, and select the correct version at run time. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] pxa: convert PXA serial drivers to use platform resourcesRussell King2007-10-121-0/+59
| | | | Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] pxa: make pxa timer initialisation select clock rate at runtimeRussell King2007-10-121-3/+13
| | | | | | | | Rather than using the compile-time constant CLOCK_TICK_RATE, select the clock tick rate at run time. We organise the selection so that PXA3 automatically falls out with the right tick rate. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] 4550/1: sched_clock on PXA should cope with run time clock rate selectionNicolas Pitre2007-10-122-62/+39
| | | | | | | | | | | | The previous implementation was relying on compile time optimizations based on a constant clock rate. However, support for different PXA flavors in the same kernel binary requires that the clock be selected at run time, so here it is. Let's move this code to a more appropriate location while at it. Signed-off-by: Nicolas Pitre <npitre@mvista.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* Merge branch 'master' of ↵Linus Torvalds2007-10-11417-11985/+24220
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc * 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc: (408 commits) [POWERPC] Add memchr() to the bootwrapper [POWERPC] Implement logging of unhandled signals [POWERPC] Add legacy serial support for OPB with flattened device tree [POWERPC] Use 1TB segments [POWERPC] XilinxFB: Allow fixed framebuffer base address [POWERPC] XilinxFB: Add support for custom screen resolution [POWERPC] XilinxFB: Use pdata to pass around framebuffer parameters [POWERPC] PCI: Add 64-bit physical address support to setup_indirect_pci [POWERPC] 4xx: Kilauea defconfig file [POWERPC] 4xx: Kilauea DTS [POWERPC] 4xx: Add AMCC Kilauea eval board support to platforms/40x [POWERPC] 4xx: Add AMCC 405EX support to cputable.c [POWERPC] Adjust TASK_SIZE on ppc32 systems to 3GB that are capable [POWERPC] Use PAGE_OFFSET to tell if an address is user/kernel in SW TLB handlers [POWERPC] 85xx: Enable FP emulation in MPC8560 ADS defconfig [POWERPC] 85xx: Killed <asm/mpc85xx.h> [POWERPC] 85xx: Add cpm nodes for 8541/8555 CDS [POWERPC] 85xx: Convert mpc8560ads to the new CPM binding. [POWERPC] mpc8272ads: Remove muram from the CPM reg property. [POWERPC] Make clockevents work on PPC601 processors ... Fixed up conflict in Documentation/powerpc/booting-without-of.txt manually.
| * [POWERPC] Add memchr() to the bootwrapperDavid Gibson2007-10-122-0/+14
| | | | | | | | | | | | | | | | This adds a memchr() implementation to the bootwrapper, which will be needed when libfdt is merged in. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Paul Mackerras <paulus@samba.org>
| * [POWERPC] Implement logging of unhandled signalsOlof Johansson2007-10-124-1/+70
| | | | | | | | | | | | | | | | | | | | Implement show_unhandled_signals sysctl + support to print when a process is killed due to unhandled signals just as i386 and x86_64 does. Default to having it off, unlike x86 that defaults on. Signed-off-by: Olof Johansson <olof@lixom.net> Signed-off-by: Paul Mackerras <paulus@samba.org>
| * [POWERPC] Add legacy serial support for OPB with flattened device treeValentine Barshak2007-10-121-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently find_legacy_serial_ports() can find no serial ports on the OPB with flattened device tree. Thus no legacy boot console can be initialized. Just the early udbg console works, which is initialized with udbg_init_44x_as1 on the UART's physical address specified in kernel config. This happens because we look for ns16750 serial devices only and expect opb node to have a device type property. This patch makes it look for ns16550-compatible devices and use of_device_is_compatible() for opb in case device type is not specified. Signed-off-by: Valentine Barshak <vbarshak@ru.mvista.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
| * [POWERPC] Use 1TB segmentsPaul Mackerras2007-10-1218-209/+400
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This makes the kernel use 1TB segments for all kernel mappings and for user addresses of 1TB and above, on machines which support them (currently POWER5+, POWER6 and PA6T). We detect that the machine supports 1TB segments by looking at the ibm,processor-segment-sizes property in the device tree. We don't currently use 1TB segments for user addresses < 1T, since that would effectively prevent 32-bit processes from using huge pages unless we also had a way to revert to using 256MB segments. That would be possible but would involve extra complications (such as keeping track of which segment size was used when HPTEs were inserted) and is not addressed here. Parts of this patch were originally written by Ben Herrenschmidt. Signed-off-by: Paul Mackerras <paulus@samba.org>
| * [POWERPC] PCI: Add 64-bit physical address support to setup_indirect_pciValentine Barshak2007-10-121-2/+4
| | | | | | | | | | | | | | | | Add 64-bit physical address support to setup_indirect_pci(). Signed-off-by: Valentine Barshak <vbarshak@ru.mvista.com> Acked-by: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
| * Merge branch 'for-2.6.24' of ↵Paul Mackerras2007-10-1218-287/+255
| |\ | | | | | | | | | master.kernel.org:/pub/scm/linux/kernel/git/galak/powerpc into for-2.6.24
| | * [POWERPC] Adjust TASK_SIZE on ppc32 systems to 3GB that are capableKumar Gala2007-10-111-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | All ppc32 systems except PReP and 8xx are capable of handling 3G of user address space. Old legacy had set this to 2GB and no one has bothered to fix it. 8xx could be bumped up to 3GB if its SW TLB miss handlers were fixed up to properly determine kernel/user addresses. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| | * [POWERPC] Use PAGE_OFFSET to tell if an address is user/kernel in SW TLB ↵Kumar Gala2007-10-114-22/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | handlers Move to using PAGE_OFFSET instead of TASK_SIZE or KERNELBASE value on 6xx/40x/44x/fsl-booke to determine if the faulting address is a kernel or user space address. This mimics how the macro is_kernel_addr() works. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| | * [POWERPC] 85xx: Enable FP emulation in MPC8560 ADS defconfigKumar Gala2007-10-111-5/+18
| | | | | | | | | | | | Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| | * [POWERPC] 85xx: Killed <asm/mpc85xx.h>Kumar Gala2007-10-117-142/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | asm-powerpc/mpc85xx.h was really a hold over from arch/ppc. Now that more decoupling has occurred we can remove <asm/mpc85xx.h> and some of its legacy. As part of this we moved the definition of CPM_MAP_ADDR into cpm2.h for 85xx platforms. This is a stop gap until drivers stop using CPM_MAP_ADDR. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| | * [POWERPC] 85xx: Add cpm nodes for 8541/8555 CDSScott Wood2007-10-112-0/+72
| | | | | | | | | | | | | | | | | | | | | | | | | | | We don't use any CPM devices on these boards, but the muram node on these chips is different from the 8560, so it's helpful to people working with custom boards based on these chips. Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| | * [POWERPC] 85xx: Convert mpc8560ads to the new CPM binding.Scott Wood2007-10-113-116/+134
| | | | | | | | | | | | | | | Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| | * [POWERPC] mpc8272ads: Remove muram from the CPM reg property.Scott Wood2007-10-111-1/+1
| | | | | | | | | | | | | | | | | | | | | This is described by the muram node now. Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | Merge branch 'for-2.6.24' of git://git.secretlab.ca/git/linux-2.6-mpc52xx ↵Paul Mackerras2007-10-124-98/+65
| |\ \ | | | | | | | | | | | | into for-2.6.24
| | * | [POWERPC] MPC5200: Don't make firmware fixups into common codeGrant Likely2007-10-102-33/+61
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Lite5200 u-boot image doesn't entirely configure the processor correctly and so Linux needs to fixup the cpu setup in setup_arch. Fixing the CPU setup is good, but making it into common code is not a good idea. New board ports should be encouraged not to take the lead of the lite5200 and instead get their firmware to setup the CPU the right way. Signed-off-by: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: Sylvain Munaut <tnt@246tnt.com>
| | * | [POWERPC] MPC52xx: Trim includes on mpc5200 platform support codeGrant Likely2007-10-104-50/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Drop unnecessary includes for MPC5200 based boards Signed-off-by: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: Sylvain Munaut <tnt@246tnt.com>
| | * | [POWERPC] MPC52xx: Drop show_cpuinfo platform hooks from Lite5200Grant Likely2007-10-101-15/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This hook doesn't really add any new information. Signed-off-by: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: Sylvain Munaut <tnt@246tnt.com>
| * | | [POWERPC] 4xx: Kilauea defconfig fileStefan Roese2007-10-111-0/+768
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Stefan Roese <sr@denx.de> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
| * | | [POWERPC] 4xx: Kilauea DTSStefan Roese2007-10-111-0/+252
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Stefan Roese <sr@denx.de> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
| * | | [POWERPC] 4xx: Add AMCC Kilauea eval board support to platforms/40xStefan Roese2007-10-113-2/+68
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds basic support for the new 405EX and the AMCC eval board Kilauea to arch/powerpc. Signed-off-by: Stefan Roese <sr@denx.de> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
| * | | [POWERPC] 4xx: Add AMCC 405EX support to cputable.cStefan Roese2007-10-111-0/+11
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Stefan Roese <sr@denx.de> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
| * | | Merge branch 'virtex-for-2.6.24' of ↵Josh Boyer2007-10-112-3/+3
| |\ \ \ | | |_|/ | |/| | | | | | git://git.secretlab.ca/git/linux-2.6-virtex into for-2.6.24-4xx
| | * | [POWERPC] Uartlite: bootwrapper bug fix, getc loops foreverGrant Likely2007-10-101-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | Fixes inverted logic in uartlite_getc Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
| | * | [POWERPC] Don't build arch/powerpc/sysdev/dcr.c for ARCH=ppc kernelsGrant Likely2007-10-101-1/+1
| | |/ | | | | | | | | | | | | | | | | | | dcr.c is an arch/powerpc only thing. Compiling ppc405 arch/ppc kernels throws warnings without this change. Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
| * | [POWERPC] Make clockevents work on PPC601 processorsPaul Mackerras2007-10-111-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In testing the new clocksource and clockevent code on a PPC601 processor, I discovered that the clockevent multiplier value for the decrementer clockevent was overflowing. Because the RTCL register in the 601 effectively counts at 1GHz (it doesn't actually, but it increases by 128 every 128ns), and the shift value was 32, that meant the multiplier value had to be 2^32, which won't fit in an unsigned long on 32-bit. The same problem would arise on any platform where the timebase frequency was 1GHz or more (not that we actually have any such machines today). This fixes it by reducing the shift value to 16. Doing the calculations with a resolution of 2^-16 nanoseconds (15 femtoseconds) should be quite adequate. :) Signed-off-by: Paul Mackerras <paulus@samba.org>
| * | [POWERPC] Prevent decrementer clockevents from firing earlyPaul Mackerras2007-10-111-0/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On old powermacs, we sometimes set the decrementer to 1 in order to trigger a decrementer interrupt, which we use to handle an interrupt that was pending at the time when it was re-enabled. This was causing the decrementer clock event device to call the event function for the next event early, which was causing problems when high-res timers were not enabled. This fixes the problem by recording the timebase value at which the next event should occur, and checking the current timebase against the recorded value in timer_interrupt. If it isn't time for the next event, it just reprograms the decrementer and returns. This also subtracts 1 from the value stored into the decrementer, which is appropriate because the decrementer interrupts on the transition from 0 to -1, not when the decrementer reaches 0. Signed-off-by: Paul Mackerras <paulus@samba.org>
| * | [POWERPC] Fix performance monitor on machines with logical PVRPaul Mackerras2007-10-111-21/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some IBM machines supply a "logical" PVR (processor version register) value in the device tree in the cpu nodes rather than the real PVR. This is used for instance to indicate that the processors in a POWER6 partition have been configured by the hypervisor to run in POWER5+ mode rather than POWER6 mode. To cope with this, we call identify_cpu a second time with the logical PVR value (the first call is with the real PVR value in the very early setup code). However, POWER5+ machines can also supply a logical PVR value, and use the same value (the value that indicates a v2.04 architecture compliant processor). This causes problems for code that uses the performance monitor (such as oprofile), because the PMU registers are different in POWER6 (even in POWER5+ mode) from the real POWER5+. This change works around this problem by taking out the PMU information from the cputable entries for the logical PVR values, and changing identify_cpu so that the second call to it won't overwrite the PMU information that was established by the first call (the one with the real PVR), but does update the other fields. Specifically, if the cputable entry for the logical PVR value has num_pmcs == 0, none of the PMU-related fields get used. So that we can create a mixed cputable entry, we now make cur_cpu_spec point to a single static struct cpu_spec, and copy stuff from cpu_specs[i] into it. This has the side-effect that we can now make cpu_specs[] be initdata. Ultimately it would be good to move the PMU-related fields out to a separate structure, pointed to by the cputable entries, and change identify_cpu so that it saves the PMU info pointer, copies the whole structure, and restores the PMU info pointer, rather than identify_cpu having to list all the fields that are *not* PMU-related. Signed-off-by: Paul Mackerras <paulus@samba.org> Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
| * | [POWERPC] Don't enable cpu hotplug on pSeries machines with MPICOlof Johansson2007-10-111-0/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Don't allow cpu hotplug on systems lacking XICS interrupt controller (i.e. with an MPIC interrupt controller), since the current pSeries platform code is hardcoded for XICS. This works around the bug reported by Paul Mackerras where the disable_nonboot_cpus() call recently added to the shutdown path will cause an oops on older pSeries machines. Signed-off-by: Olof Johansson <olof@lixom.net> Signed-off-by: Paul Mackerras <paulus@samba.org>
| * | [POWERPC] Move of_platform_driver initialisations: arch/powerpcStephen Rothwell2007-10-113-6/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We no longer initialise the name and owner fields of the of_platform_driver, but use the fields of the embedded device_driver's name field instead. Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au> Acked-by: Olof Johansson <olof@lixom.net> Signed-off-by: Paul Mackerras <paulus@samba.org>
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