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* [PATCH] mips: setup_zero_pages count 1Hugh Dickins2005-12-121-2/+2
| | | | | | | | | | Page count should be initialized to 1 on each of the MIPS empty zero pages, to avoid a bad_page warning whenever one of them is freed from all mappings. Signed-off-by: Hugh Dickins <hugh@veritas.com> Cc: Ralf Baechle <ralf@linux-mips.org> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] uml: fix compile error for ttPekka J Enberg2005-12-122-1/+2
| | | | | | | | | | | | | | | arch/um/kernel/tt/uaccess.c: In function `copy_from_user_tt': arch/um/kernel/tt/uaccess.c:11: error: `FIXADDR_USER_START' undeclared (first use in this function) arch/um/kernel/tt/uaccess.c:11: error: (Each undeclared identifier is reported only once arch/um/kernel/tt/uaccess.c:11: error: for each function it appears in.) I get the compile error when I disable CONFIG_MODE_SKAS. Signed-off-by: Pekka Enberg <penberg@cs.helsinki.fi> Acked-by: Paolo Giarrusso <blaisorblade@yahoo.it> Cc: Jeff Dike <jdike@addtoit.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] x86: fix NMI with CPU hotplugShaohua Li2005-12-121-7/+0
| | | | | | | | | | | | | With CPU hotplug enabled, NMI watchdog stoped working. It appears the violation is the cpu_online check in nmi handler. local ACPI based NMI watchdog is initialized before we set CPU online for APs. It's quite possible a NMI is fired before we set CPU online, and that's what happens here. Signed-off-by: Shaohua Li <shaohua.li@intel.com> Acked-by: Zwane Mwaikambo <zwane@arm.linux.org.uk> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] ppc32: set smp_tb_synchronized on UP with SMP kernelJohannes Berg2005-12-121-0/+4
| | | | | | | | | | | | | ppc32 kernel, when built with CONFIG_SMP and booted on a single CPU machine, will not properly set smp_tb_synchronized, thus causing gettimeofday() to not use the HW timebase and to be limited to jiffy resolution. This, among others, causes unacceptable pauses when launching X.org. Signed-Off-By: Johannes Berg <johannes@sipsolutions.net> Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [PATCH] powerpc: Fix clock spreading setting on some powermacsBenjamin Herrenschmidt2005-12-122-10/+31
| | | | | | | | | The code that sets the clock spreading feature of the Intrepid ASIC must not be run on some machine models or those won't boot. This fixes it. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [PATCH] powerpc: Fix SLB flushing path in hugepageDavid Gibson2005-12-091-16/+41
| | | | | | | | | | | | | | | On ppc64, when opening a new hugepage region, we need to make sure any old normal-page SLBs for the area are flushed on all CPUs. There was a bug in this logic - after putting the new hugepage area masks into the thread structure, we copied it into the paca (read by the SLB miss handler) only on one CPU, not on all. This could cause incorrect SLB entries to be loaded when a multithreaded program was running simultaneously on several CPUs. This patch corrects the error, copying the context information into the PACA on all CPUs using the mm in question before flushing any existing SLB entries. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [PATCH] powerpc: Add missing icache flushes for hugepagesDavid Gibson2005-12-092-2/+35
| | | | | | | | | | | | | | | | | | On most powerpc CPUs, the dcache and icache are not coherent so between writing and executing a page, the caches must be flushed. Userspace programs assume pages given to them by the kernel are icache clean, so we must do this flush between the kernel clearing a page and it being mapped into userspace for execute. We were not doing this for hugepages, this patch corrects the situation. We use the same lazy mechanism as we use for normal pages, delaying the flush until userspace actually attempts to execute from the page in question. Tested on G5. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [PATCH] powerpc: Set cache info defaultsOlof Johansson2005-12-091-1/+9
| | | | | | | | | | | | | | | | | | | | | | | Cache info is setup by walking the device tree in initialize_cache_info(). However, icache_flush_range might be called before that, in slb_initialize()->patch_slb_encoding, which modifies the load immediate instructions used with SLB fault code. Not only that, but depending on memory layout, we might take SLB faults during unflatten_device_tree. So that fault will load an SLB entry that might not contain the right LLP flags for the segment. Either we can walk the flattened device tree to setup cache info, or we can pick the known defaults that are known to work. Doing it in the flattened device tree is hairier since we need to know the machine type to know what property to look for, etc, etc. For now, it's just easier to go with the defaults. Worst thing that happens from it is that we might waste a few cycles doing too small dcbst/icbi increments. Signed-off-by: Olof Johansson <olof@lixom.net> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [PATCH] powerpc: Remove debug code in hash pathBenjamin Herrenschmidt2005-12-081-12/+0
| | | | | | | | | Some debug code wasn't properly removed from the initial 64k pages patch, and while it's harmless, it's also slowing down significantly a very hot code path, thus it should really be removed. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [PATCH] powerpc: Fix a huge page bugBenjamin Herrenschmidt2005-12-081-1/+2
| | | | | | | | | | The 64k pages patch changed the meaning of one argument passed to the low level hash functions (from "large" it became "psize" or page size index), but one of the call sites wasn't properly updated, causing potential random weird problems with huge pages. This fixes it. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [PATCH] powerpc/pseries: boot failures on numa if no memory on nodeMike Kravetz2005-12-081-1/+1
| | | | | | | | | This bug exists in the current code and prevents machines from booting with numa enabled if there is a node that does not contain memory. Workaround is to boot with 'numa=off'. Looks like a simple typo. Signed-off-by: Mike Kravetz <kravetz@us.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [PATCH] powerpc: remove redundant code in stab initOlof Johansson2005-12-051-6/+1
| | | | | | | | | There's never been a hardware platform that has both pSeries/RPA LPAR hypervisor and stab (pre-POWER4 segment management). This removes the redundant code in stab_initalize(). Signed-off-by: Olof Johansson <olof@lixom.net> Signed-off-by: Paul Mackerras <paulus@samba.org>
* ppc: Build in all three of powermac, PREP and CHRP supportPaul Mackerras2005-12-051-3/+3
| | | | | | | | | | | | | | | | | This reverts commit da0825fd201a03294dbf7f8f030676d608da122c, making it so that if you select CONFIG_PPC_MULTIPLATFORM you get support for PMAC, PREP and CHRP built in. The reason for not allowing PMAC, PREP and CHRP to be selected individually for ARCH=ppc is that there is too much interdependency between them in the platform support code. For example, CHRP uses the PMAC nvram code. Configuring with ARCH=powerpc does allow you to select support for PMAC and CHRP separately. Support for PREP is not there yet but should be there soon. Signed-off-by: Paul Mackerras <paulus@samba.org>
* powerpc/pseries: Optimize IOMMU setupPaul Mackerras2005-12-051-1/+1
| | | | | | | | | | The previous commit will use the page-at-a-time hypervisor call for setting up IOMMU entries when we are using 64k pages and setting up one 64k page, even though that means 16 calls to the hypervisor, since the hypervisor still works on 4k pages. This optimizes this case by using the multi-page IOMMU setup hypervisor call instead. Signed-off-by: Paul Mackerras <paulus@samba.org>
* [PATCH] powerpc: correct the NR_CPUS description textOlaf Hering2005-12-021-1/+1
| | | | | | | Update the help text to match the allowed range. Signed-off-by: Olaf Hering <olh@suse.de> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [PATCH] powerpc/pseries: Fix TCE building with 64k pagesizeMichal Ostrowski2005-12-021-3/+6
| | | | | | | | | | Must adjust tcenum and npages by TCE_PAGE_FACTOR to convert between 64KB pages and TCE (4K) pages. (This is done in other places, except for this one location.) Signed-off-by: Michal Ostrowski <mostrows at watson ibm com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
* Merge master.kernel.org:/home/rmk/linux-2.6-armLinus Torvalds2005-12-014-3/+27
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| * [ARM] 3188/1: Add missing i2c dependency for AkitaRichard Purdie2005-12-012-1/+20
| | | | | | | | | | | | | | | | | | | | Patch from Richard Purdie Akita requires inbuilt kernel i2c support for its GPIOs. Add this requirement to Kconfig and update the defconfig to match. Signed-off-by: Richard Purdie <rpurdie@rpsys.net> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * [ARM] Fix IXDP425 setup bugJeff Hansen2005-12-011-1/+1
| | | | | | | | | | | | | | | | There is a typo in the ARM IXDP425 setup definition that mistakenly tries to use UART1's IRQ for UART2's traffic. Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * [ARM SMP] Disable lazy flush_dcache_page for SMPRussell King2005-11-301-1/+6
| | | | | | | | | | | | | | Lazy flush_dcache_page() causes userspace instability on SMP platforms, so disable it for now. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linusLinus Torvalds2005-12-0161-3244/+3229
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| * | [MIPS] Update defconfigs to reflect Kconfig changes.Ralf Baechle2005-12-0145-3184/+3160
| | | | | | | | | | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | [MIPS] Avoid duplicate do_syscall_trace calls on return from sigreturn.Ralf Baechle2005-12-013-8/+0
| | | | | | | | | | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | [MIPS] Fix register handling in syscalls when debugging.Ralf Baechle2005-12-014-4/+12
| | | | | | | | | | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | [MIPS] Alchemy: Set board type on initialization.Ralf Baechle2005-12-011-1/+11
| | | | | | | | | | | | | | | | | | From Sergei Shtylylov <sshtylyov@ru.mvista.com>. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | [MIPS] Alchemy: Fix BCSR accesses.Ralf Baechle2005-12-011-4/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fixes BCSR accesses in the board setup/reset code. The registers are actually 16-bit, and their addresses are different between DBAu1550 and other DBAu1xx0 boards. From Sergei Shtylylov <sshtylyov@ru.mvista.com>. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | [MIPS] Fix return path of sysmips(MIPS_ATOMIC_SET, ...)Ralf Baechle2005-12-012-26/+2
| | | | | | | | | | | | | | | | | | The way we were doing things does no longer work on 2.6. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | [MIPS] Qemu: Accept kernel command line passed by the Emulator.Ralf Baechle2005-12-011-1/+12
| | | | | | | | | | | | | | | | | | From Daniel Jacobowitz <dan@debian.org>. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | [MIPS] Generate SIGILL againDaniel Jacobowitz2005-12-011-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | The rdhwr emulation accidentally swallowed the SIGILL from most other illegal instructions. Make sure to return -EFAULT by default. Signed-off-by: Daniel Jacobowitz <dan@codesourcery.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | [MIPS] Kconfig: Include init/Kconfig after we've set 32BIT / 64BIT.Ralf Baechle2005-12-011-2/+2
| | | | | | | | | | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | [MIPS] Use reset_page_mapcount to initialize empty_zero_page usage counter.Ralf Baechle2005-12-011-1/+1
| | | | | | | | | | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | [MIPS] R10000 and R12000 need to set MIPS_CPU_4K_CACHE ...Ralf Baechle2005-12-011-2/+2
| | | | | | | | | | | | | | | | | | ... because they have R4000-style caches. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | [MIPS] JMR3927: Declare puts function.Ralf Baechle2005-12-011-0/+2
| | | | | | | | | | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * | [MIPS] JMR3927 fixes.Sergei Shtylylov2005-12-011-9/+19
| |/ | | | | | | | | | | | | | | | | | | | | | | o Check if IRQ is disabled or in progress before reenabling interrupts in jmr3927_irq_end.. o s/spinlock_irqsave/spin_lock_irqsave/ o s/spinlock_irqrestore/spin_unlock_irqrestore/ o Flush write buffer after setting IRQ mask o In 2.6 jmr3927_ioc_interrupt interrupt handlers return irqreturn_t Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | [PATCH] ppc32: fix treeboot image entrypointEugene Surovegin2005-12-011-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Correctly specify treeboot based image entrypoint. Currently makefile uses $(ENTRYPOINT) which isn't defined anywhere. Each board port sets entrypoint-$(CONFIG_BOARD_NAME) instead. Without this patch I cannot boot Ocotea (PPC440GX eval board) anymore. I was getting random "OS panic" errors from OpenBIOS for a while, but with current kernel I get them all the time (probably because image became bigger). Signed-off-by: Eugene Surovegin <ebs@ebshome.net> Acked-by: Tom Rini <trini@kernel.crashing.org> Cc: Matt Porter <mporter@kernel.crashing.org> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* | [PATCH] ppc32: Fix incorrect PCI frequency valueVitaly Bordug2005-12-011-1/+2
| | | | | | | | | | | | | | | | | | | | The time to wait after deasserting PCI_RST has been counted with incorrect value - this patch fixes the issue. Signed-off-by: Vitaly Bordug <vbordug@ru.mvista.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* | [ACPI] properly detect pmtimer on ASUS a8v motherboardDavid Shaohua Li2005-11-301-0/+7
|/ | | | | | | | | | Handle FADT 2.0 xpmtmr address 0 case. http://bugzilla.kernel.org/show_bug.cgi?id=5283 Signed-off-by: Shaohua Li<shaohua.li@intel.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Len Brown <len.brown@intel.com>
* Merge master.kernel.org:/pub/scm/linux/kernel/git/paulus/powerpc-mergeLinus Torvalds2005-11-292-38/+26
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| * [PATCH] powerpc: prevent stack corruption in call_prom_retOlaf Hering2005-11-301-1/+1
| | | | | | | | | | | | | | | | Use the correct pointer to clear the memory of the return values, to prevent stack corruption in the callers stackframe. Signed-off-by: Olaf Hering <olh@suse.de> Signed-off-by: Paul Mackerras <paulus@samba.org>
| * powerpc: Fix bug causing FP registers corruption on UP + preemptPaul Mackerras2005-11-301-37/+25
| | | | | | | | | | | | | | | | | | | | | | This fixes a bug noticed by Paolo Galtieri and fixed for ARCH=ppc in the previous commit (ppc: fix floating point register corruption). This fixes the arch/powerpc code by adding preempt_disable/enable, and also cleans it up a bit by pulling out the code that discards any lazily-switched CPU register state into a new function, rather than having that code repeated in three places. Signed-off-by: Paul Mackerras <paulus@samba.org>
| * [PATCH] ppc: fix floating point register corruptionPaolo Galtieri2005-11-301-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | I recently discovered a bug on PPC which causes the floating point registers to get corrupted when CONFIG_PREEMPT=y. The problem occurred while running a multi threaded Java application that does floating point. The problem could be reproduced in anywhere from 2 to 6 hours. With the patch I have included below it ran for over a week without failure. Signed-off-by: Paolo Galtieri <pgaltieri@mvista.com> Cc: Kumar Gala <galak@gate.crashing.org> Cc: Matt Porter <mporter@kernel.crashing.org> Cc: Tom Rini <trini@kernel.crashing.org> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
* | [PATCH] setting irq affinity is broken in ia32 with MSI enabledShaohua Li2005-11-291-2/+2
| | | | | | | | | | | | | | | | | | | | Setting irq affinity stops working when MSI is enabled. With MSI, move_irq is empty, so we can't change irq affinity. It appears a typo in Ashok's original commit for this issue. X86_64 actually is using move_native_irq. Signed-off-by: Shaohua Li <shaohua.li@intel.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* | [PATCH] ppc: fix floating point register corruptionPaolo Galtieri2005-11-291-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | I recently discovered a bug on PPC which causes the floating point registers to get corrupted when CONFIG_PREEMPT=y. The problem occurred while running a multi threaded Java application that does floating point. The problem could be reproduced in anywhere from 2 to 6 hours. With the patch I have included below it ran for over a week without failure. Signed-off-by: Paolo Galtieri <pgaltieri@mvista.com> Cc: Kumar Gala <galak@gate.crashing.org> Cc: Matt Porter <mporter@kernel.crashing.org> Cc: Tom Rini <trini@kernel.crashing.org> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Paul Mackerras <paulus@samba.org> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* | [PATCH] fix rebooting on HP nc6120 laptopThierry Vignaud2005-11-291-0/+8
|/ | | | | | | | | Anne NICOLAS <anne.nicolas@mandriva.com> and Andres Kaaber <andres.kaaber@rescue.ee> reported their HP laptop didn't reboot smoothly. Signed-off-by: Thierry Vignaud <tvignaud@mandriva.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* Merge master.kernel.org:/pub/scm/linux/kernel/git/davem/sparc-2.6Linus Torvalds2005-11-291-0/+1
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| * [SPARC64]: Fix >8K I/O mappings.David S. Miller2005-11-291-0/+1
| | | | | | | | | | | | | | | | | | Increment the PFN field of the PTE so that the tests on vm_pfn in mm/memory.c match up. The TLB ignores these lower bits for larger page sizes, so it's OK to set things like this. Signed-off-by: David S. Miller <davem@davemloft.net>
* | Merge branch 'release' of ↵Linus Torvalds2005-11-293-19/+2
|\ \ | |/ |/| | | git://git.kernel.org/pub/scm/linux/kernel/git/aegl/linux-2.6
| * [IA64] Remove getting break_num by decoding instructionKeshavamurthy Anil S2005-11-292-19/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | break.b always sets cr.iim to 0 and the current code tries to get the break_num by decoding instruction. However, their seems to be a race condition while reading the regs->cr_iip, as on other cpu the break.b at regs->cr_iip might have been replaced with the original instruction as a result of unregister_kprobe() and hence decoding instruction to obtain break_num will result in wrong value in this case. Also includes changes to kprobes.c which now has to handle break number zero. Signed-off-by: Anil S Keshavamurthy <anil.s.keshavamurthy@intel.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
| * [IA64] - Make pfn_valid more precise for SGI Altix systemsDean Roe2005-11-291-0/+1
| | | | | | | | | | | | | | | | | | | | | | A single SGI Altix system can be divided into multiple partitions, each running their own instance of the Linux kernel. pfn_valid() is currently not optimal for any but the first partition, since it does not compare the pfn with min_low_pfn before calling the more costly ia64_pfn_valid(). Signed-off-by: Dean Roe <roe@sgi.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
* | powerpc: Export __flush_icache_range for 32-bitPaul Mackerras2005-11-291-4/+2
| | | | | | | | | | | | | | Both 32-bit and 64-bit use the same inline flush_icache_range definition now, so both need to export __flush_icache_range, not just 64-bit. Signed-off-by: Paul Mackerras <paulus@samba.org>
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