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* powerpc: rename powermac files to remove pmac_ prefixPaul Mackerras2005-10-1014-7/+6
| | | | | | | Since the files are now in arch/powerpc/platforms/powermac, the pmac_ prefix that they had is redundant. Signed-off-by: Paul Mackerras <paulus@samba.org>
* ppc64: Use SPRN_ prefix for special purpose register namesPaul Mackerras2005-10-102-112/+112
| | | | | | | Now that we are using the merged reg.h we have to use the SPRN_xxx names rather than the xxx names. Signed-off-by: Paul Mackerras <paulus@samba.org>
* powerpc: move pSeries files to arch/powerpc/platforms/pseriesPaul Mackerras2005-10-1012-53/+10
| | | | Signed-off-by: Paul Mackerras <paulus@samba.org>
* powerpc: Merge arch/ppc64/mm to arch/powerpc/mmPaul Mackerras2005-10-1020-1288/+39
| | | | | | | This moves the remaining files in arch/ppc64/mm to arch/powerpc/mm, and arranges that we use them when compiling with ARCH=ppc64. Signed-off-by: Paul Mackerras <paulus@samba.org>
* powerpc: Rename files to have consistent _32/_64 suffixesPaul Mackerras2005-10-1024-269/+129
| | | | | | | | This doesn't change any code, just renames things so we consistently have foo_32.c and foo_64.c where we have separate 32- and 64-bit versions. Signed-off-by: Paul Mackerras <paulus@samba.org>
* ppc64: Use the merged lmb routinesPaul Mackerras2005-10-103-302/+4
| | | | | | | The only real change here is that lmb_enforce_memory_limit now takes the memory_limit as a parameter instead of as a global variable. Signed-off-by: Paul Mackerras <paulus@samba.org>
* powerpc: Make some #includes explicit.Paul Mackerras2005-10-105-0/+5
| | | | | | | In preparation for merging processor.h, this adds some explicit but won't be after the merge. Signed-off-by: Paul Mackerras <paulus@samba.org>
* powerpc: Use SPRN_xxx rather than xxx for SPR numbersPaul Mackerras2005-10-102-100/+100
| | | | | | | | | | This changes symbols like HID0, SPRG3, SRR0, SRR1 etc. that refer to special purpose registers to SPRN_HID0, SPRN_SPRG3, etc. Using the SPRN_ symbols clutters the namespace less, and the forthcoming merge of asm/processor.h and asm/reg.h is going to remove the non-SPRN_ versions. Signed-off-by: Paul Mackerras <paulus@samba.org>
* powerpc: Fix idle.c compile warningPaul Mackerras2005-10-061-0/+1
| | | | | | | This fixes a compile warning when using arch/ppc/kernel/idle.c in a merged (ARCH=powerpc) kernel. Signed-off-by: Paul Mackerras <paulus@samba.org>
* powerpc: Define a _sdata symbolPaul Mackerras2005-10-061-0/+1
| | | | | | This is needed by arch/powerpc/mm/mem.c now. Signed-off-by: Paul Mackerras <paulus@samba.org>
* powerpc: Merge traps.c a bit morePaul Mackerras2005-10-062-159/+35
| | | | | | | This reduces the differences between ppc32 and ppc64 in arch/powerpc/kernel/traps.c a bit further. Signed-off-by: Paul Mackerras <paulus@samba.org>
* powerpc: Use the merged of_device.c with ARCH=powerpcPaul Mackerras2005-10-061-1/+2
| | | | | | Also compile btext.c with -fPIC; this was missed before. Signed-off-by: Paul Mackerras <paulus@samba.org>
* powerpc: Merge of_device.c and of_device.hPaul Mackerras2005-10-061-0/+274
| | | | Signed-off-by: Paul Mackerras <paulus@samba.org>
* powerpc: Remove 64-bit cpu support from ppc32.Paul Mackerras2005-10-062-153/+11
| | | | | | | | These days there is no good reason to run a ppc32 kernel on a 64-bit cpu, rather than a ppc64 kernel, so remove the config option and a bunch of code (and ifdefs) from head.S. Signed-off-by: Paul Mackerras <paulus@samba.org>
* powerpc: Merge lmb.c and make MM initialization use it.Paul Mackerras2005-10-0610-700/+509
| | | | | | | | | | | | | This also creates merged versions of do_init_bootmem, paging_init and mem_init and moves them to arch/powerpc/mm/mem.c. It gets rid of the mem_pieces stuff. I made memory_limit a parameter to lmb_enforce_memory_limit rather than a global referenced by that function. This will require some small changes to ppc64 if we want to continue building ARCH=ppc64 using the merged lmb.c. Signed-off-by: Paul Mackerras <paulus@samba.org>
* powerpc: Merge in the ppc64 version of the prom code.Paul Mackerras2005-10-068-48/+5817
| | | | | | | | | | | | | This brings in the ppc64 version of prom_init.c, prom.c and btext.c and makes them work for ppc32. This also brings in the new calling convention, where the first entry to the kernel (with r5 != 0) goes to the prom_init code, which then restarts from the beginning (with r5 == 0) after it has done its stuff. For now this also brings in the ppc32 version of setup.c. It also merges lmb.h. Signed-off-by: Paul Mackerras <paulus@samba.org>
* powerpc: Define 32/64 bit asm macros and use them in fpu.SPaul Mackerras2005-10-062-100/+30
| | | | | | | | These macros help in writing assembly code that works for both ppc32 and ppc64. With this we now have a common fpu.S. This takes out load_up_fpu from head_64.S. Signed-off-by: Paul Mackerras <paulus@samba.org>
* ppc32: remove obsolete klock_info definitionPaul Mackerras2005-10-041-1/+0
| | | | | | klock_info isn't used or referenced anywhere else in the kernel. Signed-off-by: Paul Mackerras <paulus@samba.org>
* ppc32: export a few more things where they are definedPaul Mackerras2005-10-042-3/+3
| | | | | | ... and remove the exports from ppc_ksyms.c. Signed-off-by: Paul Mackerras <paulus@samba.org>
* Merge rsync://ozlabs.org/sfr-git/for-paulus/Paul Mackerras2005-10-0248-1777/+1477
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| * powerpc: make iSeries bootStephen Rothwell2005-10-012-3/+3
| | | | | | | | | | | | | | Now that we use the device tree, it helps to build it in. It helps to links the kernel at the correct address. Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>
| * powerpc: make iSeries buildStephen Rothwell2005-10-017-205/+211
| | | | | | | | | | | | | | | | Merge vmlinux.lds.S. Also remove arch/powerpc/kernel/vmlinux.lds which is a generated file. Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>
| * ppc64: simplify the build a littleStephen Rothwell2005-10-014-13/+12
| | | | | | | | Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>
| * powerpc: merge idle_power4.S and trapc.sStephen Rothwell2005-10-0121-921/+563
| | | | | | | | | | | | | | | | | | | | | | | | | | Use idle_power4.S from ppc64 as we are not going to support 32 bit power4 in the merged tree. Merge ppc64 traps.c into powerpc traps.c: use ppc64 versions of exception routine names (as they don't have StudlyCaps) make all the versions if die() have the same prototype Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>
| * powerpc: Move lparmap.c to powerpc/platformsStephen Rothwell2005-09-302-2/+2
| | | | | | | | Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>
| * powerpc: more cleanup of powerpc/kernelStephen Rothwell2005-09-303-136/+7
| | | | | | | | | | | | | | Update head_64.S from arch/ppc64 Remove arc/ppc/kernel/fpu.S Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>
| * powerpc: remove old vector.S filesStephen Rothwell2005-09-304-389/+2
| | | | | | | | | | | | Update old kernel/Makefiles to cope Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>
| * powerpc: merge asm-offsets.cStephen Rothwell2005-09-301-103/+117
| | | | | | | | Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>
| * ppc64 iseries: move some iSeries include filesStephen Rothwell2005-09-3013-14/+569
| | | | | | | | | | | | | | These files are only referenced from within arch/powerpc/platforms/iseries, so move them there. Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>
* | powerpc: Get merged kernel to compile and run on 32-bit SMP powermac.Paul Mackerras2005-10-015-15/+24
|/ | | | | | | | | | This updates the powermac SMP code to use the mpic driver instead of the openpic driver and fixes the SMP-dependent context switch code. We had a subtle bug where we were using interrupt numbers 256-259 for IPIs, but ppc32 had NR_IRQS = 256. Moved the IPIs down to use interrupt numbers 252-255 instead. Signed-off-by: Paul Mackerras <paulus@samba.org>
* Merge by hand from Linus' tree.Paul Mackerras2005-09-2963-1502/+1198
|\ | | | | | | Signed-off-by: Paul Mackerras <paulus@samba.org>
| * [PATCH] ppc64: More hugepage fixesBenjamin Herrenschmidt2005-09-282-4/+5
| | | | | | | | | | | | | | | | | | | | | | My previous patch fixing invalidation of huge PTEs wasn't good enough, we still had an issue if a PTE invalidation batch contained both small and large pages. This patch fixes this by making sure the batch is flushed if the page size fed to it changes. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
| * [PATCH] ppc64: Add missing barrier() in kexec codeAnton Blanchard2005-09-281-0/+1
| | | | | | | | | | | | | | | | | | | | Mikey and I were testing kexec and hit a lockup. It turns out gcc 4.0 optimises the kexec_prepare_cpus loop so we avoid reloading paca.hw_cpu_id. A gcc barrier() fixes the problem. Signed-off-by: Anton Blanchard <anton@samba.org> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
| * [PATCH] x86-64: Fix bad assumption that dualcore cpus have synced TSCsjohn stultz2005-09-281-3/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This should resolve the issue seen in bugme bug #5105, where it is assumed that dualcore x86_64 systems have synced TSCs. This is not the case, and alternate timesources should be used instead. For more details, see: http://bugzilla.kernel.org/show_bug.cgi?id=5105 Andi's earlier concerns that the TSCs should be synced on dualcore systems have been resolved by confirmation from AMD folks that they can be unsynced. Acked-by: Andi Kleen <ak@suse.de> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
| * [PATCH] ppc: fix stupid thinko in oprofile fixBenjamin Herrenschmidt2005-09-281-2/+1
| | | | | | | | | | | | | | | | I did something stupid in my oprofile fix, here's the obvious fix: Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
| * Merge master.kernel.org:/pub/scm/linux/kernel/git/davem/sparc-2.6Linus Torvalds2005-09-2724-1170/+856
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| | * [SPARC64]: Do not do TLB pre-filling any more.David S. Miller2005-09-262-35/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In order to do it correctly on UltraSPARC-III+ and later we'd need to add some complicated code to set the TAG access extension register before loading the TLB. Since this optimization gives questionable gains, it's best to just remove it for now instead of adding the fix for Ultra-III+ Signed-off-by: David S. Miller <davem@davemloft.net>
| | * [SPARC64]: Simplify Spitfire D-cache page flush.David S. Miller2005-09-261-46/+23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | It tries to batch up the tag loads and comparisons, and then the stores. And this is just complicated instead of efficient. Also, make the symbol of the Cheetah version more grepable. Signed-off-by: David S. Miller <davem@davemloft.net>
| | * [SPARC64]: Probe D/I/E-cache config and use.David S. Miller2005-09-265-23/+96
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | At boot time, determine the D-cache, I-cache and E-cache size and line-size. Use them in cache flushes when appropriate. This change was motivated by discovering that the D-cache on UltraSparc-IIIi and later are 64K not 32K, and the flushes done by the Cheetah error handlers were assuming a 32K size. There are still some pieces of code that are hard coding things and will need to be fixed up at some point. While we're here, fix the D-cache and I-cache parity error handlers to run with interrupts disabled, and when the trap occurs at trap level > 1 log the event via a counter displayed in /proc/cpuinfo. Signed-off-by: David S. Miller <davem@davemloft.net>
| | * [SPARC64]: Add CONFIG_DEBUG_PAGEALLOC support.David S. Miller2005-09-255-12/+147
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The trick is that we do the kernel linear mapping TLB miss starting with an instruction sequence like this: ba,pt %xcc, kvmap_load xor %g2, %g4, %g5 succeeded by an instruction sequence which performs a full page table walk starting at swapper_pg_dir. We first take over the trap table from the firmware. Then, using this constant PTE generation for the linear mapping area above, we build the kernel page tables for the linear mapping. After this is setup, we patch that branch above into a "nop", which will cause TLB misses to fall through to the full page table walk. With this, the page unmapping for CONFIG_DEBUG_PAGEALLOC is trivial. Signed-off-by: David S. Miller <davem@davemloft.net>
| | * [SPARC64]: Fix mask formation in tomatillo_wsync_handler()David S. Miller2005-09-241-1/+1
| | | | | | | | | | | | | | | | | | "1" needs to be "1UL", this is a 64-bit mask we're creating. Signed-off-by: David S. Miller <davem@davemloft.net>
| | * [SPARC64]: Mark functions called by paging_init() as __init.David S. Miller2005-09-231-6/+6
| | | | | | | | | | | | Signed-off-by: David S. Miller <davem@davemloft.net>
| | * [SPARC64]: Kill unused variable in setup_arch()David S. Miller2005-09-231-7/+0
| | | | | | | | | | | | | | | | | | 'highest_paddr' is set, but never actually used. Signed-off-by: David S. Miller <davem@davemloft.net>
| | * [SPARC64]: Fix comment typo in head.SDavid S. Miller2005-09-221-1/+1
| | | | | | | | | | | | Signed-off-by: David S. Miller <davem@davemloft.net>
| | * [SPARC64]: Rewrite bootup sequence.David S. Miller2005-09-2213-625/+221
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Instead of all of this cpu-specific code to remap the kernel to the correct location, use portable firmware calls to do this instead. What we do now is the following in position independant assembler: chosen_node = prom_finddevice("/chosen"); prom_mmu_ihandle_cache = prom_getint(chosen_node, "mmu"); vaddr = 4MB_ALIGN(current_text_addr()); prom_translate(vaddr, &paddr_high, &paddr_low, &mode); prom_boot_mapping_mode = mode; prom_boot_mapping_phys_high = paddr_high; prom_boot_mapping_phys_low = paddr_low; prom_map(-1, 8 * 1024 * 1024, KERNBASE, paddr_low); and that replaces the massive amount of by-hand TLB probing and programming we used to do here. The new code should also handle properly the case where the kernel is mapped at the correct address already (think: future kexec support). Consequently, the bulk of remap_kernel() dies as does the entirety of arch/sparc64/prom/map.S We try to share some strings in the PROM library with the ones used at bootup, and while we're here mark input strings to oplib.h routines with "const" when appropriate. There are many more simplifications now possible. For one thing, we can consolidate the two copies we now have of a lot of cpu setup code sitting in head.S and trampoline.S. This is a significant step towards CONFIG_DEBUG_PAGEALLOC support. Signed-off-by: David S. Miller <davem@davemloft.net>
| | * [SPARC64]: Kill readjust_prom_translations()David S. Miller2005-09-221-35/+0
| | | | | | | | | | | | | | | | | | | | | Testing shows that the prom_unmap() calls do absolutely nothing. Signed-off-by: David S. Miller <davem@davemloft.net>
| | * [SPARC64]: Remove unnecessary paging_init() cruft.David S. Miller2005-09-221-99/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Because we don't access the PAGE_OFFSET linear mappings any longer before we take over the trap table from the firmware, we don't need to load dummy mappings there into the TLB and we don't need the bootmap_base hack any longer either. While we are here, check for a larger than 8MB kernel and halt the boot with an error message. We know that doesn't work, so instead of failing mysteriously we should let the user know exactly what's wrong. Signed-off-by: David S. Miller <davem@davemloft.net>
| | * [SPARC64]: Do not allocate OBP page tables using bootmemDavid S. Miller2005-09-221-47/+100
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Just allocate them physically starting from the end of the kernel image. This incredibly simplifies our MM bootstrap in that we don't need any mappings in the linear PAGE_OFFSET area working in order to bootstrap ourselves and take over the trap table from the firmware. Many further simplifications are possible now, and this also sets the stage for CONFIG_DEBUG_PAGEALLOC support. Signed-off-by: David S. Miller <davem@davemloft.net>
| | * [SPARC64]: Break up inherit_prom_mappings() into it's constituent parts.David S. Miller2005-09-221-141/+160
| | | | | | | | | | | | | | | | | | This thing was just a huge monolithic mess, so chop it up. Signed-off-by: David S. Miller <davem@davemloft.net>
| | * [SPARC64]: Do not allocate prom translations using bootmem.David S. Miller2005-09-211-28/+26
| | | | | | | | | | | | | | | | | | Use __initdata instead. Signed-off-by: David S. Miller <davem@davemloft.net>
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