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* sparc: Set reboot-cmd using reboot data hypervisor call if available.David S. Miller2011-08-025-9/+53
| | | | Signed-off-by: David S. Miller <davem@davemloft.net>
* sparc: Add some missing hypervisor API groups.David S. Miller2011-08-022-0/+12
| | | | Signed-off-by: David S. Miller <davem@davemloft.net>
* sparc: Use hweight64() in popc emulation.David S. Miller2011-08-021-11/+4
| | | | Signed-off-by: David S. Miller <davem@davemloft.net>
* sparc: Use popc if possible for hweight routines.David S. Miller2011-08-027-40/+102
| | | | | | Just like powerpc, we code patch at boot time. Signed-off-by: David S. Miller <davem@davemloft.net>
* sparc: Minor tweaks to Niagara page copy/clear.David S. Miller2011-08-024-102/+77
| | | | | | | | | | Don't use floating point on Niagara2, use the traditional plain Niagara code instead. Unroll Niagara loops to 128 bytes for copy, and 256 bytes for clear. Signed-off-by: David S. Miller <davem@davemloft.net>
* sparc: Sanitize cpu feature detection and reporting.David S. Miller2011-07-284-36/+185
| | | | | | | | | | | | | | | | Instead of evaluating the cpu features for ELF_HWCAP every exec, calculate it once at boot time. Add AV_SPARC_* capability flag bits, compatible with what Solaris reports to applications. Report these capabilities once in the kernel log, and also via /proc/cpuinfo in a new "cpucaps" entry. If available, fetch the cpu features from the machine description 'hwcap-list' property of the 'cpu' node. Signed-off-by: David S. Miller <davem@davemloft.net>
* sparc: Detect and handle UltraSPARC-T3 cpu types.David S. Miller2011-07-277-4/+50
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The cpu compatible string we look for is "SPARC-T3". As far as memset/memcpy optimizations go, we treat this chip the same as Niagara-T2/T2+. Use cache initializing stores for memset, and use perfetch, FPU block loads, cache initializing stores, and block stores for copies. We use the Niagara-T2 perf support, since T3 is a close relative in this regard. Later we'll add support for the new events T3 can report, plus enable T3's new "sample" mode. For now I haven't added any new ELF hwcap flags. We probably need to add a couple, for example: T2 and T3 both support the population count instruction in hardware. T3 supports VIS3 instructions, including support (finally) for partitioned shift. One can also now move directly between float and integer registers. T3 supports instructions meant to help with Galois Field and other HPC calculations, such as XOR multiply. Also there are "OP and negate" instructions, for example "fnmul" which is multiply-and-negate. T3 recognizes the transactional memory opcodes, however since transactional memory isn't supported: 1) 'commit' behaves as a NOP and 2) 'chkpt' always branches 3) 'rdcps' returns all zeros and 4) 'wrcps' behaves as a NOP. So we'll need about 3 new elf capability flags in the end to represent all of these things. Signed-off-by: David S. Miller <davem@davemloft.net>
* sparc: Don't do expensive hypervisor PCR write unless necessary.David S. Miller2011-07-271-2/+5
| | | | | | | | | | The hypervisor call is only necessary if hypervisor events are being requested. So if we're not tracking hypervisor events, simply do a direct register write. Signed-off-by: David S. Miller <davem@davemloft.net>
* sparc: Add T3 sun4v cpu type and hypervisor group defines.David S. Miller2011-07-273-0/+3
| | | | Signed-off-by: David S. Miller <davem@davemloft.net>
* sparc: Don't leave sparc_pmu_type NULL on sun4v.David S. Miller2011-07-271-0/+1
| | | | | | Otherwise we'll crash in the sparc perf init code. Signed-off-by: David S. Miller <davem@davemloft.net>
* sparc: rename atomic_add_unlessStephen Rothwell2011-07-271-2/+2
| | | | | | | | | | | | Should have been done in commit 1af08a1407f4 ("This is in preparation for more generic atomic"). Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au> Cc: Arun Sharma <asharma@fb.com> Cc: David Miller <davem@davemloft.net> Cc: "Hans-Christian Egtvedt" <hans-christian.egtvedt@atmel.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* Merge branch 'next' of git://git.monstr.eu/linux-2.6-microblazeLinus Torvalds2011-07-2716-133/+149
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'next' of git://git.monstr.eu/linux-2.6-microblaze: microblaze: Do not show error message for 32 interrupt lines Revert "microblaze: PCI fix typo fault in of_node pointer moving into pci_bus" microblaze: PCI fix typo fault in of_node pointer moving into pci_bus microblaze: Add support for early console on mdm microblaze: Simplify early console binding from DT microblaze: Get early printk console earlier microblaze: Standardise cpuinfo output for cache policy microblaze: Unprivileged stream instruction awareness microblaze: trivial: Fix typo fault microblaze: exec: Remove redundant set_fs(USER_DS) microblaze: Remove duplicated prototype of start_thread() microblaze: Fix unaligned value saving to the stack for system with MMU microblaze/irqs: Do not trace arch_local_{*,irq_*} functions
| * microblaze: Do not show error message for 32 interrupt linesMichal Simek2011-07-271-1/+1
| | | | | | | | | | | | | | | | When interrupt controller uses 32 interrupts lines the kernel show error message about mismatch in kind-of-intr parameter because it exceeds u32. Recast fixs this issue. Signed-off-by: Michal Simek <monstr@monstr.eu>
| * Revert "microblaze: PCI fix typo fault in of_node pointer moving into pci_bus"Michal Simek2011-07-261-1/+1
| | | | | | | | | | | | | | | | | | | | | | This reverts commit c9d761b7c4b658a937a941aea2781f511a0ff3ec. Ben' commit "microblaze/pci: Move the remains of pci_32.c to pci-common.c" (sha1: bf13a6fa09b8db7f1fd59b5e2ed3674a89a6a25c) completely removed pci_32.c that's why my fixing commit caused the problem with merging and need to be revert. Signed-off-by: Michal Simek <monstr@monstr.eu>
| * microblaze: PCI fix typo fault in of_node pointer moving into pci_busMichal Simek2011-07-251-1/+1
| | | | | | | | | | | | | | | | Bug introduces in: powerpc/pci: Make both ppc32 and ppc64 use sysdata for pci_controller (sha1: b5d937de0367d26f65b9af1aef5f2c34c1939be0) Signed-off-by: Michal Simek <monstr@monstr.eu>
| * microblaze: Add support for early console on mdmMichal Simek2011-07-252-2/+3
| | | | | | | | | | | | | | | | Support mdm early console: - extend time for retries - add mdm compatible property Signed-off-by: Michal Simek <monstr@monstr.eu>
| * microblaze: Simplify early console binding from DTMichal Simek2011-07-253-82/+70
| | | | | | | | | | | | | | | | | | | | Recognize early Linux console from chosen - linux,stdout-path instead of detecting the first console with appropriate compatible strings. This patch solved the problem on system with multiple consoles. Signed-off-by: Michal Simek <monstr@monstr.eu>
| * microblaze: Get early printk console earlierMichal Simek2011-07-253-4/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 1. Register early console as standard console 2. Enable CON_BOOT console flag to ensure auto-unregistering by the kernel 3. remap_early_printk function remap physical console baseaddr to virtual space Usage specific function for console remap is done after memory initialization with IRQ turn off that's why there is not necessary to protect it. The reason for remapping is that the kernel use TLB 63 for 1:1 address mapping to be able to use console in very early boot-up phase. But allocating one TLB just for console caused performance degression that's why ioremaps create new mapping and TLB 63 is automatically released and ready to use. Signed-off-by: Michal Simek <monstr@monstr.eu> CC: Russell King <linux@arm.linux.org.uk> CC: Ralf Baechle <ralf@linux-mips.org> CC: Ingo Molnar <mingo@redhat.com> CC: Alan Cox <alan@linux.intel.com> CC: <linux-serial@vger.kernel.org> CC: Arnd Bergmann <arnd@arndb.de>
| * microblaze: Standardise cpuinfo output for cache policyJohn A. Williams2011-07-251-2/+3
| | | | | | | | | | | | | | The current cpuinfo output for the cache policy has no leading tag:, making it difficult to parse. Add a leaning "Dcache-policy:" tag to this field. Signed-off-by: John A. Williams <john.williams@petalogix.com>
| * microblaze: Unprivileged stream instruction awarenessJohn A. Williams2011-07-256-1/+13
| | | | | | | | | | | | | | | | | | | | | | Add cpuinfo support for the new MicroBlaze option permitting userspace (unprivileged) access to the streaming instructions (FSL / AXI-stream). Emit a noisy warning at bootup if this is enabled, because bad user code can potentially lockup the CPU. Signed-off-by: John A. Williams <john.williams@petalogix.com> Signed-off-by: Michal Simek <monstr@monstr.eu>
| * microblaze: trivial: Fix typo faultMichal Simek2011-07-251-1/+1
| | | | | | | | | | | | descrtiption -> description Signed-off-by: Michal Simek <monstr@monstr.eu>
| * microblaze: exec: Remove redundant set_fs(USER_DS)Mathias Krause2011-07-251-1/+0
| | | | | | | | | | | | | | The address limit is already set in flush_old_exec() so this set_fs(USER_DS) is redundant. Signed-off-by: Mathias Krause <minipli@googlemail.com>
| * microblaze: Remove duplicated prototype of start_thread()Mathias Krause2011-07-251-3/+0
| | | | | | | | | | | | | | | | The prototype for start_thread() is already present in the MMU/NOMMU independent part of the file. Remove the duplicate. Signed-off-by: Mathias Krause <minipli@googlemail.com> Signed-off-by: Michal Simek <monstr@monstr.eu>
| * microblaze: Fix unaligned value saving to the stack for system with MMUMichal Simek2011-07-251-28/+28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Several registers weren't saved correctly to the stack. Unaligned expection for system with MMU stores value in ex_tmp_data_loc_X address which is load to registers r3. The next step is to move this value from r3 to a destination register which caused unaligned exception. For several registers this value was directly moved to the register. For example for r28: by "or r28, r0, r3" but register r28 was rewritten when kernel returns from exception handler by value saved on stack. This patch changed r3 saving to the correct address on the stack. For example for r28: by "swi r3, r1, 4 * 28" When kernel returns from the exception handler, correct value is restored. Signed-off-by: Michal Simek <monstr@monstr.eu>
| * microblaze/irqs: Do not trace arch_local_{*,irq_*} functionsSteven Rostedt2011-07-251-10/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | Do not trace arch_local_save_flags(), arch_local_irq_*() and friends. Although they are marked inline, gcc may still make a function out of them and add it to the pool of functions that are traced by the function tracer. This can cause undesirable results (kernel panic, triple faults, etc). Add the notrace notation to prevent them from ever being traced. Cc: Michal Simek <monstr@monstr.eu> Signed-off-by: Steven Rostedt <rostedt@goodmis.org>
* | Merge branch 'next/devel2' of ↵Linus Torvalds2011-07-2630-491/+1424
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/arm/linux-arm-soc * 'next/devel2' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/linux-arm-soc: (47 commits) OMAP: Add debugfs node to show the summary of all clocks OMAP2+: hwmod: Follow the recommended PRCM module enable sequence OMAP2+: clock: allow per-SoC clock init code to prevent clockdomain calls from clock code OMAP2+: clockdomain: Add per clkdm lock to prevent concurrent state programming OMAP2+: PM: idle clkdms only if already in idle OMAP2+: clockdomain: add clkdm_in_hwsup() OMAP2+: clockdomain: Add 2 APIs to control clockdomain from hwmod framework OMAP: clockdomain: Remove redundant call to pwrdm_wait_transition() OMAP4: hwmod: Introduce the module control in hwmod control OMAP4: cm: Add two new APIs for modulemode control OMAP4: hwmod data: Add modulemode entry in omap_hwmod structure OMAP4: hwmod data: Add PRM context register offset OMAP4: prm: Remove deprecated functions OMAP4: prm: Replace warm reset API with the offset based version OMAP4: hwmod: Replace RSTCTRL absolute address with offset macros OMAP: hwmod: Wait the idle status to be disabled OMAP4: hwmod: Replace CLKCTRL absolute address with offset macros OMAP2+: hwmod: Init clkdm field at boot time OMAP4: hwmod data: Add clock domain attribute OMAP4: clock data: Add missing divider selection for auxclks ...
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| *-. \ Merge branches 'omap/prcm' and 'omap/mfd' of ↵Arnd Bergmann2011-07-17119-6509/+5137
| |\ \ \ | | | | | | | | | | | | | | | git+ssh://master.kernel.org/pub/scm/linux/kernel/git/arm/linux-arm-soc into next/devel-2
| | | * \ Merge branch 'peter/topic/for-tony' of ↵Tony Lindgren2011-07-075-15/+79
| | | |\ \ | | | | | | | | | | | | | | | | | | git://gitorious.org/omap-audio/linux-audio into twl-asoc
| | | | * | OMAP4: SDP4430: Add twl6040 codec platform supportMisael Lopez Cruz2011-07-041-1/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Configure, and enable the twl6040 codec on SDP4430. Signed-off-by: Misael Lopez Cruz <misael.lopez@ti.com> Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Acked-by: Tony Lindgren <tony@atomide.com>
| | | | * | OMAP4: SDP4430: Add twl6040 vibrator platform supportPeter Ujfalusi2011-07-041-0/+48
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add twl4030_vibra platform data, and the needed regulators for twl6040 vibrator. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Acked-by: Tony Lindgren <tony@atomide.com>
| | | | * | mfd: twl6040: Add initial supportMisael Lopez Cruz2011-07-041-2/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | TWL6040 IC provides analog high-end audio codec functions for handset applications. It contains several audio analog inputs and outputs as well as vibrator support. It's connected to the host processor via PDM interface for audio data communication. The audio modules are controlled by internal registers that can be accessed by I2C and PDM interface. TWL6040 MFD will be registered as a child of TWL-CORE, and will have two children of its own: twl6040-codec and twl6040-vibra. This driver is based on TWL4030 and WM8350 MFD drivers. Signed-off-by: Misael Lopez Cruz <misael.lopez@ti.com> Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Acked-by: Samuel Ortiz <sameo@linux.intel.com>
| | | | * | MFD: twl4030-audio: Rename platform dataPeter Ujfalusi2011-07-043-13/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Allign the platform data names for twl4030 audio submodule: twl4030_audio_data: for the core MFD driver twl4030_codec_data: for ASoC codec driver twl4030_vibra_data: for the input/ForceFeedback driver To avoid breakage, change all depending drivers, files to use the new types. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Acked-by: Samuel Ortiz <sameo@linux.intel.com>
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| | *---. \ \ \ Merge branches 'omap4_clockdomain_hwmod_3.1', 'clock_debugfs_a_3.1', ↵Paul Walmsley2011-07-106-127/+309
| | |\ \ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | 'omap4_clock_auxclk_3.1' and 'omap_device_a_3.1' into prcm-devel-3.1
| | | | | * | | | OMAP: omap_device: Create clkdev entry for hwmod main_clkBenoit Cousson2011-07-105-103/+118
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Extend the existing function to create clkdev for every optional clocks to add a well one "fck" alias for the main_clk of the omap_hwmod. It will allow to remove these static clkdev entries from the clockXXX_data.c file. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Cc: Paul Walmsley <paul@pwsan.com> Cc: Kevin Hilman <khilman@ti.com> Cc: Todd Poynor <toddpoynor@google.com> [paul@pwsan.com: remove all of the "fck" role clkdev aliases from the clock data files; fixed error message] Signed-off-by: Paul Walmsley <paul@pwsan.com>
| | | | * | | | | OMAP4: clock data: Add missing divider selection for auxclksRajendra Nayak2011-07-101-24/+152
| | | | |/ / / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On OMAP4 the auxclk nodes (part of SCRM) support both divider as well as parent selection. Supporting this requires splitting the existing nodes (which support only parent selection) into two nodes, one for parent and another for divider selection. The nodes for parent selection are named auxclk*_src_ck and the ones for divider selection as auxclk*_ck. Signed-off-by: Rajendra Nayak <rnayak@ti.com> [b-cousson@ti.com: Rebase on top of clock cleanup and autogen alignement] Signed-off-by: Benoit Cousson <b-cousson@ti.com> Cc: Paul Walmsley <paul@pwsan.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
| | | * | | | | OMAP: Add debugfs node to show the summary of all clocksJon Hunter2011-07-101-0/+39
| | | |/ / / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a debugfs node called "summary" to /sys/kernel/debug/clock/ that displays a quick summary of all clocks registered in the "clocks" structure. The format of the output from this node is: <clock-name> <parent-name> <rate> <usecount> This debugfs node was very helpful for taking a quick snapshot of the linux clock tree for OMAP and ensuring clock frequencies calculated by the kernel were indeed correct. This patch helped uncover some bugs in the linux clock tree for OMAP4. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
| | * | | | | OMAP2+: hwmod: Follow the recommended PRCM module enable sequenceRajendra Nayak2011-07-102-20/+51
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On OMAP4, the PRCM recommended sequence for enabling a module after power-on-reset is: -1- Force clkdm to SW_WKUP -2- Enabling the clocks -3- Configure desired module mode to "enable" or "auto" -4- Wait for the desired module idle status to be FUNC -5- Program clkdm in HW_AUTO(if supported) This sequence applies to all older OMAPs' as well, however since they use autodeps, it makes sure that no clkdm is in IDLE, and hence not requiring a force SW_WKUP when a module is being enabled. OMAP4 does not need to support autodeps, because of the dyanamic dependency feature, wherein the HW takes care of waking up a clockdomain from idle and hence the module, whenever an interconnect access happens to the given module. Implementing the sequence for OMAP4 requires the clockdomain handling that is currently done in clock framework to be done as part of hwmod framework since the step -4- above to "Wait for the desired module idle status to be FUNC" is done as part of hwmod framework. Signed-off-by: Rajendra Nayak <rnayak@ti.com> [b-cousson@ti.com: Adapt it to the new clkdm hwmod attribute and API] Signed-off-by: Benoit Cousson <b-cousson@ti.com> Cc: Paul Walmsley <paul@pwsan.com> [paul@pwsan.com: dropped mach-omap2/clock.c changes; modified to only call the clockdomain code if oh->clkdm is set; disable clock->clockdomain interaction on OMAP4] Signed-off-by: Paul Walmsley <paul@pwsan.com>
| | * | | | | OMAP2+: clock: allow per-SoC clock init code to prevent clockdomain calls ↵Paul Walmsley2011-07-102-3/+27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | from clock code The OMAP2/3 clock code was written to notify the clockdomain code when the first clock in a clockdomain is enabled and when the last enabled clock in a clockdomain is disabled. OMAP4 requires a different approach: the hwmod code needs to signal the clockdomain code when to force-enable and auto-idle a clockdomain during the IP block enable process. The current conjecture is that once that hwmod sequence is implemented, it will no longer be necessary for the clock code to call into the clockdomain code for "optional clocks" on OMAP4. Add a static flag to the OMAP2+ clock code, clkdm_control, that by default preserves the OMAP2/3 behavior. Also add a function, omap2_clk_disable_clkdm_control(), intended to be called from OMAP4 and beyond clock initcalls, that disables the old behavior. Part of this patch was originally based on a patch by Rajendra Nayak <rnayak@ti.com>. Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Benoît Cousson <b-cousson@ti.com> Cc: Rajendra Nayak <rnayak@ti.com>
| | * | | | | OMAP2+: clockdomain: Add per clkdm lock to prevent concurrent state programmingRajendra Nayak2011-07-104-18/+50
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since the clkdm state programming is now done from within the hwmod framework (which uses a per-hwmod lock) instead of the being done from the clock framework (which used a global lock), there is now a need to have per-clkdm locking to prevent races between different hwmods/modules belonging to the same clock domain concurrently programming the clkdm state. Signed-off-by: Rajendra Nayak <rnayak@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com> Cc: Paul Walmsley <paul@pwsan.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
| | * | | | | OMAP2+: PM: idle clkdms only if already in idleRajendra Nayak2011-07-101-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The omap_set_pwrdm_state function forces clockdomains to idle, without checking the existing idle state programmed, instead based solely on the HW capability of the clockdomain to support idle. This is wrong and the clockdomains should be idled post a state_switch *only* if idle transitions on the clockdomain were already enabled. Signed-off-by: Rajendra Nayak <rnayak@ti.com> Cc: Paul Walmsley <paul@pwsan.com> Acked-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
| | * | | | | OMAP2+: clockdomain: add clkdm_in_hwsup()Paul Walmsley2011-07-102-2/+34
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a new function, clkdm_in_hwsup(), that returns true if a clockdomain is configured for hardware-supervised idle. It does not actually read the hardware; rather, it checks an internal flag in the struct clockdomain, which is changed when the clockdomain is switched in and out of hardware-supervised idle. This should be safe, since all changes to the idle mode should pass through the clockdomain code. Based on a set of patches by Rajendra Nayak <rnayak@ti.com> which do the same thing by checking the hardware bits. This approach should be faster and more compact. Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Rajendra Nayak <rnayak@ti.com> Cc: Todd Poynor <toddpoynor@google.com> Cc: Benoît Cousson <b-cousson@ti.com>
| | * | | | | OMAP2+: clockdomain: Add 2 APIs to control clockdomain from hwmod frameworkBenoit Cousson2011-07-102-36/+109
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Duplicate the existing API for clockdomain enable from clock to enable a clock domain from hwmod framework. This will be needed when the hwmod framework will move from the current clock centric approach to the module based approach. These APIs are returning 0 for the moment for OMAP2 and OMAP3 until their hwmods are updated with the clksm attribute. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Cc: Kevin Hilman <khilman@ti.com> Cc: Paul Walmsley <paul@pwsan.com> Cc: Rajendra Nayak <rnayak@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
| | * | | | | OMAP: clockdomain: Remove redundant call to pwrdm_wait_transition()Vaibhav Bedia2011-07-101-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The call to pwrdm_wait_transition() in clkdm_clk_enable() is redundant since the function pwrdm_clkdm_state_switch() which is called next also does the same thing. Signed-off-by: Vaibhav Bedia <vaibhav.bedia@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
| | * | | | | OMAP4: hwmod: Introduce the module control in hwmod controlBenoit Cousson2011-07-101-2/+61
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Take advantage of the explicit modulemode control to fix the way parents clocks are managed. A module must be disabled before any parents are disabled. That programming model was not possible with the previous implementation that was considering a modulemode as a leaf clock node managed by the clock fmwk. This was leading to bad crash upon disable when the parent clock was gated before the module completed its transition to idle. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Cc: Paul Walmsley <paul@pwsan.com> Cc: Rajendra Nayak <rnayak@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
| | * | | | | OMAP4: cm: Add two new APIs for modulemode controlBenoit Cousson2011-07-102-0/+45
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In OMAP4, a new programming model based on module control instead of clock control was introduced. Expose two APIs to allow the upper layer (omap_hwmod) to control the module mode independently of the parent clocks management. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Cc: Paul Walmsley <paul@pwsan.com> Cc: Rajendra Nayak <rnayak@ti.com> [paul@pwsan.com: renamed 'omap4_cm_' fns to 'omap4_cminst_'; cleaned up kerneldoc] Signed-off-by: Paul Walmsley <paul@pwsan.com>
| | * | | | | OMAP4: hwmod data: Add modulemode entry in omap_hwmod structureBenoit Cousson2011-07-102-0/+61
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a new field to provide the mode supported by the module. The mode will control the way mandatory clocks are managed by the PRCM. 0 : Module is temporarily disabled by SW. OCP access to module are stalled. Can be used to change timing parameter of GPMC module. 1 : Module is managed automatically by HW according to clock domain transition. A clock domain sleep transition put module into idle. A wakeup domain transition put it back into function. If CLKTRCTRL=3, any OCP access to module is always granted. Module clocks may be gated according to the clock domain state. 2 : Module is explicitly enabled. Interface clock (if not used for functions) may be gated according to the clock domain state. Functional clocks are guarantied to stay present. As long as in this configuration, power domain sleep transition cannot happen. Some modules will have a modulemode initialized at 1 (HWCTRL) by default. This is the case for interconnect and simple module like GPIO, WDT, MAILBOX. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Cc: Paul Walmsley <paul@pwsan.com> Cc: Rajendra Nayak <rnayak@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
| | * | | | | OMAP4: hwmod data: Add PRM context register offsetBenoit Cousson2011-07-102-0/+75
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a 'context_offs' entry in the prcm.omap4 structure to all IPs when applicable. The offset will be used to retrieve the per module context lost information now available on OMAP4. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Cc: Paul Walmsley <paul@pwsan.com> Cc: Rajendra Nayak <rnayak@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
| | * | | | | OMAP4: prm: Remove deprecated functionsBenoit Cousson2011-07-102-41/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The new prminst_xxx accessors based on partition and offset is now used, so removed all the previous prcm_xxx accessors. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Cc: Paul Walmsley <paul@pwsan.com> Cc: Rajendra Nayak <rnayak@ti.com> [paul@pwsan.com: remove fn prototypes also] Signed-off-by: Paul Walmsley <paul@pwsan.com>
| | * | | | | OMAP4: prm: Replace warm reset API with the offset based versionBenoit Cousson2011-07-105-22/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The warm reset function was still using the obsolete API. Replace it by the new one and move the file to the proper c file. Change the function names to stick to the file convention as suggested by Paul Walmsley <paul@pwsan.com>: prm_xxx -> prminst_xxx Signed-off-by: Benoit Cousson <b-cousson@ti.com> Cc: Paul Walmsley <paul@pwsan.com> Cc: Rajendra Nayak <rnayak@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
| | * | | | | OMAP4: hwmod: Replace RSTCTRL absolute address with offset macrosBenoit Cousson2011-07-107-113/+125
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The RSTCTRL register was accessed using an absolute address. The usage of hardcoded macros to calculate virtual address from physical one should be avoided as much as possible. The usage of an offset will allow future improvement like migration from the current architecture code toward a module driver. Update prm_xxx accessors, move definition to the proper header file and update copyrights. Change the s16 register offset parameter to u16. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Cc: Paul Walmsley <paul@pwsan.com> Cc: Rajendra Nayak <rnayak@ti.com> [paul@pwsan.com: use '_prminst_' in function names that are part of the prminst44xx.c file] Signed-off-by: Paul Walmsley <paul@pwsan.com>
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