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* KVM: New guest debug interfaceJan Kiszka2009-03-2411-79/+138
| | | | | | | | | | | | | | | | | | | | | | | | | | This rips out the support for KVM_DEBUG_GUEST and introduces a new IOCTL instead: KVM_SET_GUEST_DEBUG. The IOCTL payload consists of a generic part, controlling the "main switch" and the single-step feature. The arch specific part adds an x86 interface for intercepting both types of debug exceptions separately and re-injecting them when the host was not interested. Moveover, the foundation for guest debugging via debug registers is layed. To signal breakpoint events properly back to userland, an arch-specific data block is now returned along KVM_EXIT_DEBUG. For x86, the arch block contains the PC, the debug exception, and relevant debug registers to tell debug events properly apart. The availability of this new interface is signaled by KVM_CAP_SET_GUEST_DEBUG. Empty stubs for not yet supported archs are provided. Note that both SVM and VTX are supported, but only the latter was tested yet. Based on the experience with all those VTX corner case, I would be fairly surprised if SVM will work out of the box. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Avi Kivity <avi@redhat.com>
* KVM: VMX: Support for injecting software exceptionsJan Kiszka2009-03-242-16/+22
| | | | | | | | | | VMX differentiates between processor and software generated exceptions when injecting them into the guest. Extend vmx_queue_exception accordingly (and refactor related constants) so that we can use this service reliably for the new guest debugging framework. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Avi Kivity <avi@redhat.com>
* KVM: SVM: Only allow setting of EFER_SVME when CPUID SVM is setAlexander Graf2009-03-241-16/+42
| | | | | | | | | | | | | | | | | | | | Userspace has to tell the kernel module somehow that nested SVM should be used. The easiest way that doesn't break anything I could think of is to implement if (cpuid & svm) allow write to efer else deny write to efer Old userspaces mask the SVM capability bit, so they don't break. In order to find out that the SVM capability is set, I had to split the kvm_emulate_cpuid into a finding and an emulating part. (introduced in v6) Acked-by: Joerg Roedel <joro@8bytes.org> Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Avi Kivity <avi@redhat.com>
* KVM: SVM: Allow setting the SVME bitAlexander Graf2009-03-241-0/+8
| | | | | | | | | | | | | | Normally setting the SVME bit in EFER is not allowed, as we did not support SVM. Not since we do, we should also allow enabling SVM mode. v2 comes as last patch, so we don't enable half-ready code v4 introduces a module option to enable SVM v6 warns that nesting is enabled Acked-by: Joerg Roedel <joro@8bytes.org> Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Avi Kivity <avi@redhat.com>
* KVM: SVM: Allow read access to MSR_VM_VRJoerg Roedel2009-03-241-0/+3
| | | | | | | | | | KVM tries to read the VM_CR MSR to find out if SVM was disabled by the BIOS. So implement read support for this MSR to make nested SVM running. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com> Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Avi Kivity <avi@redhat.com>
* KVM: SVM: Add VMEXIT handler and interceptsAlexander Graf2009-03-241-0/+293
| | | | | | | | | | | | | | | | This adds the #VMEXIT intercept, so we return to the level 1 guest when something happens in the level 2 guest that should return to the level 1 guest. v2 implements HIF handling and cleans up exception interception v3 adds support for V_INTR_MASKING_MASK v4 uses the host page hsave v5 removes IOPM merging code v6 moves mmu code out of the atomic section Acked-by: Joerg Roedel <joro@8bytes.org> Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Avi Kivity <avi@redhat.com>
* KVM: SVM: Add VMRUN handlerAlexander Graf2009-03-243-2/+165
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch implements VMRUN. VMRUN enters a virtual CPU and runs that in the same context as the normal guest CPU would run. So basically it is implemented the same way, a normal CPU would do it. We also prepare all intercepts that get OR'ed with the original intercepts, as we do not allow a level 2 guest to be intercepted less than the first level guest. v2 implements the following improvements: - fixes the CPL check - does not allocate iopm when not used - remembers the host's IF in the HIF bit in the hflags v3: - make use of the new permission checking - add support for V_INTR_MASKING_MASK v4: - use host page backed hsave v5: - remove IOPM merging code v6: - save cr4 so PAE l1 guests work v7: - return 0 on vmrun so we check the MSRs too - fix MSR check to use the correct variable Acked-by: Joerg Roedel <joro@8bytes.org> Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Avi Kivity <avi@redhat.com>
* KVM: SVM: Add VMLOAD and VMSAVE handlersAlexander Graf2009-03-241-2/+58
| | | | | | | | | | | | | This implements the VMLOAD and VMSAVE instructions, that usually surround the VMRUN instructions. Both instructions load / restore the same elements, so we only need to implement them once. v2 fixes CPL checking and replaces memcpy by assignments v3 makes use of the new permission checking Acked-by: Joerg Roedel <joro@8bytes.org> Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Avi Kivity <avi@redhat.com>
* KVM: SVM: Implement hsaveAlexander Graf2009-03-243-1/+16
| | | | | | | | | | | | | Implement the hsave MSR, that gives the VCPU a GPA to save the old guest state in. v2 allows userspace to save/restore hsave v4 dummys out the hsave MSR, so we use a host page v6 remembers the guest's hsave and exports the MSR Acked-by: Joerg Roedel <joro@8bytes.org> Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Avi Kivity <avi@redhat.com>
* KVM: SVM: Implement GIF, clgi and stgiAlexander Graf2009-03-242-5/+45
| | | | | | | | | | | | | | | | | | | | | This patch implements the GIF flag and the clgi and stgi instructions that set this flag. Only if the flag is set (default), interrupts can be received by the CPU. To keep the information about that somewhere, this patch adds a new hidden flags vector. that is used to store information that does not go into the vmcb, but is SVM specific. I tried to write some code to make -no-kvm-irqchip work too, but the first level guest won't even boot with that atm, so I ditched it. v2 moves the hflags to x86 generic code v3 makes use of the new permission helper v6 only enables interrupt_window if GIF=1 Acked-by: Joerg Roedel <joro@8bytes.org> Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Avi Kivity <avi@redhat.com>
* KVM: SVM: Add helper functions for nested SVMAlexander Graf2009-03-241-0/+85
| | | | | | | | | | | | | | | | | | | These are helpers for the nested SVM implementation. - nsvm_printk implements a debug printk variant - nested_svm_do calls a handler that can accesses gpa-based memory v3 makes use of the new permission checker v6 changes: - streamline nsvm_debug() - remove printk(KERN_ERR) - SVME check before CPL check - give GP error code - use new EFER constant Acked-by: Joerg Roedel <joro@8bytes.org> Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Avi Kivity <avi@redhat.com>
* KVM: SVM: Move EFER and MSR constants to generic x86 codeAlexander Graf2009-03-245-8/+12
| | | | | | | | | | | | | | | MSR_EFER_SVME_MASK, MSR_VM_CR and MSR_VM_HSAVE_PA are set in KVM specific headers. Linux does have nice header files to collect EFER bits and MSR IDs, so IMHO we should put them there. While at it, I also changed the naming scheme to match that of the other defines. (introduced in v6) Acked-by: Joerg Roedel <joro@8bytes.org> Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Avi Kivity <avi@redhat.com>
* KVM: SVM: Clean up VINTR settingAlexander Graf2009-03-241-5/+15
| | | | | | | | | | | | The current VINTR intercept setters don't look clean to me. To make the code easier to read and enable the possibilty to trap on a VINTR set, this uses a helper function to set the VINTR intercept. v2 uses two distinct functions for setting and clearing the bit Acked-by: Joerg Roedel <joro@8bytes.org> Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Avi Kivity <avi@redhat.com>
* Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/sparc-2.6Linus Torvalds2009-03-235-25/+11
|\ | | | | | | | | | | | | * git://git.kernel.org/pub/scm/linux/kernel/git/davem/sparc-2.6: sparc64: Fix crash with /proc/iomem sparc64: Reschedule KGDB capture to a software interrupt. sbus: Auto-load openprom module when device opened.
| * Merge branch 'master' of /home/davem/src/GIT/linux-2.6/David S. Miller2009-03-18336-4117/+6357
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| * | sparc64: Fix crash with /proc/iomemMikulas Patocka2009-03-181-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When you compile kernel on Sparc64 with heap memory checking and type "cat /proc/iomem", you get a crash, because pointers in struct resource are uninitialized. Most code fills struct resource with zeros, so I assume that it is responsibility of the caller of request_resource to initialized it, not the responsibility of request_resource functuion. After 2.6.29 is out, there could be a check for uninitialized fields added to request_resource to avoid crashes like this. Signed-off-by: Mikulas Patocka <mpatocka@redhat.com> Signed-off-by: David S. Miller <davem@davemloft.net>
| * | sparc64: Reschedule KGDB capture to a software interrupt.David S. Miller2009-03-184-24/+10
| | | | | | | | | | | | | | | | | | | | | | | | Otherwise it might interrupt switch_to() midstream and use half-cooked register window state. Reported-by: Chris Torek <chris.torek@windriver.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* | | Merge branch 'merge' of ↵Linus Torvalds2009-03-231-0/+9
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/galak/powerpc * 'merge' of git://git.kernel.org/pub/scm/linux/kernel/git/galak/powerpc: powerpc/mm: Fix Respect _PAGE_COHERENT on classic ppc32 SW TLB load machines
| * | | powerpc/mm: Fix Respect _PAGE_COHERENT on classic ppc32 SW TLB load machinesKumar Gala2009-03-231-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Grant picked up the wrong version of "Respect _PAGE_COHERENT on classic ppc32 SW" (commit a4bd6a93c3f14691c8a29e53eb04dc734b27f0db) It was missing the code to actually deal with the fixup of _PAGE_COHERENT based on the CPU feature. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | | | Merge branch 'fix-includes' of ↵Linus Torvalds2009-03-2224-1907/+1209
|\ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/gerg/m68knommu * 'fix-includes' of git://git.kernel.org/pub/scm/linux/kernel/git/gerg/m68knommu: m68k: merge the non-MMU and MMU versions of siginfo.h m68k: use the MMU version of unistd.h for all m68k platforms m68k: merge the non-MMU and MMU versions of signal.h m68k: merge the non-MMU and MMU versions of ptrace.h m68k: use MMU version of setup.h for both MMU and non-MMU m68k: merge the non-MMU and MMU versions of sigcontext.h m68k: merge the non-MMU and MMU versions of swab.h m68k: merge the non-MMU and MMU versions of param.h
| * | | | m68k: merge the non-MMU and MMU versions of siginfo.hGreg Ungerer2009-03-173-101/+95
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | It is trivial to merge the non-MMU and MMU versions of siginfo.h. Without a single file "make headers_install" is broken for m68k (since each of the sub-varients of siginfo.h are not installed). Signed-off-by: Greg Ungerer <gerg@uclinux.org>
| * | | | m68k: use the MMU version of unistd.h for all m68k platformsGreg Ungerer2009-03-173-749/+372
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The MMU version of unistd.h can be use on non-MMU platrorms as well. Without a single file "make headers_install" is broken for m68k (since each of the sub-varients of unistd.h are not installed). Signed-off-by: Greg Ungerer <gerg@uclinux.org>
| * | | | m68k: merge the non-MMU and MMU versions of signal.hGreg Ungerer2009-03-173-369/+212
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | It is trivial to merge the non-MMU and MMU versions of signal.h. Without a single file "make headers_install" is broken for m68k (since each of the sub-varients of signal.h are not installed). Signed-off-by: Greg Ungerer <gerg@uclinux.org>
| * | | | m68k: merge the non-MMU and MMU versions of ptrace.hGreg Ungerer2009-03-173-170/+85
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | It is trivial to merge the non-MMU and MMU versions of ptrace.h. Without a single file "make headers_install" is broken for m68k (since each of the sub-varients of ptrace.h are not installed). Signed-off-by: Greg Ungerer <gerg@uclinux.org>
| * | | | m68k: use MMU version of setup.h for both MMU and non-MMUGreg Ungerer2009-03-173-389/+374
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The MMU version of setup.h can be used for all m68k platforms. Without a single file "make headers_install" is broken for m68k (since each of the sub-varients of setup.h are not installed). Signed-off-by: Greg Ungerer <gerg@uclinux.org>
| * | | | m68k: merge the non-MMU and MMU versions of sigcontext.hGreg Ungerer2009-03-163-39/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | It is trivial to merge the non-MMU and MMU versions of sigcontext.h. Without a single file "make headers_install" is broken for m68k (since each of the sub-varients of sigconext.h are not installed). Signed-off-by: Greg Ungerer <gerg@uclinux.org>
| * | | | m68k: merge the non-MMU and MMU versions of swab.hGreg Ungerer2009-03-163-44/+26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | It is trivial to merge the non-MMU and MMU versions of swab.h. Without a single file "make headers_install" is broken for m68k (since each of the sub-varients of swab.h are not installed). Signed-off-by: Greg Ungerer <gerg@uclinux.org>
| * | | | m68k: merge the non-MMU and MMU versions of param.hGreg Ungerer2009-03-163-46/+23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | It is trivial to merge the non-MMU and MMU versions of param.h. Without a single file "make headers_install" is broken for m68k (since each of the sub-varients of param.h are not installed). Signed-off-by: Greg Ungerer <gerg@uclinux.org>
* | | | | Merge branch 'for-linus' of git://git390.marist.edu/pub/scm/linux-2.6Linus Torvalds2009-03-198-40/+48
|\ \ \ \ \ | |_|_|_|/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'for-linus' of git://git390.marist.edu/pub/scm/linux-2.6: [S390] make page table upgrade work again [S390] make page table walking more robust [S390] Dont check for pfn_valid() in uaccess_pt.c [S390] ftrace/mcount: fix kernel stack backchain [S390] topology: define SD_MC_INIT to fix performance regression [S390] __div64_31 broken for CONFIG_MARCH_G5
| * | | | [S390] make page table upgrade work againMartin Schwidefsky2009-03-182-14/+35
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | After TASK_SIZE now gives the current size of the address space the upgrade of a 64 bit process from 3 to 4 levels of page table needs to use the arch_mmap_check hook to catch large mmap lengths. The get_unmapped_area* functions need to check for -ENOMEM from the arch_get_unmapped_area*, upgrade the page table and retry. Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
| * | | | [S390] make page table walking more robustMartin Schwidefsky2009-03-183-5/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Make page table walking on s390 more robust. The current code requires that the pgd/pud/pmd/pte loop is only done for address ranges that are below the end address of the last vma of the address space. But this is not always true, e.g. the generic page table walker does not guarantee this. Change TASK_SIZE/TASK_SIZE_OF to reflect the current size of the address space. This makes the generic page table walker happy but it breaks the upgrade of a 3 level page table to a 4 level page table. To make the upgrade work again another fix is required. Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
| * | | | [S390] Dont check for pfn_valid() in uaccess_pt.cGerald Schaefer2009-03-181-18/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | pfn_valid() actually checks for a valid struct page and not for a valid pfn. Using xip mappings w/o struct pages, this will result in -EFAULT returned by the (page table walk) user copy functions, even though there is valid memory. Those user copy functions don't need a struct page, so this patch just removes the pfn_valid() check. Signed-off-by: Gerald Schaefer <gerald.schaefer@de.ibm.com> Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
| * | | | [S390] ftrace/mcount: fix kernel stack backchainHeiko Carstens2009-03-181-2/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | With packed stack the backchain is at a different location. Just use __SF_BACKCHAIN as an offset to store the backchain. Signed-off-by: Heiko Carstens <heiko.carstens@de.ibm.com> Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
| * | | | [S390] topology: define SD_MC_INIT to fix performance regressionHeiko Carstens2009-03-181-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The default values for SD_MC_INIT cause an additional cpu usage of up to 40% on some network benchmarks compared to the plain SD_CPU_INIT values. So just define SD_MC_INIT to SD_CPU_INIT. More tuning needs to be done. Signed-off-by: Heiko Carstens <heiko.carstens@de.ibm.com> Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
| * | | | [S390] __div64_31 broken for CONFIG_MARCH_G5Martin Schwidefsky2009-03-181-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The implementation of __div64_31 for G5 machines is broken. The comments in __div64_31 are correct, only the code does not do what the comments say. The part "If the remainder has overflown subtract base and increase the quotient" is only partially realized, the base is subtracted correctly but the quotient is only increased if the dividend had the last bit set. Using the correct instruction fixes the problem. Cc: stable@kernel.org Reported-by: Frans Pop <elendil@planet.nl> Tested-by: Frans Pop <elendil@planet.nl> Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
* | | | | Merge branch 'merge' of ↵Linus Torvalds2009-03-184-64/+203
|\ \ \ \ \ | |/ / / / |/| | / / | | |/ / | |/| | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc * 'merge' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc: powerpc/ps3: ps3_defconfig updates powerpc/mm: Respect _PAGE_COHERENT on classic ppc32 SW powerpc/5200: Enable CPU_FTR_NEED_COHERENT for MPC52xx ps3/block: Replace mtd/ps3vram by block/ps3vram
| * | | powerpc/ps3: ps3_defconfig updatesGeoff Levand2009-03-181-60/+190
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Update ps3_defconfig. Sets these options: CONFIG_PS3_VRAM=m CONFIG_BLK_DEV_DM=m CONFIG_USB_HIDDEV=y CONFIG_EXT4_FS=y Signed-off-by: Geoff Levand <geoffrey.levand@am.sony.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
| * | | Merge commit 'gcl/merge' into mergeBenjamin Herrenschmidt2009-03-1854-1001/+2042
| |\ \ \
| | * | | powerpc/mm: Respect _PAGE_COHERENT on classic ppc32 SWKumar Gala2009-03-171-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since we now set _PAGE_COHERENT in the Linux PTE we shouldn't be clearing it out before we setup the SW TLB. Today all the SW TLB machines (603/e300) that we support are non-SMP, however there are some errata on some devices that cause us to set _PAGE_COHERENT via CPU_FTR_NEED_COHERENT. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
| | * | | powerpc/5200: Enable CPU_FTR_NEED_COHERENT for MPC52xxPiotr Ziecik2009-03-171-1/+3
| | |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | BestComm, a DMA engine in MPC52xx SoC, requires snooping when CPU caches are enabled to work properly. Adding CPU_FTR_NEED_COHERENT fixes NFS problems on MPC52xx machines introduced by 'powerpc/mm: Fix handling of _PAGE_COHERENT in BAT setup code' (sha1: 4c456a67f501b8b15542c7c21c28812bf88f484b). Signed-off-by: Piotr Ziecik <kosmo@semihalf.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
| * | | ps3/block: Replace mtd/ps3vram by block/ps3vramGeert Uytterhoeven2009-03-131-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Convert the PS3 Video RAM Storage Driver from an MTD driver to a plain block device driver. The ps3vram driver exposes unused video RAM on the PS3 as a block device suitable for storage or swap. Fast data transfer is achieved using a local cache in system RAM and DMA transfers via the GPU. The new driver is ca. 50% faster for reading, and ca. 10% for writing. Signed-off-by: Geert Uytterhoeven <Geert.Uytterhoeven@sonycom.com> Acked-by: Geoff Levand <geoffrey.levand@am.sony.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
* | | | prevent boosting kprobes on exception addressMasami Hiramatsu2009-03-171-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Don't boost at the addresses which are listed on exception tables, because major page fault will occur on those addresses. In that case, kprobes can not ensure that when instruction buffer can be freed since some processes will sleep on the buffer. kprobes-ia64 already has same check. Signed-off-by: Masami Hiramatsu <mhiramat@redhat.com> Cc: Ananth N Mavinakayanahalli <ananth@in.ibm.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* | | | Fast TSC calibration: calculate proper frequency error boundsLinus Torvalds2009-03-171-45/+56
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In order for ntpd to correctly synchronize the clocks, the frequency of the system clock must not be off by more than 500 ppm (or, put another way, 1:2000), or ntpd will end up giving up on trying to synchronize properly, and ends up reseting the clock in jumps instead. The fast TSC PIT calibration sometimes failed this test - it was assuming that the PIT reads always took about one microsecond each (2us for the two reads to get a 16-bit timer), and that calibrating TSC to the PIT over 15ms should thus be sufficient to get much closer than 500ppm (max 2us error on both sides giving 4us over 15ms: a 270 ppm error value). However, that assumption does not always hold: apparently some hardware is either very much slower at reading the PIT registers, or there was other noise causing at least one machine to get 700+ ppm errors. So instead of using a fixed 15ms timing loop, this changes the fast PIT calibration to read the TSC delta over the individual PIT timer reads, and use the result to calculate the error bars on the PIT read timing properly. We then successfully calibrate the TSC only if the maximum error bars fall below 500ppm. In the process, we also relax the timing to allow up to 25ms for the calibration, although it can happen much faster depending on hardware. Reported-and-tested-by: Jesper Krogh <jesper@krogh.cc> Cc: john stultz <johnstul@us.ibm.com> Cc: Thomas Gleixner <tglx@linutronix.de> Acked-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* | | | Fix potential fast PIT TSC calibration startup glitchLinus Torvalds2009-03-171-0/+9
| |/ / |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | During bootup, when we reprogram the PIT (programmable interval timer) to start counting down from 0xffff in order to use it for the fast TSC calibration, we should also make sure to delay a bit afterwards to allow the PIT hardware to actually start counting with the new value. That will happens at the next CLK pulse (1.193182 MHz), so the easiest way to do that is to just wait at least one microsecond after programming the new PIT counter value. We do that by just reading the counter value back once - which will take about 2us on PC hardware. Reported-and-tested-by: john stultz <johnstul@us.ibm.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* | | Merge master.kernel.org:/home/rmk/linux-2.6-armLinus Torvalds2009-03-1529-53/+217
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * master.kernel.org:/home/rmk/linux-2.6-arm: (23 commits) [ARM] Fix virtual to physical translation macro corner cases [ARM] update mach-types [ARM] 5421/1: ftrace: fix crash due to tracing of __naked functions MX1 fix include [ARM] 5419/1: ep93xx: fix build warnings about struct i2c_board_info [ARM] 5418/1: restore lr before leaving mcount ARM: OMAP: board-omap3beagle: set i2c-3 to 100kHz ARM: OMAP: Allow I2C bus driver to be compiled as a module ARM: OMAP: sched_clock() corrected ARM: OMAP: Fix compile error if pm.h is included [ARM] orion5x: pass dram mbus data to xor driver [ARM] S3C64XX: Fix s3c64xx_setrate_clksrc [ARM] S3C64XX: sparse warnings in arch/arm/plat-s3c64xx/irq.c [ARM] S3C64XX: sparse warnings in arch/arm/plat-s3c64xx/s3c6400-clock.c [ARM] S3C64XX: Fix USB host clock mux list [ARM] S3C64XX: Fix name of USB host clock. [ARM] S3C64XX: Rename IRQ_UHOST to IRQ_USBH [ARM] S3C64XX: Do gpiolib configuration earlier [ARM] S3C64XX: Staticise s3c64xx_init_irq_eint() [ARM] SMDK6410: Declare iodesc table static ...
| * | | [ARM] Fix virtual to physical translation macro corner casesRussell King2009-03-123-10/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The current use of these macros works well when the conversion is entirely linear. In this case, we can be assured that the following holds true: __va(p + s) - s = __va(p) However, this is not always the case, especially when there is a non-linear conversion (eg, when there is a 3.5GB hole in memory.) In this case, if 's' is the size of the region (eg, PAGE_SIZE) and 'p' is the final page, the above is most definitely not true. So, we must ensure that __va() and __pa() are only used with valid kernel direct mapped RAM addresses. This patch tweaks the code to achieve this. Tested-by: Charles Moschel <fred99@carolina.rr.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | | [ARM] update mach-typesRussell King2009-03-121-3/+133
| | | | | | | | | | | | | | | | Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | | [ARM] 5421/1: ftrace: fix crash due to tracing of __naked functionsUwe Kleine-König2009-03-128-9/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is a fix for the following crash observed in 2.6.29-rc3: http://lkml.org/lkml/2009/1/29/150 On ARM it doesn't make sense to trace a naked function because then mcount is called without stack and frame pointer being set up and there is no chance to restore the lr register to the value before mcount was called. Reported-by: Matthias Kaehlcke <matthias@kaehlcke.net> Tested-by: Matthias Kaehlcke <matthias@kaehlcke.net> Cc: Abhishek Sagar <sagar.abhishek@gmail.com> Cc: Steven Rostedt <rostedt@home.goodmis.org> Cc: Ingo Molnar <mingo@elte.hu> Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * | | Merge branch 'for-rmk' of git://git.pengutronix.de/git/imx/linux-2.6Russell King2009-03-122-0/+3
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| | * | | MX1 fix includeDarius Augulis2009-03-062-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Includes missed irqs.h in devices.c and mx1ads.c. Signed-off-by: Darius Augulis <augulis.darius@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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