summaryrefslogtreecommitdiffstats
path: root/arch
Commit message (Collapse)AuthorAgeFilesLines
...
| | | * [ARM] 3985/1: ixp4xx clocksource cleanupKevin Hilman2006-12-071-2/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Rather than using a device_initcall() for the clocksource initialization, just call the init from the sys_timer init function. Signed-off-by: Kevin Hilman <khilman@mvista.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | * [ARM] 3994/1: ixp23xx: fix handling of pci master abortsLennert Buytenhek2006-12-071-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The PCI master abort handling issue that affected ixp2000 also affects ixp23xx. Signed-off-by: Lennert Buytenhek <buytenh@wantstofly.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | * [ARM] 3982/2: Explicitly select 32-bit ARM ISA (-marm)George G. Davis2006-12-071-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Do not assume that the ARM GCC toolchain defaults to building for the 32-bit ARM ISA (-marm) case. Instead, explicitly select -marm in CFLAGS since the toolchain default can be for the 16-bit Thumb ISA (-mthumb) in some odd/rare cases. Signed-off-by: George G. Davis <gdavis@mvista.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | * [ARM] 3881/4: xscale: clean up cp0/cp1 handlingLennert Buytenhek2006-12-039-92/+194
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | XScale cores either have a DSP coprocessor (which contains a single 40 bit accumulator register), or an iWMMXt coprocessor (which contains eight 64 bit registers.) Because of the small amount of state in the DSP coprocessor, access to the DSP coprocessor (CP0) is always enabled, and DSP context switching is done unconditionally on every task switch. Access to the iWMMXt coprocessor (CP0/CP1) is enabled only when an iWMMXt instruction is first issued, and iWMMXt context switching is done lazily. CONFIG_IWMMXT is supposed to mean 'the cpu we will be running on will have iWMMXt support', but boards are supposed to select this config symbol by hand, and at least one pxa27x board doesn't get this right, so on that board, proc-xscale.S will incorrectly assume that we have a DSP coprocessor, enable CP0 on boot, and we will then only save the first iWMMXt register (wR0) on context switches, which is Bad. This patch redefines CONFIG_IWMMXT as 'the cpu we will be running on might have iWMMXt support, and we will enable iWMMXt context switching if it does.' This means that with this patch, running a CONFIG_IWMMXT=n kernel on an iWMMXt-capable CPU will no longer potentially corrupt iWMMXt state over context switches, and running a CONFIG_IWMMXT=y kernel on a non-iWMMXt capable CPU will still do DSP context save/restore. These changes should make iWMMXt work on PXA3xx, and as a side effect, enable proper acc0 save/restore on non-iWMMXt capable xsc3 cores such as IOP13xx and IXP23xx (which will not have CONFIG_CPU_XSCALE defined), as well as setting and using HWCAP_IWMMXT properly. Signed-off-by: Lennert Buytenhek <buytenh@wantstofly.org> Acked-by: Dan Williams <dan.j.williams@intel.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | * [ARM] 3967/1: xsc3: make branch predication configurable on xsc3Dan Williams2006-12-012-8/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove BTB_ENABLE from proc-xsc3.S On some early revisions of xsc3 enabling the branch target buffer can cause crashes, see erratum #42. Cc: Lennert Buytenhek <buytenh@wantstofly.org> Signed-off-by: Dan Williams <dan.j.williams@intel.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | * [ARM] 3971/1: xsc3: get rid of L_PTE_COHERENTLennert Buytenhek2006-12-012-2/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Merge L_PTE_COHERENT with L_PTE_SHARED and free up a L_PTE_* bit. Signed-off-by: Lennert Buytenhek <buytenh@wantstofly.org> Signed-off-by: Dan Williams <dan.j.williams@intel.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | * [ARM] 3958/1: add platform device (pxa2xx-udc)to ixp4xxMilan Svoboda2006-12-011-0/+41
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Create include/asm-arm/arch-ixp4xx/udc.h and add platfrom device ixp4xx_udc_device into arch/arm/mach-ixp4xx/common.c. This allows us to use pxa2xx-udc on the ixp4xx platfrom. Both pxa2xx and ixp4xx use the same device controller. Signed-off-by:Milan Svoboda <msvoboda@ra.rockwell.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | * [ARM] 3965/1: ixp2000: fix handling of pci master abortsLennert Buytenhek2006-12-011-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The master abort check in ixp2000_pci_read_config() recently started failing due to the compiler optimising out the read access following the clearing of pci_master_aborts. Mark pci_master_aborts volatile to force the compiler to reload it on every use. Signed-off-by: Lennert Buytenhek <buytenh@wantstofly.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | * [ARM] Fix Versatile PB initialisation to use .init_machineRussell King2006-11-301-11/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There's no point having the Versatile PB initialisation using an arch_initcall() and then checking whether it's running on a Versatile PB board - this is what the .init_machine function pointer in the machine description is for. Use it. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | * [ARM] 3911/2: Simplify alloc_thread_info on ARMPaul Gortmaker2006-11-301-61/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove ARM local cache of 4 struct thread_info. Can cause oops under certain circumstances. Russell indicated the original optimization was required on older kernels to avoid thread starvation on memory fragmentation, but may no longer be required. I've updated the patch to 19rc4 and ensured no <config.h> dain-bramage slipped in this time (sorry about that). Original description follows: I was given some test results which pointed to an Oops in alloc_thread_info (happened 2x), and after looking at the code, I see that ARM has its own local cache of 4 struct thread_info. There wasn't any clear (to me) synchronization between the alloc_thread_info and the free_thread_info. I looked over the other arch, and they all simply allocate them on an as needed basis, so I simplified the ARM to do the same, based on the other arch (e.g. PPC) and the folks doing the testing have indicated that this fixed the oops. Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | * [ARM] Fix nommu buildRussell King2006-11-302-1/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix warnings and errors in arch/arm/mm for nommu build. Remove commented out function prototype in pgtable-nommu.h Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | * [ARM] 3940/1: don't reset PXA2xx clock counterNicolas Pitre2006-11-301-3/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Don't reset OSCR to zero as this prevents us from having a contiguous time source. The value returned by sched_clock() is reset to zero in the middle of the boot process otherwise, making CONFIG_PRINTK_TIME rather messed up. Signed-off-by: Nicolas Pitre <nico@cam.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | * [ARM] 3939/1: don't reset SA11x0 clock counterNicolas Pitre2006-11-301-3/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Don't reset OSCR to zero as this prevents us from having a contiguous time source. The value returned by sched_clock() is reset to zero in the middle of the boot process otherwise, making CONFIG_PRINTK_TIME rather messed up. Signed-off-by: Nicolas Pitre <nico@cam.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | * [ARM] Remove compatibility layer for ARM irqsRussell King2006-11-3057-277/+277
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | set_irq_chipdata -> set_irq_chip_data get_irq_chipdata -> get_irq_chip_data do_level_IRQ -> handle_level_irq do_edge_IRQ -> handle_edge_irq do_simple_IRQ -> handle_simple_irq irqdesc -> irq_desc irqchip -> irq_chip Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | * [ARM] Remove DEBUG_WAITQRussell King2006-11-3041-44/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | DEBUG_WAITQ appears to have been removed by others, but no one removed the configuration option from ARM. Remote it from both Kconfig.debug and all default configurations. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | * [ARM] Convert apm.c to use mutexes instead of semaphoresRussell King2006-11-301-14/+14
| | | | | | | | | | | | | | | | | | | | | | | | More semaphore-as-mutex to mutex conversions. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | * [ARM] Include asm/elf.h instead of asm/procinfo.hRussell King2006-11-3025-23/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | These files want to provide/access ELF hwcap information, so should be including asm/elf.h rather than asm/procinfo.h Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | * [ARM] Fix "apm -s" command hangRussell King2006-11-301-1/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix an apparant hang with the "apm -s" command. We omitted to wake up this process once resume had completed. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | | * [ARM] Improve reliability of APM-emulation suspendRussell King2006-11-301-55/+123
| | |/ | |/| | | | | | | | | | | | | | | | | | | | | | The APM emulation can sometimes cause suspend to fail to work due to apparantly waiting for some process to acknowledge an event when it actually has already done so. We re-jig the event handling to work around this behaviour. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * [ARM] 3972/1: AT91: Update board.hAndrew Victor2006-12-046-6/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Replace the 'is_b' variable with 'slot_b' in at91_mmc_data. Also add the new 'chipselect' variable for CF/PCMCIA and 'bus_width_16' variable for NAND. This (and previous patches) will unfortunately break the current MMC, USB Gadget and PCMCIA drivers. Updates and fixes for those drivers will be submitted to the various subsystem maintainers. Signed-off-by: Andrew Victor <andrew@sanpeople.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * [ARM] 3966/1: AT91: RM9200 device data updateAndrew Victor2006-12-011-48/+110
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch contains various updates the at91rm9200_devices.c file: * Consistent naming of resources and platform_devices. * PCMCIA/Compact Flash: Configuration of the memory controller moved out of the driver and into this file. * MMC: Enable the VCC pin (if one is configured) * MMC: Enable the internal pullups on the I/O pins. * NAND: Configuration of the memory controller moved out of the driver and into this file. * Added TWI/I2C resources. * The names of some of the CONFIG_ variables were changed. Signed-off-by: Andrew Victor <andrew@sanpeople.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * [ARM] 3963/1: AT91: Update configuration filesAndrew Victor2006-12-014-3/+33
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | A number of configuration file changes. These are mainly to replace references to ARCH_AT91RM9200 and ARCH_AT91SAM9261 with the common/generic ARCH_AT91. That way we don't need to mention every specific AT91 processor explicitly. Also adds the configuration option for AT91SAM9260-EK and AT91SAM9261-EK boards. Signed-off-by: Andrew Victor <andrew@sanpeople.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * [ARM] 3961/2: AT91: Support for Atmel AT91SAM9261-EK boardAndrew Victor2006-12-013-0/+1366
| | | | | | | | | | | | | | | | | | | | | This patch adds support for the Atmel AT91SAM9261-EK board. Signed-off-by: Andrew Victor <andrew@sanpeople.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * [ARM] 3962/1: AT91: Support for Atmel AT91SAM9260-EK boardAndrew Victor2006-12-013-0/+1152
| | | | | | | | | | | | | | | | | | | | | This patch adds support for the Atmel AT91SAM9260-EK board. Signed-off-by: Andrew Victor <andrew@sanpeople.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * [ARM] 3960/1: AT91: Final SAM9 intergration patches.Andrew Victor2006-12-013-24/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch includes a number of small changes for integrating the AT91SAM9261 and AT91SAM0260 support. * Can only select support for one AT91 processor at a time. * Remove most of the remaining static memory mapping for the AT91RM9200. * Reserve 1Mb of memory below the IO for mapping the internal SRAM and any custom board-specific devices (ie, FPGA). * The SAM9260 has more serial ports, so increase the maximum to 7. * Define the standard chipselect addresses, and define other addresses relative to those. * CLOCK_TICK_RATE is different on the SAM926x's. Signed-off-by: Andrew Victor <andrew@sanpeople.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * [ARM] 3959/1: AT91: Support for SAM9 USB and HCK clocksAndrew Victor2006-12-013-7/+33
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The bits used to select the USB clocks are different on the SAM9's. Add support for the HCK clocks on the AT91SAM9261. Patch from Patrice Vilchez & Nicolas Ferre Signed-off-by: Andrew Victor <andrew@sanpeople.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * [ARM] 3957/1: AT91: Physically mapped flash on DK and EK boardsAndrew Victor2006-12-014-8/+68
| | | | | | | | | | | | | | | | | | | | | | | | | | | This patch converts the old CONFIG_MTD_PHYSMAP_ options to the new physmap API by creating a physmap platform device for the NOR flash found on the Atmel AT91RM9200-DK and AT91RM9200-EK boards. Signed-off-by: Andrew Victor <andrew@sanpeople.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * [ARM] 3956/1: AT91: Carmeva board updateAndrew Victor2006-12-012-4/+28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch updates the Carmeva board support: * Specify the MMC Write-protect and Detection pins. * Add configuration of SPI devices. Patch from Peer Georgi. Signed-off-by: Andrew Victor <andrew@sanpeople.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * [ARM] 3955/1: AT91: Clear timer interrupt when resumingAndrew Victor2006-12-011-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Attached is a patch for at91rm9200_time.c which removes the 'BUG: soft lockup detected on CPU#0!' message when exiting suspended states. Patch from Savin Zlobec Signed-off-by: Andrew Victor <andrew@sanpeople.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * [ARM] 3953/1: AT91: SAM9 platform devicesAndrew Victor2006-12-013-2/+1609
| | | | | | | | | | | | | | | | | | | | | | | | | | | This patch includes the pin initialization, resource definition and registration of the platform_devices for the SAM9260 and SAM9261 processors. Signed-off-by: Andrew Victor <andrew@sanpeople.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * [ARM] 3949/2: AT91: SAM9 timer driverAndrew Victor2006-12-012-2/+116
| | | | | | | | | | | | | | | | | | | | | | | | Add support for the timer on the Atmel AT91SAM9261 and AT91SAM9260 processors. Signed-off-by: Andrew Victor <andrew@sanpeople.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * [ARM] 3954/1: AT91: Update drivers for new headersAndrew Victor2006-11-305-1/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch updates the drivers (and other files) which include the hardware headers. This fixes the breakage introduced in patches 3950/1 and 3951/1 (those patches were getting big). The AVR32 architecture uses the same serial driver and had its own copy of at91rm9200_pdc.h. Renamed it to at91_pdc.h Signed-off-by: Andrew Victor <andrew@sanpeople.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * [ARM] 3948/1: AT91: Initial support for AT91SAM9261 and AT91SAM9260Andrew Victor2006-11-304-3/+591
| | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds the initial support for the newer Atmel AT91SAM9261 and AT91SAM9260 processors. The code is based on, and makes use of, the existing AT91RM9200 support. Signed-off-by: Andrew Victor <andrew@sanpeople.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * [ARM] 3946/1: AT91: at91_arch_reset and at91_extern_irqAndrew Victor2006-11-304-12/+31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The external interrupt sources are different on the various AT91 processors. This patch introduces the global 'at91_extern_irq' variable that contains a bitset of the available external interrupt sources. The processor reset mechanism also differs on the various AT91 processors. This patch also adds a global 'at91_arch_reset' callback (from system.h) into the processor-specific code to perform the reset. Signed-off-by: Andrew Victor <andrew@sanpeople.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| | * [ARM] 3945/1: AT91: Rename devices.cAndrew Victor2006-11-302-3/+3
| |/ | | | | | | | | | | | | | | | | This patch renames the arch/arm/mach-at91rm9200/devices.c file to at91rm9200_devices.c. The file contains AT91RM9200-specific code, so we will need separate files for the SAM9 processors. Signed-off-by: Andrew Victor <andrew@sanpeople.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | Merge branch 'release' of ↵Linus Torvalds2006-12-0724-48/+1008
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | master.kernel.org:/pub/scm/linux/kernel/git/aegl/linux-2.6 * 'release' of master.kernel.org:/pub/scm/linux/kernel/git/aegl/linux-2.6: [IA64] replace kmalloc+memset with kzalloc [IA64] resolve name clash by renaming is_available_memory() [IA64] Need export for csum_ipv6_magic [IA64] Fix DISCONTIGMEM without VIRTUAL_MEM_MAP [PATCH] Add support for type argument in PAL_GET_PSTATE [IA64] tidy up return value of ip_fast_csum [IA64] implement csum_ipv6_magic for ia64. [IA64] More Itanium PAL spec updates [IA64] Update processor_info features [IA64] Add se bit to Processor State Parameter structure [IA64] Add dp bit to cache and bus check structs [IA64] SN: Correctly update smp_affinty mask [IA64] sparse cleanups [IA64] IA64 Kexec/kdump
| * | [IA64] replace kmalloc+memset with kzallocYan Burman2006-12-074-13/+6
| | | | | | | | | | | | | | | | | | | | | | | | Replace kmalloc+memset with kzalloc Signed-off-by: Yan Burman <burman.yan@gmail.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Tony Luck <tony.luck@intel.com>
| * | [IA64] resolve name clash by renaming is_available_memory()Christoph Lameter2006-12-071-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | There is a name clash with ia64 arch code in Andrew's tree. Rename is_avialable_memory() to is_memory_available() to avoid the clash. Signed-off-by: Christoph Lameter <clameter@sgi.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Tony Luck <tony.luck@intel.com>
| * | [IA64] Need export for csum_ipv6_magicTony Luck2006-12-071-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | Now we have our own highly optimized assembly code version of this routine (Thanks Ken!) we should export it so that it can be used. Signed-off-by: Tony Luck <tony.luck@intel.com>
| * | [PATCH] Add support for type argument in PAL_GET_PSTATEVenkatesh Pallipadi2006-12-071-7/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | PAL_GET_PSTATE accepts a type argument to return different kinds of frequency information. Refer: Intel Itanium®Architecture Software Developer's Manual - Volume 2: System Architecture, Revision 2.2 (http://developer.intel.com/design/itanium/manuals/245318.htm) Add the support for type argument and use Instantaneous frequency in the acpi driver. Also fix a bug, where in return value of PAL_GET_PSTATE was getting compared with 'control' bits instead of 'status' bits. Signed-off-by: Venkatesh Pallipadi <venkatesh.pallipadi@intel.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
| * | [IA64] tidy up return value of ip_fast_csumChen, Kenneth W2006-12-071-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | While working on implementing csum_ipv6_magic, I noticed that current version of ip_fast_csum will potentially return bits above "unsigned short" as 1. While no harm is done right now because all call sites will chop off the upper bits when it uses the return value. However, this is still dangerous and buggy. Here is a patch to enforce that the function really returns unsigned short in the native register format. The fix is free as there are plenty open slot to add one more asm instruction. Signed-off-by: Ken Chen <kenneth.w.chen@intel.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
| * | [IA64] implement csum_ipv6_magic for ia64.Chen, Kenneth W2006-12-071-2/+53
| | | | | | | | | | | | | | | | | | | | | | | | The asm version is 4.4 times faster than the generic C version and 10X smaller in code size. Signed-off-by: Ken Chen <kenneth.w.chen@intel.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
| * | [IA64] More Itanium PAL spec updatesRuss Anderson2006-12-071-1/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Additional updates to conform with Rev 2.2 of Volume 2 of "Intel Itanium Architecture Software Developer's Manual" (January 2006). Add pal_bus_features_s bits 52 & 53 (page 2:347) Add pal_vm_info_2_s field max_purges (page 2:2:451) Add PAL_GET_HW_POLICY call (page 2:381) Add PAL_SET_HW_POLICY call (page 2:439) Sample output before: --------------------------------------------------------------------- cobra:~ # cat /proc/pal/cpu0/vm_info Physical Address Space : 50 bits Virtual Address Space : 61 bits Protection Key Registers(PKR) : 16 Implemented bits in PKR.key : 24 Hash Tag ID : 0x2 Size of RR.rid : 24 Supported memory attributes : WB, UC, UCE, WC, NaTPage --------------------------------------------------------------------- Sample output after: --------------------------------------------------------------------- cobra:~ # cat /proc/pal/cpu0/vm_info Physical Address Space : 50 bits Virtual Address Space : 61 bits Protection Key Registers(PKR) : 16 Implemented bits in PKR.key : 24 Hash Tag ID : 0x2 Max Purges : 1 Size of RR.rid : 24 Supported memory attributes : WB, UC, UCE, WC, NaTPage --------------------------------------------------------------------- Signed-off-by: Russ Anderson (rja@sgi.com) Signed-off-by: Tony Luck <tony.luck@intel.com>
| * | [IA64] Update processor_info featuresRuss Anderson2006-12-071-2/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add the printing of additional processor features to proc_features. Based on Rev 2.2 of Volume 2 of "Intel Itanium Architecture Software Developer's Manual" (January 2006) fields (pages 2:430-2:432). This patch gets the features back in sync with the spec. Sample output before: -------------------------------------------------------------- cobra:~ # cat /proc/pal/cpu0/processor_info XIP,XPSR,XFS implemented : On NoCtrl XR1-XR3 implemented : On NoCtrl Disable dynamic predicate prediction : NotImpl Disable processor physical number : NotImpl Disable dynamic data cache prefetch : NotImpl Disable dynamic inst cache prefetch : NotImpl Disable dynamic branch prediction : NotImpl Disable BINIT on processor time-out : On Ctrl Disable dynamic power management (DPM) : NotImpl Disable coherency : NotImpl Disable cache : NotImpl Enable CMCI promotion : Off Ctrl Enable MCA to BINIT promotion : Off Ctrl Enable MCA promotion : NotImpl Enable BERR promotion : NotImpl cobra:~ # -------------------------------------------------------------- Sample output after: -------------------------------------------------------------- cobra:~ # cat /proc/pal/cpu0/processor_info Unimplemented instruction address fault : NotImpl INIT, PMI, and LINT pins : NotImpl Simple unimplimented instr addresses : On NoCtrl Variable P-state performance : NotImpl Virtual machine features implemeted : On NoCtrl XIP,XPSR,XFS implemented : On NoCtrl XR1-XR3 implemented : On NoCtrl Disable dynamic predicate prediction : NotImpl Disable processor physical number : NotImpl Disable dynamic data cache prefetch : NotImpl Disable dynamic inst cache prefetch : NotImpl Disable dynamic branch prediction : NotImpl Disable P-states : Off Ctrl Enable MCA on Data Poisoning : Off Ctrl Enable vmsw instruction : On Ctrl Enable extern environmental notification : NotImpl Disable BINIT on processor time-out : On Ctrl Disable dynamic power management (DPM) : NotImpl Disable coherency : NotImpl Disable cache : NotImpl Enable CMCI promotion : Off Ctrl Enable MCA to BINIT promotion : Off Ctrl Enable MCA promotion : NotImpl Enable BERR promotion : NotImpl cobra:~ # -------------------------------------------------------------- Signed-off-by: Russ Anderson (rja@sgi.com) Signed-off-by: Tony Luck <tony.luck@intel.com>
| * | [IA64] SN: Correctly update smp_affinty maskJohn Keller2006-12-072-7/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | On Altix systems, the /proc/irq/nn/smp_affinity mask is not being setup at device iniitalization, or updated after an interrupt redirection. This patch resolves those issues. Signed-off-by: John Keller <jpk@sgi.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
| * | [IA64] sparse cleanupsMatthew Wilcox2006-12-072-7/+7
| | | | | | | | | | | | | | | | | | | | | 0/NULL confusion and some missing UL on constants. Signed-off-by: Matthew Wilcox <matthew@wil.cx> Signed-off-by: Tony Luck <tony.luck@intel.com>
| * | [IA64] IA64 Kexec/kdumpZou Nan hai2006-12-0712-5/+898
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Changes and updates. 1. Remove fake rendz path and related code according to discuss with Khalid Aziz. 2. fc.i offset fix in relocate_kernel.S. 3. iospic shutdown code eoi and mask race fix from Fujitsu. 4. Warm boot hook in machine_kexec to SN SAL code from Jack Steiner. 5. Send slave to SAL slave loop patch from Jay Lan. 6. Kdump on non-recoverable MCA event patch from Jay Lan 7. Use CTL_UNNUMBERED in kdump_on_init sysctl. Signed-off-by: Zou Nan hai <nanhai.zou@intel.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
* | | Merge branch 'for-linus' of git://one.firstfloor.org/home/andi/git/linux-2.6Linus Torvalds2006-12-07121-2186/+4507
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'for-linus' of git://one.firstfloor.org/home/andi/git/linux-2.6: (156 commits) [PATCH] x86-64: Export smp_call_function_single [PATCH] i386: Clean up smp_tune_scheduling() [PATCH] unwinder: move .eh_frame to RODATA [PATCH] unwinder: fully support linker generated .eh_frame_hdr section [PATCH] x86-64: don't use set_irq_regs() [PATCH] x86-64: check vector in setup_ioapic_dest to verify if need setup_IO_APIC_irq [PATCH] x86-64: Make ix86 default to HIGHMEM4G instead of NOHIGHMEM [PATCH] i386: replace kmalloc+memset with kzalloc [PATCH] x86-64: remove remaining pc98 code [PATCH] x86-64: remove unused variable [PATCH] x86-64: Fix constraints in atomic_add_return() [PATCH] x86-64: fix asm constraints in i386 atomic_add_return [PATCH] x86-64: Correct documentation for bzImage protocol v2.05 [PATCH] x86-64: replace kmalloc+memset with kzalloc in MTRR code [PATCH] x86-64: Fix numaq build error [PATCH] x86-64: include/asm-x86_64/cpufeature.h isn't a userspace header [PATCH] unwinder: Add debugging output to the Dwarf2 unwinder [PATCH] x86-64: Clarify error message in GART code [PATCH] x86-64: Fix interrupt race in idle callback (3rd try) [PATCH] x86-64: Remove unwind stack pointer alignment forcing again ... Fixed conflict in include/linux/uaccess.h manually Signed-off-by: Linus Torvalds <torvalds@osdl.org>
| * | | [PATCH] x86-64: Export smp_call_function_singleAndi Kleen2006-12-071-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | smp_call_function() is exported, makes sense to export this one too. Signed-off-by: Andi Kleen <ak@suse.de>
| * | | [PATCH] i386: Clean up smp_tune_scheduling()Adrian Bunk2006-12-071-24/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - remove the write-only local variable "bandwidth" - don't set "max_cache_size" in the (cachesize < 0) case: that's already handled in kernel/sched.c:measure_migration_cost() Signed-off-by: Adrian Bunk <bunk@stusta.de> Signed-off-by: Andi Kleen <ak@suse.de> Acked-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Andrew Morton <akpm@osdl.org>
OpenPOWER on IntegriCloud