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* [ARM] pxa: Add PXA3 standby code hooked into the IRQ wake schemeRussell King2008-01-262-0/+303
| | | | | | | | | | | | | | | | Wakeup sources on PXA3 are enabled at two levels. First, the MFP configuration has to be set to enable which edges a specific pin will trigger a wakeup. The pin also has to be routed to a functional unit. Lastly, the functional unit must be enabled as a wakeup source in the appropriate AD*ER registers (AD2D0ER for standby resume.) This doesn't fit well with the IRQ wake scheme - we currently do a best effort conversion from IRQ numbers to functional unit wake enable bits. For instance, there's several USB client related enable bits but there's no corresponding IRQs to determine which you'd want. Conversely, there's a single enable bit covering several functional units. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] pxa: Add zylonite MFP wakeup configurationsRussell King2008-01-262-33/+33
| | | | Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] pxa: program MFPs for low power mode when suspendingRussell King2008-01-261-2/+57
| | | | | | | | | | | | Hook the MFP code into the power management code so that the MFPs can be reconfigured when suspending and resuming. However, note the FIXME - low power mode MFP configuration may depend on the system state being entered. Also note that we have to clear any detected edge events prior to entering a low power mode - otherwise we immediately wake up. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] pxa: make MFP configuration processor independenteric miao2008-01-261-15/+82
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There are two reasons for making the MFP configuration to be processor independent, i.e. removing the relationship of configuration bits with actual MFPR register settings: 1. power management sometimes requires the MFP to be configured differently when in run mode or in low power mode 2. for future integration of pxa{25x,27x} GPIO configurations The modifications include: 1. introducing of processor independent MFP configuration bits, as defined in [include/asm-arm/arch-pxa/mfp.h]: bit 0.. 9 - MFP Pin Number (1024 Pins Maximum) bit 10..12 - Alternate Function Selection bit 13..15 - Drive Strength bit 16..18 - Low Power Mode State bit 19..20 - Low Power Mode Edge Detection bit 21..22 - Run Mode Pull State and so on, 2. moving the processor dependent code from mfp.h into mfp-pxa3xx.h 3. cleaning up of the MFPR bit definitions 4. mapping of processor independent MFP configuration into processor specific MFPR register settings is now totally encapsulated within pxa3xx_mfp_config() 5. using of "unsigned long" instead of invented type of "mfp_cfg_t" according to Documentation/CodingStyle Chapter 5, usage of this in platform code will be slowly removed in later patches Signed-off-by: eric miao <eric.miao@marvell.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] pxa: remove un-used pxa3xx_mfp_set_xxx() functionseric miao2008-01-261-111/+0
| | | | | | | | | | pxa3xx_mfp_set_xxx() functions are originally provided for overwriting MFP configurations performed by pxa3xx_mfp_config(), the usage of such a dirtry trick is not recommended, since there is currently no user of these functions, they are safely removed Signed-off-by: eric miao <eric.miao@marvell.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] pxa: omit PXA25x or PXA27x standby/sleep code as appropriateRussell King2008-01-263-7/+10
| | | | | | | There's no point building standby/sleep code for processors which aren't configured. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] pxa: clean up pxa{27x,25x}_init_pm() to empty if CONFIG_PM not definederic miao2008-01-262-4/+8
| | | | | Signed-off-by: eric miao <eric.miao@marvell.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] pxa: move memory controller registers into pxa2xx-regs.hRussell King2008-01-266-0/+6
| | | | | | | PXA3 has a different memory controller from PXA2 platforms. Avoid clashing definitions by moving the PXA2 definitions to pxa2xx-regs.h Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] pxa: increase size of memory mappingRussell King2008-01-261-1/+1
| | | | | | | | | The mapping for physical address 0x48000000 is not sufficient to allow access to the dynamic memory controller configuration registers on PXA3. These registers need to be accessed to reconfigure the SDRAM when waking from a low power mode. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] pxa: move pxa27x_device_ohci out of pxa27x.c for use with pxa3xxeric miao2008-01-262-31/+31
| | | | | Signed-off-by: eric miao <eric.miao@marvell.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] pxa: add clk of CKEN_USBHOST for pxa3xxeric miao2008-01-261-0/+1
| | | | | Signed-off-by: eric miao <eric.miao@marvell.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] pxa: ensure SSP TX FIFO is empty instead of not full for pxa3xxeric miao2008-01-261-0/+10
| | | | | Signed-off-by: eric miao <eric.miao@marvell.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] pxa: mmc: add 3rd host controller support for pxa310Bridge Wu2008-01-265-1/+56
| | | | | | | | | | This patch is to add the third mmc controller support _only_ for pxa310. On zylonite, the third controller support one slot. Signed-off-by: Bridge Wu <bridge.wu@marvell.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] pxa: mmc: add 2nd host controller support for pxa3xxBridge Wu2008-01-266-0/+64
| | | | | | | | | | This patch is to add the second mmc controller support for pxa3xx. It's valid for pxa3[0|1|2]0. On zylonite, the second controller has no slot. Signed-off-by: Bridge Wu <bridge.wu@marvell.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] pxa: mmc: add 1st host controller support for pxa3xxBridge Wu2008-01-265-1/+115
| | | | | | | | | | | This patchis to add the first mmc controller support for pxa3xx. It's valid for pxa3[0|1|2]0. On zylonite, the first controller supports two slots, this patch only support the first one right now. Signed-off-by: Bridge Wu <bridge.wu@marvell.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] pxa: create arch/arm/mach-pxa/device.c for all on-chip deviceseric miao2008-01-263-549/+553
| | | | | | | | Considering that generic.c is getting more and more bloated by device information, moving that part out side will be much cleaner. Signed-off-by: eric miao <eric.miao@marvell.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] 4711/1: pxa: mmc: move DMA specific code to platform layerBridge Wu2008-01-261-0/+10
| | | | | | | | | | | This patch is to move pxamci DMA specific code to corresponding platform layer because using DRCMRRXMMC/DRCMRTXMMC in pxamci.c makes the driver code dedicated to platform which is not extensible. It is applicable to all pxa platforms. Signed-off-by: Bridge Wu <bridge.wu@marvell.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] pxa: add cpufreq supportRussell King2008-01-263-1/+301
| | | | | | | There have been patches hanging around for ages to add support for cpufreq to PXA255 processors. It's about time we applied one. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] pxa: initialise SSP earlierRussell King2008-01-261-1/+1
| | | | | | | Initialise the SSP driver at arch_initcall() time, so it's available for other drivers to use it. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] pxa: only register "cpld_irq" for the correct platformRussell King2008-01-262-6/+14
| | | | | | | Only register the "cpld_irq" sysclass for mainstone/lubbock if we're running on one of those platforms. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] pxa: make pxa2xx_spi driver use ssp_request()/ssp_free()eric miao2008-01-261-17/+0
| | | | | | | | | | | | | | | | | | | | 1. make pxa2xx_spi.c use ssp_request() and ssp_free() to get the common information of the designated SSP port. 2. remove those IRQ/memory request code, ssp_request() has done that for the driver 3. the SPI platform device is thus made psuedo, no resource (memory/IRQ) has to be defined, all will be retreived by ssp_request() 4. introduce ssp_get_clk_div() to handle controller difference in clock divisor setting 5. use clk_xxx() API for clock enable/disable, and clk_get_rate() to handle the different SSP clock frequency between different processors Signed-off-by: eric miao <eric.miao@marvell.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] pxa: use __raw_writel()/__raw_readl() for ssp_xxxx()eric miao2008-01-261-28/+49
| | | | | | | | | | 1. change SSP register definitions from absolute virtual addresses to offsets 2. use __raw_writel()/__raw_readl() for functions of ssp_xxxx() Signed-off-by: eric miao <eric.miao@marvell.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] pxa: move SSP register definitions from pxa-regs.h to regs-ssp.heric miao2008-01-262-0/+2
| | | | | Signed-off-by: eric miao <eric.miao@marvell.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] pxa: define "struct ssp_device" and add ssp_request()/ssp_free()eric miao2008-01-261-56/+240
| | | | | | | | | | 1. define "struct ssp_device" for SSP information, which is requested and released by function ssp_request()/ssp_free() 2. modify the ssp_init() and ssp_exit() to use the interface Signed-off-by: eric miao <eric.miao@marvell.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] pxa: add ssp devices and clk support for pxa25x/pxa27x/pxa3xxeric miao2008-01-263-5/+24
| | | | | Signed-off-by: eric miao <eric.miao@marvell.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] pxa: define SSP platform devices for pxa2xx/pxa3xxeric miao2008-01-262-0/+285
| | | | | Signed-off-by: eric miao <eric.miao@marvell.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] pxa: Don't wind OSCR backwards over suspend/resumeRussell King2008-01-261-9/+12
| | | | | | | | | OSCR is supposed to monotonically increment; however restoring it to a time prior to OSMR0 may result in it being wound backwards. Instead, if OSMR0 is within the minimum expiry time, wind OSMR0 forwards. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] pxa: remove periodic mode emulation supportRussell King2008-01-262-53/+9
| | | | | | | | | Apparantly, the generic time subsystem can accurately emulate periodic mode via the one-shot support code, so we don't need our own periodic emulation code anymore. Just ensure that we build support for one shot into the generic time subsystem. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] pxa: mainstone: update backlight to use the backlight infrastructureRussell King2008-01-261-10/+50
| | | | | | | Linux has framebuffer backlight support infrastructure which should be used to expose backlight attributes. Mainstone should use it. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] pxa: avoid always registering MMC, I2C, IrDA and framebuffer devicesRussell King2008-01-265-18/+19
| | | | | | | | Only register the MMC, framebuffer, I2C and FICP devices when the platform supplies the necessary platform data structures for the devices. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] Update mach-typesRussell King2008-01-261-7/+251
| | | | Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* sched: latencytop supportArjan van de Ven2008-01-251-0/+27
| | | | | | | | LatencyTOP kernel infrastructure; it measures latencies in the scheduler and tracks it system wide and per process. Signed-off-by: Arjan van de Ven <arjan@linux.intel.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
* sched: high-res preemption tickPeter Zijlstra2008-01-253-3/+9
| | | | | | | | | | | | | | | | Use HR-timers (when available) to deliver an accurate preemption tick. The regular scheduler tick that runs at 1/HZ can be too coarse when nice level are used. The fairness system will still keep the cpu utilisation 'fair' by then delaying the task that got an excessive amount of CPU time but try to minimize this by delivering preemption points spot-on. The average frequency of this extra interrupt is sched_latency / nr_latency. Which need not be higher than 1/HZ, its just that the distribution within the sched_latency period is important. Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl> Signed-off-by: Ingo Molnar <mingo@elte.hu>
* cpu-hotplug: replace lock_cpu_hotplug() with get_online_cpus()Gautham R Shenoy2008-01-255-25/+25
| | | | | | | | | | | | | | | | | Replace all lock_cpu_hotplug/unlock_cpu_hotplug from the kernel and use get_online_cpus and put_online_cpus instead as it highlights the refcount semantics in these operations. The new API guarantees protection against the cpu-hotplug operation, but it doesn't guarantee serialized access to any of the local data structures. Hence the changes needs to be reviewed. In case of pseries_add_processor/pseries_remove_processor, use cpu_maps_update_begin()/cpu_maps_update_done() as we're modifying the cpu_present_map there. Signed-off-by: Gautham R Shenoy <ego@in.ibm.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
* sched: remove printk_clock references from ia64Ingo Molnar2008-01-252-15/+0
| | | | | | remove remaining printk_clock references from ia64. Signed-off-by: Ingo Molnar <mingo@elte.hu>
* sched: remove printk_clock()Ingo Molnar2008-01-252-38/+0
| | | | | | printk_clock() is obsolete - it has been replaced with cpu_clock(). Signed-off-by: Ingo Molnar <mingo@elte.hu>
* Merge branch 'for-linus' of ↵Linus Torvalds2008-01-2533-505/+3529
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/hskinnemoen/avr32-2.6 * 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/hskinnemoen/avr32-2.6: [AVR32] extint: Set initial irq type to low level [AVR32] extint: change set_irq_type() handling [AVR32] NMI debugging [AVR32] constify function pointer tables [AVR32] ATNGW100: Update defconfig [AVR32] ATSTK1002: Update defconfig [AVR32] Kconfig: Choose daughterboard instead of CPU [AVR32] Add support for ATSTK1003 and ATSTK1004 [AVR32] Clean up external DAC setup code [AVR32] ATSTK1000: Move gpio-leds setup to setup.c [AVR32] Add support for AT32AP7001 and AT32AP7002 [AVR32] Provide more CPU information in /proc/cpuinfo and dmesg [AVR32] Oprofile support [AVR32] Include instrumentation menu Disable VGA text console for AVR32 architecture [AVR32] Enable debugging only when needed ptrace: Call arch_ptrace_attach() when request=PTRACE_TRACEME [AVR32] Remove redundant try_to_freeze() call from do_signal() [AVR32] Drop GFP_COMP for DMA memory allocations
| * [AVR32] extint: Set initial irq type to low levelHaavard Skinnemoen2008-01-251-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | David Brownell pointed out a mismatch in the avr32 extint code: > I noticed a small glitch that's not fixed by this patch: the > initial type is falling edge, but IRQ_TYPE_NONE is mapped to > IRQ_TYPE_LEVEL_LOW. Potentially surprising. Fix it by setting the initial type (and handler) to low level, matching the meaning of IRQ_TYPE_NONE. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
| * [AVR32] extint: change set_irq_type() handlingDavid Brownell2008-01-251-11/+7
| | | | | | | | | | | | | | | | Update the AVR32 EIC code to use the new __set_irq_handler_unlocked() call, getting rid of one more instance of this widespread problem. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
| * [AVR32] NMI debuggingHaavard Skinnemoen2008-01-257-10/+155
| | | | | | | | | | | | | | | | Change the NMI handler to use the die notifier chain to signal anyone who cares. Add a simple "nmi debugger" which hooks into this chain and that may dump registers, task state, etc. when it happens. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
| * [AVR32] constify function pointer tablesJan Engelhardt2008-01-252-2/+2
| | | | | | | | | | Signed-off-by: Jan Engelhardt <jengelh@computergmbh.de> Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
| * [AVR32] ATNGW100: Update defconfigHaavard Skinnemoen2008-01-251-151/+262
| | | | | | | | Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
| * [AVR32] ATSTK1002: Update defconfigHaavard Skinnemoen2008-01-251-150/+483
| | | | | | | | | | | | | | Turn off a few useless options, enable a few useful ones and enable quite a few new drivers. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
| * [AVR32] Kconfig: Choose daughterboard instead of CPUHaavard Skinnemoen2008-01-252-24/+28
| | | | | | | | | | | | | | | | Remove the CPU selection menu and instead let it be selected by the board or daughterboard option. Add daughterboard selection for ATSTK1000 (this was previously determined based on CPU type.) Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
| * [AVR32] Add support for ATSTK1003 and ATSTK1004Haavard Skinnemoen2008-01-258-20/+1975
| | | | | | | | | | | | | | ATSTK1003 and ATSTK1004 are CPU daughterboards for ATSTK1000 featuring the AT32AP7001 and AT32AP7002 CPUs, respectively. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
| * [AVR32] Clean up external DAC setup codeHaavard Skinnemoen2008-01-252-16/+17
| | | | | | | | | | | | | | | | Reduce the ridiculous amount of #ifdef clutter in atstk1002.c a bit by moving all the extdac stuff into its own function and providing an empty stub for the case when it isn't wanted. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
| * [AVR32] ATSTK1000: Move gpio-leds setup to setup.cHaavard Skinnemoen2008-01-254-66/+72
| | | | | | | | | | | | | | There may be other boards than STK1002 that want to use the leds on STK1000. Move it to stk1000 common code to make it easier to reuse. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
| * [AVR32] Add support for AT32AP7001 and AT32AP7002Haavard Skinnemoen2008-01-258-21/+51
| | | | | | | | | | | | | | | | | | These are derivatives of the AT32AP7000 chip, which means that most of the code stays the same. Rename a few files, functions, definitions and config symbols to reflect that they apply to all AP700x chips, and exclude some platform devices from chips where they aren't present. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
| * [AVR32] Provide more CPU information in /proc/cpuinfo and dmesgHaavard Skinnemoen2008-01-251-26/+68
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add the following fields to /proc/cpuinfo: * chip type and revision (from the JTAG chip id) * cpu MHz (from clk_get_rate()) * features (from the CONFIG0 register) Also rename "cpu family" to "cpu arch" and "cpu type" to "cpu core" to remove some ambiguity. Show chip type and revision at bootup, and clarify that the other kinds of IDs that we're already printing are for the cpu core and architecture. Rename "AP7000" to "AP7" since that's the name of the core. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
| * [AVR32] Oprofile supportHaavard Skinnemoen2008-01-254-0/+247
| | | | | | | | | | | | | | | | | | This adds the necessary architecture code to run oprofile on AVR32 using the performance counters documented by the AVR32 Architecture Manual. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com> Acked-by: Philippe Elie <phil.el@wanadoo.fr>
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