summaryrefslogtreecommitdiffstats
path: root/arch/xtensa/boot
Commit message (Collapse)AuthorAgeFilesLines
* xtensa: configure shared DMA pool reservation in kc705 DTSMax Filippov2016-12-151-0/+16
| | | | | | | Add example 64MByte long reservation in the first 512MBytes of physical memory used as shared DMA pool. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
* xtensa: rearrange CCOUNT calibrationMax Filippov2016-09-201-3/+1
| | | | | | | | | | | | | | | DT-enabled kernel should have a CPU node connected to a clock. This clock is the CCOUNT clock. Use old platform_calibrate_ccount call as a fallback when CPU node cannot be found or has no clock and in non-DT-enabled configurations. Drop no longer needed code that updates CPU clock-frequency property in the DT; drop DT-related code from the platform_calibrate_ccount too. Move of_clk_init to the top of time_init, so that clocks are initialized before CCOUNT calibration is attempted. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
* xtensa: xtfpga: use clock provider, don't update DTMax Filippov2016-09-201-5/+6
| | | | | | | | | | | Instead of querying hardcoded FPGA frequency register and then updating clock-frequency property in specificly named DT nodes in machine setup code register a clock provider that returns fixed-rate clock, configured by register specified in DT. This way we have less magic/hardcoded names and use more existing common clock framework code. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Tested-by: Guenter Roeck <linux@roeck-us.net>
* xtensa: Tweak xuartps UART driver Rx watermark for Cadence CSP config.Scott Telford2016-09-191-1/+1
| | | | | | | | | Add module parameter xilinx_uartps.rx_trigger_level=32 to command line options for CSP to set Rx watermark for xuartps driver lower than the default value, to avoid UART overruns at 115200 bps. Signed-off-by: Scott Telford <stelford@cadence.com> Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
* xtensa: Added Cadence CSP kernel configuration for XtensaScott Telford2016-09-091-0/+54
| | | | | | | | Added defconfig, device tree and Xtensa variant header files for the Cadence Configurable System Platform "xt_lnx" processor configuration. Signed-off-by: Scott Telford <stelford@cadence.com> Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
* xtensa: cleanup MMU setup and kernel layout macrosMax Filippov2016-07-243-11/+8
| | | | | | | | | | | | | | | | Make kernel load address explicit, independent of the selected MMU configuration and configurable from Kconfig. Do not restrict it to the first 512MB of the physical address space. Cleanup kernel memory layout macros: - rename VECBASE_RESET_VADDR to VECBASE_VADDR, XC_VADDR to VECTOR_VADDR; - drop VIRTUAL_MEMORY_ADDRESS and LOAD_MEMORY_ADDRESS; - introduce PHYS_OFFSET and use it in __va and __pa definitions; - synchronize MMU/noMMU vectors, drop unused NMI vector; - replace hardcoded vectors offset of 0x3000 with Kconfig symbol. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
* xtensa: xtfpga: fix earlycon endiannessMax Filippov2016-03-112-2/+2
| | | | | | | | | Serial port is attached to XTFPGA boards as native endian device, now that earlycon parameter parser understands mmio32native put it into earlycon kernel parameter. This makes early console functional on both little- and big-endian CPUs with identical kernel command lines. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
* xtensa: xtfpga: fix i2c controller register width and endiannessMax Filippov2016-03-111-1/+2
| | | | | | | | | I2C controller is attached to XTFPGA boards as native endian device, mark it as such in DTS. Set register width in DTS to 4, this way it works both for little- and big-endian CPUs. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
* xtensa: xtfpga: fix ethernet controller endiannessMax Filippov2016-03-111-0/+1
| | | | | | | | Ethernet controller is attached to XTFPGA boards as native endian device, mark it as such in DTS and pass correct endianness in platform data. This makes network functional on big-endian CPUs. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
* xtensa: xtfpga: fix serial port register width and endiannessMax Filippov2016-03-111-0/+2
| | | | | | | | | Serial port is attached to XTFPGA boards as native endian device, mark it as such in DTS and pass correct endianness in platform data. Set register width in DTS to 4, this way it matches the platform data and works correctly on big-endian CPUs. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
* Merge tag 'xtensa-20151108' of git://github.com/czankel/xtensa-linuxLinus Torvalds2015-11-093-41/+17
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull xtensa updates from Chris Zankel: - fix remaining issues with noMMU cores - fix build for cores w/o cache or zero overhead loop options - fix boot of secondary cores in SMP configuration - add support for DMA to high memory pages - add dma_to_phys and phys_to_dma functions. * tag 'xtensa-20151108' of git://github.com/czankel/xtensa-linux: xtensa: implement dma_to_phys and phys_to_dma xtensa: support DMA to high memory Revert "xtensa: cache inquiry and unaligned cache handling functions" xtensa: drop unused sections and remapped reset handlers xtensa: fix secondary core boot in SMP xtensa: add FORCE_MAX_ZONEORDER to Kconfig xtensa: nommu: provide defconfig for de212 on kc705 xtensa: nommu: xtfpga: add kc705 DTS xtensa: add de212 core variant xtensa: nommu: select HAVE_FUTEX_CMPXCHG xtensa: nommu: fix default memory start address xtensa: nommu: provide correct KIO addresses xtensa: nommu: fix USER_RING definition xtensa: xtfpga: fix integer overflow in TASK_SIZE xtensa: fix build for configs without cache options xtensa: fixes for configs without loop option
| * xtensa: drop unused sections and remapped reset handlersMax Filippov2015-11-032-41/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | There are no .bootstrap or .ResetVector.text sections linked to the vmlinux image, drop these sections from vmlinux.ld.S. Drop RESET_VECTOR_VADDR definition only used for .ResetVector.text. Drop remapped copies of primary and secondary reset vectors, as modern gdb don't have problems stepping through instructions at arbitrary locations. Drop corresponding sections from the corresponding linker scripts. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
| * xtensa: nommu: xtfpga: add kc705 DTSMax Filippov2015-11-021-0/+17
| | | | | | | | Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
* | xtensa: enable building of all dtbsRob Herring2015-10-271-1/+6
|/ | | | | | | | | | | | Enable building all dtb files when CONFIG_OF_ALL_DTBS is enabled. The dtbs are not really dependent on a platform being enabled or any other kernel config, so for testing coverage it is convenient to build all of the dtbs. This builds all dts files in the tree, not just targets listed. Signed-off-by: Rob Herring <robh@kernel.org> Cc: Chris Zankel <chris@zankel.net> Cc: Max Filippov <jcmvbkbc@gmail.com> Cc: linux-xtensa@linux-xtensa.org
* xtensa: xtfpga: add audio card to xtfpga DTSMax Filippov2015-02-071-0/+64
| | | | | | | | This includes OpenCores I2C host controller, TI CDCE706 clock generator, xtfpga I2S master controller, xtfpga SPI master controller, TI TLV320AIC23 audio codec and a simple audio card. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
* xtensa: nommu: fix uImage load addressMax Filippov2014-10-211-0/+4
| | | | | | | Use the same offset from the default physical memory start address as in LOAD_MEMORY_ADDRESS definition. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
* xtensa: nommu: fix Image.elf reset code and ld scriptMax Filippov2014-10-212-6/+6
| | | | | | | | Don't hardcode kernel entry address as 0x3000 or 0xd0003000, use LOAD_MEMORY_ADDRESS macro. Don't compile MMU remapping code and don't try to link it when building noMMU configuration. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
* xtensa: xtfpga: add lx200 SMP DTS and defconfigMax Filippov2014-10-211-0/+16
| | | | | | | This config allows running SMP-enabled bitstream on LX200 board. NFS or FLASH rootfs, minimal debug, up to 4 cores. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
* xtensa: configure kc705 for highmemMax Filippov2014-08-141-1/+4
| | | | | | | | Enable all memory available on KC705 (1G - 128M) by default. Update memory node in DTS and also limit usable memory in bootargs in case memmap is passed from the bootloader. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
* xtensa: add support for KC705Max Filippov2014-04-062-0/+39
| | | | Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
* xtensa: xtfpga: introduce SoC I/O busMax Filippov2014-04-063-53/+64
| | | | Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
* xtensa: xtfpga: set ethoc clock frequencyMax Filippov2014-02-211-0/+1
| | | | | | | Connect xtfpga board ethernet MAC to the clock in the DTS. Set up MAC base frequency in the platform data in case of build w/o CONFIG_OF. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
* xtensa: xtfpga: use common clock frameworkMax Filippov2014-02-211-3/+8
| | | | | | | With this change the board needs to set up single clock object, users of this clock will get correct frequency automatically. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
* xtensa: standardize devicetree cpu compatible stringsBaruch Siach2014-01-153-4/+4
| | | | | | | | | | | The recommended compatible string format, according to the ePAPR v1.1 standard, is "manufacturer,model". Change the xtensa cpu compatible strings to "cdns,xtensa-cpu". Also, change the boards compatible strings in a similar way. The pic compatible string will be dealt with in a separate patch. Signed-off-by: Baruch Siach <baruch@tkos.co.il> Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
* xtensa: move built-in PIC to drivers/irqchipMax Filippov2014-01-141-1/+1
| | | | | | | | | Extract xtensa built-in interrupt controller implementation from xtensa/kernel/irq.c and move it to other irqchips, providing way to instantiate it from the device tree. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Chris Zankel <chris@zankel.net>
* xtensa: don't use echo -e needlesslyMax Filippov2013-09-061-1/+1
| | | | | | | | | | -e is not needed to output strings without escape sequences. This breaks big endian FSF build when the shell is dash, because its builtin echo doesn't understand '-e' switch and outputs it in the echoed string. Reported-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Chris Zankel <chris@zankel.net>
* xtensa: add static function tracer supportMax Filippov2013-07-081-0/+7
| | | | | Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Chris Zankel <chris@zankel.net>
* xtensa: tell git to ignore generated .dtb filesBaruch Siach2013-07-081-0/+1
| | | | | | Signed-off-by: Baruch Siach <baruch@tkos.co.il> Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Chris Zankel <chris@zankel.net>
* xtensa: tell git to ignore copied zlib source filesBaruch Siach2013-07-081-0/+3
| | | | | Signed-off-by: Baruch Siach <baruch@tkos.co.il> Signed-off-by: Chris Zankel <chris@zankel.net>
* xtensa: tell git to ignore generated filesBaruch Siach2013-06-052-0/+3
| | | | | | Signed-off-by: Baruch Siach <baruch@tkos.co.il> Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Chris Zankel <chris@zankel.net>
* xtensa: fix redboot load addressChris Zankel2013-05-091-1/+1
| | | | | | | | With the patch to support MMUv3, the base address for the loaded binary image has changed, and a fix was applied to the U-Boot image. This fixes the RedBoot image. Signed-off-by: Chris Zankel <chris@zankel.net>
* xtensa: add MMU v3 supportMax Filippov2013-05-094-54/+118
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | MMUv3 comes out of reset with identity vaddr -> paddr mapping in the TLB way 6: Way 6 (512 MB) Vaddr Paddr ASID Attr RWX Cache ---------- ---------- ---- ---- --- ------- 0x00000000 0x00000000 0x01 0x03 RWX Bypass 0x20000000 0x20000000 0x01 0x03 RWX Bypass 0x40000000 0x40000000 0x01 0x03 RWX Bypass 0x60000000 0x60000000 0x01 0x03 RWX Bypass 0x80000000 0x80000000 0x01 0x03 RWX Bypass 0xa0000000 0xa0000000 0x01 0x03 RWX Bypass 0xc0000000 0xc0000000 0x01 0x03 RWX Bypass 0xe0000000 0xe0000000 0x01 0x03 RWX Bypass This patch adds remapping code at the reset vector or at the kernel _start (depending on CONFIG_INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX) that reconfigures MMUv3 as MMUv2: Way 5 (128 MB) Vaddr Paddr ASID Attr RWX Cache ---------- ---------- ---- ---- --- ------- 0xd0000000 0x00000000 0x01 0x07 RWX WB 0xd8000000 0x00000000 0x01 0x03 RWX Bypass Way 6 (256 MB) Vaddr Paddr ASID Attr RWX Cache ---------- ---------- ---- ---- --- ------- 0xe0000000 0xf0000000 0x01 0x07 RWX WB 0xf0000000 0xf0000000 0x01 0x03 RWX Bypass Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Chris Zankel <chris@zankel.net>
* xtensa: use new common dtc ruleStephen Warren2013-02-232-12/+15
| | | | | | | | | | | | | The current rules have the .dtb files build in a different directory from the .dts files. This patch changes xtensa to use the generic dtb rule which builds .dtb files in the same directory as the source .dts. This requires moving parts of arch/xtensa/boot/Makefile into newly created arch/xtensa/boot/dts/Makefile, and updating arch/xtensa/Makefile to call the new Makefile. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Chris Zankel <chris@zankel.net>
* xtensa: don't try to build DTB when OF is disabledMax Filippov2012-12-181-1/+1
| | | | | Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Chris Zankel <chris@zankel.net>
* xtensa: add XTFPGA DTSMax Filippov2012-12-185-0/+122
| | | | | | | | Add common XTFPGA parts as *.dtsi (base board, flash) and DTS for LX60 and for ML605. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Chris Zankel <chris@zankel.net>
* xtensa: add support for the XTFPGA boardsMax Filippov2012-12-181-0/+1
| | | | | | | | | The Avnet LX60/LX110/LX200 board is an FPGA board that can be configured with an Xtensa processor and an OpenCores Ethernet device. Signed-off-by: Chris Zankel <chris@zankel.net> Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Chris Zankel <chris@zankel.net>
* xtensa: add device trees supportMax Filippov2012-12-181-0/+11
| | | | | | | | | | | | | | | | | | | | Device trees allow specification of hardware topology and device parameters at runtime instead of hard-coding them in platform setup code. This allows running single binary kernel on a range of compatible boards. New boot parameters tag BP_TAG_FDT is allocated and a pointer to flat device tree is passed in it. Note that current interrupt mapping scheme uses single cell for interrupt identification. That means that IRQ numbers used in DTS must be CPU internal IRQ numbers, not external. It is possible to extend interrupt identification to two cells, and use second cell to tell external IRQ numbers form internal. That would allow to use single DTS on multiple boards with different mapping of external IRQ numbers. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Chris Zankel <chris@zankel.net>
* xtensa: add U-Boot image support (uImage).Max Filippov2012-12-182-1/+16
| | | | | Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Chris Zankel <chris@zankel.net>
* xtensa: clean up boot make rulesMax Filippov2012-12-183-29/+33
| | | | | | | | | - remove duplicate rules for binary and packed image - use predefined macros for ld/objcopy/gzip - remove build-id section from bootable elf image Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Chris Zankel <chris@zankel.net>
* xtensa: reorganize SR referencingMax Filippov2012-10-151-4/+4
| | | | | | | | | | - reference SRs by names where possible, not by numbers; - get rid of __stringify around SR names where possible; - remove unneeded SR names from asm/regs.h; - add SREG_ prefix to remaining SR names; Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Chris Zankel <chris@zankel.net>
* xtensa: drop CONFIG_EMBEDDED_RAMDISKMax Filippov2012-10-036-65/+1
| | | | | | | | | | | Remove Kconfig entries, boot subdirectory, dependencies from other boot-* Makefiles, and sections from ld scripts. Remove stale redboot code that used to pass initrd addresses in a3 and a4 to _start. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Chris Zankel <chris@zankel.net>
* xtensa: fix parallel makeMax Filippov2012-10-032-9/+12
| | | | | | | | Make vmlinux.tmp and vmlinux.tmp.gz separate build targets, avoid removing vmlinux.tmp during vmlinux.tmp.gz build. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Chris Zankel <chris@zankel.net>
* xtensa: change to new flag variablematt mooney2011-03-172-2/+2
| | | | | | | | Replace EXTRA_CFLAGS with ccflags-y. Signed-off-by: matt mooney <mfm@muteddisk.com> Acked-by: WANG Cong <xiyou.wangcong@gmail.com> Signed-off-by: Michal Marek <mmarek@suse.cz>
* xtensa: move headers files to arch/xtensa/includeChris Zankel2008-11-062-2/+2
| | | | | | | | | | | | | | Move all header files for xtensa to arch/xtensa/include and platform and variant header files to the appropriate arch/xtensa/platforms/ and arch/xtensa/variants/ directories. Moving the files gets also rid of all uses of symlinks in the Makefile. This has been completed already for the majority of the architectures and xtensa is one out of six missing. Signed-off-by: Sam Ravnborg <sam@ravnborg.org> Signed-off-by: Chris Zankel <chris@zankel.net>
* [XTENSA] Fix makefile to work with binutils-2.18.Bob Wilson2008-02-132-3/+3
| | | | | | | | | | When building with binutils-2.18, vmlinux includes .note.gnu.build-id sections that need to be stripped out when building the binary image. The old .xt.insn sections haven't been used for a long time, so don't bother stripping them. Signed-off-by: Bob Wilson <bob.wilson@acm.org> Signed-off-by: Chris Zankel <chris@zankel.net>
* [XTENSA] Use preprocessor to generate the linker script for the ELF boot imageChris Zankel2008-02-132-3/+5
| | | | | Signed-off-by: Marc Gauthier <marc@tensilica.com> Signed-off-by: Chris Zankel <chris@zankel.net>
* [XTENSA] adjust boot linker script start addressesMarc Gauthier2008-02-132-1/+2
| | | | | | | | | | Move boot-redboot load address from 0xD0200000 to 0xD1000000 to make space for larger kernel images, in particular those with an embedded initramfs filesystem. Also properly set the ELF start address in boot-elf images so that PC need not be set manually when loading them using GDB. Signed-off-by: Marc Gauthier <marc@tensilica.com>
* kbuild: restore arch/{ppc/xtensa}/boot cflagsMilton Miller2007-10-201-1/+2
| | | | | | | | | | | Commit 9a39e273d4df0560c724c5fe71f6314a0583ca2b removed the boot directory addition to CFLAGS that was being used by the subdirectory builds. For the other files, that patch set EXTRA_CFLAGS, but Makefile.build explicitly sets that to empty as it is explicitly for a single directory only. Append to KBUILD_CFLAGS instead. Signed-off-by: Milton Miller <miltonm@bga.com> Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
* kbuild: enable 'make CFLAGS=...' to add additional options to CCSam Ravnborg2007-10-141-1/+1
| | | | | | | | | | | | | | | | | | | | | | | The variable CFLAGS is a wellknown variable and the usage by kbuild may result in unexpected behaviour. On top of that several people over time has asked for a way to pass in additional flags to gcc. This patch replace use of CFLAGS with KBUILD_CFLAGS all over the tree and enabling one to use: make CFLAGS=... to specify additional gcc commandline options. One usecase is when trying to find gcc bugs but other use cases has been requested too. Patch was tested on following architectures: alpha, arm, i386, x86_64, mips, sparc, sparc64, ia64, m68k Test was simple to do a defconfig build, apply the patch and check that nothing got rebuild. Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
* kbuild: fix up CFLAGS usageSam Ravnborg2007-10-141-3/+2
| | | | | | | | | Only in very rare cases is it needed to change CFLAGS outside of arch/*/Makefile. Fix up all wrong cases - in most cases the use of EXTRA_CFLAGS is the only thing needed. Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
OpenPOWER on IntegriCloud