| Commit message (Expand) | Author | Age | Files | Lines |
* | perf/x86/intel: Limit to half counters when the HT workaround is enabled, to ... | Stephane Eranian | 2015-04-02 | 2 | -2/+22 |
* | perf/x86/intel: Fix intel_get_event_constraints() for dynamic constraints | Stephane Eranian | 2015-04-02 | 1 | -5/+10 |
* | perf/x86/intel: Enforce HT bug workaround with PEBS for SNB/IVB/HSW | Maria Dimakopoulou | 2015-04-02 | 2 | -11/+37 |
* | perf/x86/intel: Enforce HT bug workaround for SNB/IVB/HSW | Maria Dimakopoulou | 2015-04-02 | 1 | -9/+44 |
* | perf/x86/intel: Implement cross-HT corruption bug workaround | Maria Dimakopoulou | 2015-04-02 | 3 | -13/+331 |
* | perf/x86/intel: Add cross-HT counter exclusion infrastructure | Maria Dimakopoulou | 2015-04-02 | 2 | -5/+98 |
* | perf/x86: Add 'index' param to get_event_constraint() callback | Stephane Eranian | 2015-04-02 | 4 | -10/+19 |
* | perf/x86: Add 3 new scheduling callbacks | Maria Dimakopoulou | 2015-04-02 | 2 | -0/+18 |
* | perf/x86: Vectorize cpuc->kfree_on_online | Stephane Eranian | 2015-04-02 | 4 | -6/+19 |
* | perf/x86: Rename x86_pmu::er_flags to 'flags' | Stephane Eranian | 2015-04-02 | 2 | -15/+18 |
* | Merge branch 'perf/urgent' into perf/core, before applying dependent patches | Ingo Molnar | 2015-04-02 | 2 | -9/+19 |
|\ |
|
| * | perf/x86/intel: Fix Haswell CYCLE_ACTIVITY.* counter constraints | Andi Kleen | 2015-04-02 | 1 | -3/+3 |
| * | perf/x86/intel: Filter branches for PEBS event | Kan Liang | 2015-04-02 | 1 | -2/+2 |
| * | Merge branch 'x86-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/ker... | Linus Torvalds | 2015-03-28 | 1 | -4/+14 |
| |\ |
|
| | * | x86/asm/entry: Check for syscall exit work with IRQs disabled | Andy Lutomirski | 2015-03-24 | 1 | -4/+14 |
* | | | perf/x86/intel/bts: Add BTS PMU driver | Alexander Shishkin | 2015-04-02 | 5 | -3/+540 |
* | | | perf/x86/intel/pt: Add Intel PT PMU driver | Alexander Shishkin | 2015-04-02 | 6 | -0/+1256 |
* | | | perf/x86: Mark Intel PT and LBR/BTS as mutually exclusive | Alexander Shishkin | 2015-04-02 | 3 | -0/+94 |
* | | | x86: Add Intel Processor Trace (INTEL_PT) cpu feature detection | Alexander Shishkin | 2015-04-02 | 2 | -0/+2 |
* | | | perf: Add per event clockid support | Peter Zijlstra | 2015-03-27 | 1 | -2/+12 |
* | | | Merge branch 'perf/core' into perf/timer, before applying new changes | Ingo Molnar | 2015-03-27 | 12 | -152/+2018 |
|\ \ \ |
|
| * | | | perf/x86: Remove redundant calls to perf_pmu_{dis|en}able() | David Ahern | 2015-03-27 | 1 | -2/+0 |
| * | | | Merge branch 'perf/x86' into perf/core, because it's ready | Ingo Molnar | 2015-03-27 | 5 | -2/+1430 |
| |\ \ \ |
|
| | * | | | perf: Remove type specific target pointers | Peter Zijlstra | 2015-03-23 | 1 | -4/+3 |
| | * | | | perf/x86/intel: Fix Makefile to actually build the cqm driver | Matt Fleming | 2015-03-23 | 1 | -1/+1 |
| | * | | | perf/x86/intel: Enable conflicting event scheduling for CQM | Matt Fleming | 2015-02-25 | 1 | -46/+84 |
| | * | | | perf/x86/intel: Perform rotation on Intel CQM RMIDs | Matt Fleming | 2015-02-25 | 1 | -48/+623 |
| | * | | | perf/x86/intel: Support task events with Intel CQM | Matt Fleming | 2015-02-25 | 1 | -21/+174 |
| | * | | | perf/x86/intel: Implement LRU monitoring ID allocation for CQM | Matt Fleming | 2015-02-25 | 1 | -8/+92 |
| | * | | | perf/x86/intel: Add Intel Cache QoS Monitoring support | Matt Fleming | 2015-02-25 | 1 | -0/+530 |
| | * | | | x86: Add support for Intel Cache QoS Monitoring (CQM) detection | Peter P Waskiewicz Jr | 2015-02-25 | 3 | -1/+50 |
| * | | | | Merge branch 'perf/urgent' into perf/core, to pick up fixes and to refresh th... | Ingo Molnar | 2015-03-27 | 35 | -161/+183 |
| |\ \ \ \
| | | |_|/
| | |/| | |
|
| * | | | | perf/x86/intel: Add INST_RETIRED.ALL workarounds | Andi Kleen | 2015-03-27 | 3 | -0/+37 |
| * | | | | perf/x86/intel: Add Broadwell core support | Andi Kleen | 2015-03-27 | 1 | -0/+47 |
| * | | | | perf/x86/intel: Add new cache events table for Haswell | Andi Kleen | 2015-03-27 | 1 | -2/+192 |
| * | | | | kprobes/x86: Return correct length in __copy_instruction() | Eugene Shatokhin | 2015-03-17 | 1 | -3/+6 |
| * | | | | Merge 'tip/perf/urgent' into perf/core to pick fixes | Arnaldo Carvalho de Melo | 2015-03-02 | 2 | -14/+42 |
| |\ \ \ \ |
|
| * \ \ \ \ | Merge tag 'v4.0-rc1' into perf/core, to refresh the tree | Ingo Molnar | 2015-02-26 | 137 | -2510/+5102 |
| |\ \ \ \ \
| | |_|_|/ /
| |/| | | | |
|
| * | | | | | perf/x86/intel: Expose LBR callstack to user space tooling | Peter Zijlstra | 2015-02-18 | 2 | -12/+4 |
| * | | | | | perf/x86/intel: Discard zero length call entries in LBR call stack | Yan, Zheng | 2015-02-18 | 1 | -2/+11 |
| * | | | | | perf/x86/intel: Disable FREEZE_LBRS_ON_PMI when LBR operates in callstack mode | Yan, Zheng | 2015-02-18 | 1 | -4/+13 |
| * | | | | | perf/x86/intel: Re-organize code that implicitly enables LBR/PEBS | Yan, Zheng | 2015-02-18 | 1 | -30/+29 |
| * | | | | | perf: Simplify the branch stack check | Yan, Zheng | 2015-02-18 | 1 | -17/+3 |
| * | | | | | perf/x86/intel: Save/restore LBR stack during context switch | Yan, Zheng | 2015-02-18 | 1 | -12/+76 |
| * | | | | | perf/x86/intel: Track number of events that use the LBR callstack | Yan, Zheng | 2015-02-18 | 1 | -0/+19 |
| * | | | | | perf/x86/intel: Allocate space for storing LBR stack | Yan, Zheng | 2015-02-18 | 2 | -0/+11 |
| * | | | | | perf/x86/intel: Add basic Haswell LBR call stack support | Yan, Zheng | 2015-02-18 | 3 | -24/+83 |
| * | | | | | perf/x86/intel: Use context switch callback to flush LBR stack | Yan, Zheng | 2015-02-18 | 4 | -21/+30 |
| * | | | | | perf: Introduce pmu context switch callback | Yan, Zheng | 2015-02-18 | 2 | -0/+9 |
| * | | | | | perf/x86/intel: Reduce lbr_sel_map[] size | Yan, Zheng | 2015-02-18 | 2 | -29/+29 |