summaryrefslogtreecommitdiffstats
path: root/arch/x86/kvm
Commit message (Collapse)AuthorAgeFilesLines
* KVM: task switch: translate guest segment limit to virt-extension byte ↵Marcelo Tosatti2008-07-271-0/+4
| | | | | | | | | granular field If 'g' is one then limit is 4kb granular. Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com> Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: Avoid instruction emulation when event delivery is pendingAvi Kivity2008-07-273-1/+9
| | | | | | | | | | | | | | | | When an event (such as an interrupt) is injected, and the stack is shadowed (and therefore write protected), the guest will exit. The current code will see that the stack is shadowed and emulate a few instructions, each time postponing the injection. Eventually the injection may succeed, but at that time the guest may be unwilling to accept the interrupt (for example, the TPR may have changed). This occurs every once in a while during a Windows 2008 boot. Fix by unshadowing the fault address if the fault was due to an event injection. Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: task switch: use seg regs provided by subarch instead of reading from GDTMarcelo Tosatti2008-07-271-63/+30
| | | | | | | | | | | There is no guarantee that the old TSS descriptor in the GDT contains the proper base address. This is the case for Windows installation's reboot-via-triplefault. Use guest registers instead. Also translate the address properly. Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com> Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: task switch: segment base is linear addressMarcelo Tosatti2008-07-271-3/+9
| | | | | | | | The segment base is always a linear address, so translate before accessing guest memory. Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com> Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: SVM: allow enabling/disabling NPT by reloading only the architecture moduleJoerg Roedel2008-07-272-1/+8
| | | | | | | | | | If NPT is enabled after loading both KVM modules on AMD and it should be disabled, both KVM modules must be reloaded. If only the architecture module is reloaded the behavior is undefined. With this patch it is possible to disable NPT only by reloading the kvm_amd module. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com> Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: MMU: Fix potential race setting upper shadow ptes on nonpae hostsAvi Kivity2008-07-201-3/+4
| | | | | | | | | | | | | The direct mapped shadow code (used for real mode and two dimensional paging) sets upper-level ptes using direct assignment rather than calling set_shadow_pte(). A nonpae host will split this into two writes, which opens up a race if another vcpu accesses the same memory area. Fix by calling set_shadow_pte() instead of assigning directly. Noticed by Izik Eidus. Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: x86 emulator: emulate clflushGlauber Costa2008-07-201-1/+3
| | | | | | | | | | If the guest issues a clflush in a mmio address, the instruction can trap into the hypervisor. Currently, we do not decode clflush properly, causing the guest to hang. This patch fixes this emulating clflush (opcode 0f ae). Signed-off-by: Glauber Costa <gcosta@redhat.com> Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: MMU: improve invalid shadow root page handlingMarcelo Tosatti2008-07-201-1/+4
| | | | | | | | Harden kvm_mmu_zap_page() against invalid root pages that had been shadowed from memslots that are gone. Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com> Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: MMU: nuke shadowed pgtable pages and ptes on memslot destructionMarcelo Tosatti2008-07-201-0/+5
| | | | | | | Flush the shadow mmu before removing regions to avoid stale entries. Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com> Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: Prefix some x86 low level function with kvm_, to avoid namespace issuesAvi Kivity2008-07-203-27/+27
| | | | | | Fixes compilation with CONFIG_VMI enabled. Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: check injected pic irq within valid pic irqsBen-Ami Yassour2008-07-202-2/+6
| | | | | | | Check that an injected pic irq is between 0 and 15. Signed-off-by: Ben-Ami Yassour <benami@il.ibm.com> Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: x86 emulator: Fix HLT instructionMohammed Gamal2008-07-201-1/+1
| | | | | | | | | | | | | | | This patch fixes issue encountered with HLT instruction under FreeDOS's HIMEM XMS Driver. The HLT instruction jumped directly to the done label and skips updating the EIP value, therefore causing the guest to spin endlessly on the same instruction. The patch changes the instruction so that it writes back the updated EIP value. Signed-off-by: Mohammed Gamal <m.gamal005@gmail.com> Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: Apply the kernel sigmask to vcpus blocked due to being uninitializedAvi Kivity2008-07-201-5/+5
| | | | Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: VMX: Add ept_sync_context in flush_tlbSheng Yang2008-07-201-0/+3
| | | | | | | | | Fix a potention issue caused by kvm_mmu_slot_remove_write_access(). The old behavior don't sync EPT TLB with modified EPT entry, which result in inconsistent content of EPT TLB and EPT table. Signed-off-by: Sheng Yang <sheng.yang@intel.com> Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: mmu_shrink: kvm_mmu_zap_page requires slots_lock to be heldMarcelo Tosatti2008-07-201-0/+3
| | | | | | | | | | | | kvm_mmu_zap_page() needs slots lock held (rmap_remove->gfn_to_memslot, for example). Since kvm_lock spinlock is held in mmu_shrink(), do a non-blocking down_read_trylock(). Untested. Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: SVM: fix suspend/resume supportJoerg Roedel2008-07-201-12/+22
| | | | | | | | | | On suspend the svm_hardware_disable function is called which frees all svm_data variables. On resume they are not re-allocated. This patch removes the deallocation of svm_data from the hardware_disable function to the hardware_unsetup function which is not called on suspend. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com> Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: move slots_lock acquision down to vapic_exitMarcelo Tosatti2008-07-201-2/+2
| | | | | | | | There is no need to grab slots_lock if the vapic_page will not be touched. Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com> Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: VMX: Fake emulate Intel perfctr MSRsChris Lalancette2008-07-201-0/+12
| | | | | | | | | | | Older linux guests (in this case, 2.6.9) can attempt to access the performance counter MSRs without a fixup section, and injecting a GPF kills the guest. Work around by allowing the guest to write those MSRs. Tested by me on RHEL-4 i386 and x86_64 guests, as well as F-9 guests. Signed-off-by: Chris Lalancette <clalance@redhat.com> Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: VMX: Fix a wrong usage of vmcs_configSheng Yang2008-07-201-2/+2
| | | | | | | | | | The function ept_update_paging_mode_cr0() write to CPU_BASED_VM_EXEC_CONTROL based on vmcs_config.cpu_based_exec_ctrl. That's wrong because the variable may not consistent with the content in the CPU_BASE_VM_EXEC_CONTROL MSR. Signed-off-by: Sheng Yang <sheng.yang@intel.com> Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: MMU: Fix printk formatAvi Kivity2008-07-201-1/+1
| | | | Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: MMU: When debug is enabled, make it a run-time parameterAvi Kivity2008-07-201-1/+2
| | | | Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: x86 emulator: lazily evaluate segment registersAvi Kivity2008-07-202-60/+57
| | | | | | | | Instead of prefetching all segment bases before emulation, read them at the last moment. Since most of them are unneeded, we save some cycles on Intel machines where this is a bit expensive. Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: x86 emulator: avoid segment base adjust for leaAvi Kivity2008-07-201-1/+1
| | | | Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: x86 emulator: simplify rip relative decodingAvi Kivity2008-07-201-18/+5
| | | | | | | | rip relative decoding is relative to the instruction pointer of the next instruction; by moving address adjustment until after decoding is complete, we remove the need to determine the instruction size. Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: x86 emulator: simplify r/m decodingAvi Kivity2008-07-201-13/+4
| | | | | | Consolidate the duplicated code when not in any special case. Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: x86 emulator: simplify sib decodingAvi Kivity2008-07-201-16/+4
| | | | | | Instead of using sparse switches, use simpler if/else sequences. Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: x86 emulator: handle undecoded rex.b with r/m = 5 in certain casesAvi Kivity2008-07-201-0/+2
| | | | | | x86_64 does not decode rex.b in certain cases, where the r/m field = 5. Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: x86 emulator: emulate nop and xchg reg, acc (opcodes 0x90 - 0x97)Mohammed Gamal2008-07-201-2/+15
| | | | | Signed-off-by: Mohammed Gamal <m.gamal005@gmail.com> Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: Use printk_rlimit() instead of reporting emulation failures just onceAvi Kivity2008-07-201-3/+1
| | | | | | | Emulation failure reports are useful, so allow more than one per the lifetime of the module. Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: Do not calculate linear rip in emulation failure reportGlauber Costa2008-07-201-2/+2
| | | | | | | | If we're not gonna do anything (case in which failure is already reported), we do not need to even bother with calculating the linear rip. Signed-off-by: Glauber Costa <gcosta@redhat.com> Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: only abort guest entry if timer count goes from 0->1Marcelo Tosatti2008-07-202-9/+6
| | | | | | | | | | | | | | | | Only abort guest entry if the timer count went from 0->1, since for 1->2 or larger the bit will either be set already or a timer irq will have been injected. Using atomic_inc_and_test() for it also introduces an SMP barrier to the LAPIC version (thought it was unecessary because of timer migration, but guest can be scheduled to a different pCPU between exit and kvm_vcpu_block(), so there is the possibility for a race). Noticed by Avi. Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com> Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: Add coalesced MMIO support (x86 part)Laurent Vivier2008-07-202-1/+5
| | | | | | | | | This patch enables coalesced MMIO for x86 architecture. It defines KVM_MMIO_PAGE_OFFSET and KVM_CAP_COALESCED_MMIO. It enables the compilation of coalesced_mmio.c. Signed-off-by: Laurent Vivier <Laurent.Vivier@bull.net> Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: kvm_io_device: extend in_range() to manage len and write attributeLaurent Vivier2008-07-204-15/+25
| | | | | | | | | | Modify member in_range() of structure kvm_io_device to pass length and the type of the I/O (write or read). This modification allows to use kvm_io_device with coalesced MMIO. Signed-off-by: Laurent Vivier <Laurent.Vivier@bull.net> Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: MMU: Avoid page prefetch on SVMAvi Kivity2008-07-201-1/+4
| | | | | | | | SVM cannot benefit from page prefetching since guest page fault bypass cannot by made to work there. Avoid accessing the guest page table in this case. Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: MMU: Move nonpaging_prefetch_page()Avi Kivity2008-07-201-9/+9
| | | | | | In preparation for next patch. No code change. Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: x86 emulator: implement 'push imm' (opcode 0x68)Avi Kivity2008-07-201-1/+2
| | | | | | | Encountered in FC6 boot sequence, now that we don't force ss.rpl = 0 during the protected mode transition. Not really necessary, but nice to have. Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: x86 emulator: simplify push imm8 emulationAvi Kivity2008-07-201-3/+1
| | | | | | Instead of fetching the data explicitly, use SrcImmByte. Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: MMU: Optimize prefetch_page()Avi Kivity2008-07-201-13/+15
| | | | | | | Instead of reading each pte individually, read 256 bytes worth of ptes and batch process them. Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: x86 emulator: Add support for mov r, sreg (0x8c) instructionGuillaume Thouvenin2008-07-201-1/+14
| | | | | | | | Add support for mov r, sreg (0x8c) instruction Signed-off-by: Guillaume Thouvenin <guillaume.thouvenin@ext.bull.net> Signed-off-by: Laurent Vivier <laurent.vivier@bull.net> Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: x86 emulator: Add support for mov seg, r (0x8e) instructionGuillaume Thouvenin2008-07-201-1/+24
| | | | | | | | | | Add support for mov r, sreg (0x8c) instruction. [avi: drop the sreg decoding table in favor of 1:1 encoding] Signed-off-by: Guillaume Thouvenin <guillaume.thouvenin@ext.bull.net> Signed-off-by: Laurent Vivier <laurent.vivier@bull.net> Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: x86 emulator: adds support to mov r,imm (opcode 0xb8) instructionGuillaume Thouvenin2008-07-201-1/+4
| | | | | | | | Add support to mov r, imm (0xb8) instruction. Signed-off-by: Guillaume Thouvenin <guillaume.thouvenin@ext.bull.net> Signed-off-by: Laurent Vivier <laurent.vivier@bull.net> Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: x86 emulator: add support for jmp far 0xeaGuillaume Thouvenin2008-07-201-2/+29
| | | | | | | | Add support for jmp far (opcode 0xea) instruction. Signed-off-by: Guillaume Thouvenin <guillaume.thouvenin@ext.bull.net> Signed-off-by: Laurent Vivier <laurent.vivier@bull.net> Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: x86 emulator: Update c->dst.bytes in decode instructionGuillaume Thouvenin2008-07-201-0/+1
| | | | | | | | | | Update c->dst.bytes in decode instruction instead of instruction itself. It's needed because if c->dst.bytes is equal to 0, the instruction is not emulated. Signed-off-by: Guillaume Thouvenin <guillaume.thouvenin@ext.bull.net> Signed-off-by: Laurent Vivier <laurent.vivier@bull.net> Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: Prefixes segment functions that will be exported with "kvm_"Guillaume Thouvenin2008-07-201-39/+39
| | | | | | | | | | Prefixes functions that will be exported with kvm_. We also prefixed set_segment() even if it still static to be coherent. signed-off-by: Guillaume Thouvenin <guillaume.thouvenin@ext.bull.net> Signed-off-by: Laurent Vivier <laurent.vivier@bull.net> Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: MTRR supportAvi Kivity2008-07-201-4/+48
| | | | | | | Add emulation for the memory type range registers, needed by VMware esx 3.5, and by pci device assignment. Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: VMX: Enable NMI with in-kernel irqchipSheng Yang2008-07-203-19/+118
| | | | | Signed-off-by: Sheng Yang <sheng.yang@intel.com> Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: IOAPIC/LAPIC: Enable NMI supportSheng Yang2008-07-202-1/+8
| | | | | | | [avi: fix ia64 build breakage] Signed-off-by: Sheng Yang <sheng.yang@intel.com> Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: Remove unnecessary ->decache_regs() callAvi Kivity2008-07-201-1/+0
| | | | | | | Since we aren't modifying any register, there's no need to decache the register state. Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: Remove decache_vcpus_on_cpu() and related callbacksAvi Kivity2008-07-203-19/+0
| | | | | | Obsoleted by the vmx-specific per-cpu list. Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: VMX: Add list of potentially locally cached vcpusAvi Kivity2008-07-202-29/+22
| | | | | | | | | | | | | | | | | | | | | VMX hardware can cache the contents of a vcpu's vmcs. This cache needs to be flushed when migrating a vcpu to another cpu, or (which is the case that interests us here) when disabling hardware virtualization on a cpu. The current implementation of decaching iterates over the list of all vcpus, picks the ones that are potentially cached on the cpu that is being offlined, and flushes the cache. The problem is that it uses mutex_trylock() to gain exclusive access to the vcpu, which fires off a (benign) warning about using the mutex in an interrupt context. To avoid this, and to make things generally nicer, add a new per-cpu list of potentially cached vcus. This makes the decaching code much simpler. The list is vmx-specific since other hardware doesn't have this issue. [andrea: fix crash on suspend/resume] Signed-off-by: Andrea Arcangeli <andrea@qumranet.com> Signed-off-by: Avi Kivity <avi@qumranet.com>
OpenPOWER on IntegriCloud