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path: root/arch/x86/kernel/cpu/intel.c
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* Merge branch 'x86/ptrace' into x86/tscIngo Molnar2008-12-231-2/+1
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| * x86, bts: DS and BTS initializationMarkus Metzger2008-11-101-2/+1
* | x86: fix intel x86_64 llc_shared_map/cpu_llc_id anomoliesSuresh Siddha2008-12-191-1/+7
* | x86: support always running TSC on Intel CPUsVenki Pallipadi2008-12-161-0/+10
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* x86: print out apic id in hex formatYinghai Lu2008-10-161-1/+1
* x86: extended "flags" to show virtualization HW feature in /proc/cpuinfoSheng Yang2008-09-101-0/+41
* x86: intel.c put workaround for old cpus togetherYinghai Lu2008-09-101-94/+98
* x86: make intel.c have 64-bit support codeYinghai Lu2008-09-101-36/+83
* Merge branch 'x86/pebs' into x86/unify-cpu-detectIngo Molnar2008-09-101-1/+2
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| * Merge branch 'linus' into x86/pebsIngo Molnar2008-07-251-0/+14
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| * | x86, ptrace: PEBS supportMarkus Metzger2008-05-121-1/+2
* | | x86: little clean up of intel.c/intel_64.cYinghai Lu2008-09-081-4/+3
* | | Merge branch 'x86/x2apic' into x86/coreIngo Molnar2008-09-051-3/+10
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| * | | x86: use cpuid vector 0xb when available for detecting cpu topologySuresh Siddha2008-08-231-3/+10
* | | | x86: remove cpu_vendor_devYinghai Lu2008-09-041-1/+2
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* | | x86: move cmpxchg fallbacks to a generic placeThomas Petazzoni2008-08-181-64/+0
* | | x86: make movsl_mask definition non-CPU specificThomas Petazzoni2008-08-181-7/+0
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* | x86: APIC: remove apic_write_around(); use alternativesMaciej W. Rozycki2008-07-181-0/+10
* | x86: fix numaq_tsc_disable callingYinghai Lu2008-07-131-0/+4
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* x86: clean up cpu capabilities in arch/x86/kernel/cpu/intel.cIngo Molnar2008-04-171-7/+7
* x86: coding style fixes to arch/x86/kernel/cpu/intel.cPaolo Ciarrocchi2008-04-171-40/+43
* x86: use ELF section to list CPU vendor specific codeThomas Petazzoni2008-04-171-6/+3
* x86: add include to cpu/intel.cHarvey Harrison2008-02-041-0/+1
* x86: move MWAIT idle check to generic CPU initialization on 32-bitAndi Kleen2008-01-301-1/+0
* x86: move X86_FEATURE_CONSTANT_TSC into early cpu feature detectionAndi Kleen2008-01-301-7/+6
* x86: lfence fixIngo Molnar2008-01-301-1/+1
* x86: Implement support to synchronize RDTSC with LFENCE on Intel CPUsAndi Kleen2008-01-301-1/+2
* x86, ptrace: support for branch trace store(BTS)Markus Metzger2008-01-301-0/+5
* x86: fall back on interrupt disable in cmpxchg8b on 80386 and 80486Mathieu Desnoyers2008-01-301-0/+17
* i386: fix section mismatch warning in intel.cSam Ravnborg2007-10-171-2/+15
* i386: move kernel/cpuThomas Gleixner2007-10-111-0/+333
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