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path: root/arch/sparc/crypto/aes_glue.c
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* crypto: algapi - make crypto_xor() take separate dst and src argumentsArd Biesheuvel2017-08-041-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | There are quite a number of occurrences in the kernel of the pattern if (dst != src) memcpy(dst, src, walk.total % AES_BLOCK_SIZE); crypto_xor(dst, final, walk.total % AES_BLOCK_SIZE); or crypto_xor(keystream, src, nbytes); memcpy(dst, keystream, nbytes); where crypto_xor() is preceded or followed by a memcpy() invocation that is only there because crypto_xor() uses its output parameter as one of the inputs. To avoid having to add new instances of this pattern in the arm64 code, which will be refactored to implement non-SIMD fallbacks, add an alternative implementation called crypto_xor_cpy(), taking separate input and output arguments. This removes the need for the separate memcpy(). Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: sparc - initialize blkcipher.ivsizeDave Kleikamp2015-10-081-0/+2
| | | | | | | | | Some of the crypto algorithms write to the initialization vector, but no space has been allocated for it. This clobbers adjacent memory. Cc: stable@vger.kernel.org Signed-off-by: Dave Kleikamp <dave.kleikamp@oracle.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: sparc64/aes - fix module descriptionMathias Krause2015-01-131-1/+1
| | | | | | | | | AES is a block cipher, not a hash. Cc: David S. Miller <davem@davemloft.net> Signed-off-by: Mathias Krause <minipli@googlemail.com> Acked-by: David S. Miller <davem@davemloft.net> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: prefix module autoloading with "crypto-"Kees Cook2014-11-241-1/+1
| | | | | | | | | | | This prefixes all crypto module loading with "crypto-" so we never run the risk of exposing module auto-loading to userspace via a crypto API, as demonstrated by Mathias Krause: https://lkml.org/lkml/2013/3/4/70 Signed-off-by: Kees Cook <keescook@chromium.org> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* sparc64: fix sparse warnings in aes_glue.cSam Ravnborg2014-05-181-3/+3
| | | | | | | | | | | | Fix following warnings: aes_glue.c:127:16: warning: symbol 'aes128_ops' was not declared. Should it be static? aes_glue.c:139:16: warning: symbol 'aes192_ops' was not declared. Should it be static? aes_glue.c:151:16: warning: symbol 'aes256_ops' was not declared. Should it be static? Fix by defining the variables static as they are not used outside this file Signed-off-by: Sam Ravnborg <sam@ravnborg.org> Signed-off-by: David S. Miller <davem@davemloft.net>
* sparc64: Set CRYPTO_TFM_REQ_MAY_SLEEP consistently in AES code.David S. Miller2012-12-191-0/+4
| | | | | | | We use the FPU and therefore cannot sleep during the crypto loops. Signed-off-by: David S. Miller <davem@davemloft.net>
* sparc64: Fix AES ctr mode block size.David S. Miller2012-12-191-3/+24
| | | | | | | | | | Like the generic versions, we need to support a block size of '1' for CTR mode AES. This was discovered thanks to all of the new test cases added by Jussi Kivilinna. Signed-off-by: David S. Miller <davem@davemloft.net>
* sparc64: Fix build with mix of modular vs. non-modular crypto drivers.David S. Miller2012-11-091-0/+2
| | | | | | | | | | | | We tried linking in a single built object to hold the device table, but only works if all of the sparc64 crypto modules get built the same way (modular vs. non-modular). Just include the device ID stub into each driver source file so that the table gets compiled into the correct result in all cases. Reported-by: Meelis Roos <mroos@linux.ee> Signed-off-by: David S. Miller <davem@davemloft.net>
* sparc64: Add missing pr_fmt define to crypto opcode drivers.David S. Miller2012-09-151-0/+2
| | | | | | | The hashes and crc32c had it, only the AES/DES/CAMELLIA drivers were missing it. Signed-off-by: David S. Miller <davem@davemloft.net>
* sparc64: Adjust crypto priorities.David S. Miller2012-09-151-4/+6
| | | | | | | | | | Make the crypto opcode implementations have a higher priority than those provides by the ring buffer based Niagara crypto device. Also, several crypto opcode hashes were not setting the priority value at all. Signed-off-by: David S. Miller <davem@davemloft.net>
* sparc64: Add ctr mode support to AES driver.David S. Miller2012-08-291-0/+62
| | | | Signed-off-by: David S. Miller <davem@davemloft.net>
* sparc64: Move AES driver over to a methods based implementation.David S. Miller2012-08-291-49/+137
| | | | | | | | | | | | Instead of testing and branching off of the key size on every encrypt/decrypt call, use method ops assigned at key set time. Reverse the order of float registers used for decryption to make future changes easier. Align all assembler routines on a 32-byte boundary. Signed-off-by: David S. Miller <davem@davemloft.net>
* sparc64: Add AES driver making use of the new aes opcodes.David S. Miller2012-08-221-0/+323
Signed-off-by: David S. Miller <davem@davemloft.net> Acked-by: Herbert Xu <herbert@gondor.apana.org.au>
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