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* sh: Mass ctrl_in/outX to __raw_read/writeX conversion.Paul Mundt2010-01-267-20/+20
| | | | | | | | | | | The old ctrl in/out routines are non-portable and unsuitable for cross-platform use. While drivers/sh has already been sanitized, there is still quite a lot of code that is not. This converts the arch/sh/ bits over, which permits us to flag the routines as deprecated whilst still building with -Werror for the architecture code, and to ensure that future users are not added. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Handle SH-4 FPU variants with broken CVR values.Paul Mundt2010-01-201-2/+3
| | | | | | | | | Usually we can look to the CVR to work out whether we have an FPU or not. Unfortunately not all parts comply with this, so just set the flag manually for all SH-4 parts and clear it on the only SH-4 that doesn't have one (SH4-501). Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Fix up L2 cache comment typo.Paul Mundt2010-01-131-1/+1
| | | | | | Valid sizes include 256kB, not 258kB. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: PVR detection for 2nd cut SH7786.Matt Fleming2010-01-131-0/+1
| | | | | | | The mass produced cuts use an updated PVR value, add them to the list. Signed-off-by: Matt Fleming <matt@console-pimps.org> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Move over to dynamically allocated FPU context.Paul Mundt2010-01-131-120/+39
| | | | | | | | | | | | | | | | | | | | | This follows the x86 xstate changes and implements a task_xstate slab cache that is dynamically sized to match one of hard FP/soft FP/FPU-less. This also tidies up and consolidates some of the SH-2A/SH-4 FPU fragmentation. Now fpu state restorers are commonly defined, with the init_fpu()/fpu_init() mess reworked to follow the x86 convention. The fpu_init() register initialization has been replaced by xstate setup followed by writing out to hardware via the standard restore path. As init_fpu() now performs a slab allocation a secondary lighterweight restorer is also introduced for the context switch. In the future the DSP state will be rolled in here, too. More work remains for math emulation and the SH-5 FPU, which presently uses its own special (UP-only) interfaces. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: sh4 scif pdata (sh7750/sh7760/sh4-202)Magnus Damm2009-12-153-61/+98
| | | | | | | | | | | | | This patch breaks out the sh4 scif serial port platform data from a shared platform device to one platform device per port. Also, add serial ports to the list of early platform devices. While at it, get rid of the R2D ifdef in the processor code and adjust the defconfigs to use ttySC1. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Minor optimisations to FPU handlingStuart Menefy2009-11-241-8/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | A number of small optimisations to FPU handling, in particular: - move the task USEDFPU flag from the thread_info flags field (which is accessed asynchronously to the thread) to a new status field, which is only accessed by the thread itself. This allows locking to be removed in most cases, or can be reduced to a preempt_lock(). This mimics the i386 behaviour. - move the modification of regs->sr and thread_info->status flags out of save_fpu() to __unlazy_fpu(). This gives the compiler a better chance to optimise things, as well as making save_fpu() symmetrical with restore_fpu() and init_fpu(). - implement prepare_to_copy(), so that when creating a thread, we can unlazy the FPU prior to copying the thread data structures. Also make sure that the FPU is disabled while in the kernel, in particular while booting, and for newly created kernel threads, In a very artificial benchmark, the execution time for 2500000 context switches was reduced from 50 to 45 seconds. Signed-off-by: Stuart Menefy <stuart.menefy@st.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* Merge branch 'master' into sh/st-integrationPaul Mundt2009-11-242-1/+260
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| * sh: Fix up the CONFIG_PERF_EVENTS=n build for SH-4.Paul Mundt2009-11-121-4/+5
| | | | | | | | Signed-off-by: Paul Mundt <lethal@linux-sh.org>
| * sh: perf events: Add support for SH7750-style counters.Paul Mundt2009-11-052-0/+258
| | | | | | | | | | | | | | This adds perf events support for the SH7750/SH7750S/SH7091 performance counters. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* | sh: add sleazy FPU optimizationGiuseppe CAVALLARO2009-11-241-4/+12
|/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | sh port of the sLeAZY-fpu feature currently implemented for some architectures such us i386. Right now the SH kernel has a 100% lazy fpu behaviour. This is of course great for applications that have very sporadic or no FPU use. However for very frequent FPU users... you take an extra trap every context switch. The patch below adds a simple heuristic to this code: after 5 consecutive context switches of FPU use, the lazy behavior is disabled and the context gets restored every context switch. After 256 switches, this is reset and the 100% lazy behavior is returned. Tests with LMbench showed no regression. I saw a little improvement due to the prefetching (~2%). The tests below also show that, with this sLeazy patch, indeed, the number of FPU exceptions is reduced. To test this. I hacked the lat_ctx LMBench to use the FPU a little more. sLeasy implementation =========================================== switch_to calls | 79326 sleasy calls | 42577 do_fpu_state_restore calls| 59232 restore_fpu calls | 59032 Exceptions: 0x800 (FPU disabled ): 16604 100% Leazy (default implementation) =========================================== switch_to calls | 79690 do_fpu_state_restore calls | 53299 restore_fpu calls | 53101 Exceptions: 0x800 (FPU disabled ): 53273 Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com> Signed-off-by: Stuart Menefy <stuart.menefy@st.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* Merge branch 'master' into sh/smpPaul Mundt2009-09-011-2/+9
|\ | | | | | | | | Conflicts: arch/sh/mm/cache-sh4.c
| * sh: fix CPU_SH7723/7724 numbering bugKuninori Morimoto2009-08-271-1/+1
| | | | | | | | | | Signed-off-by: Kuninori Morimoto <morimoto.kuninori@renesas.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
| * sh: Add initial support for SH7757 CPU subtypeYoshihiro Shimoda2009-08-211-2/+9
| | | | | | | | | | Signed-off-by: Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* | sh: Kill off the unhandled pvr case in SH-4 CPU probing.Paul Mundt2009-08-151-3/+0
| | | | | | | | | | | | | | | | | | | | This is superfluous, as the default CPU type and family are already established by the initial cpuinfo definition. Given that we are still able to probe for the CPU family even if we are not able to detect the subtype, it's preferable to let the probing code fill out what it can and leave the rest. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* | sh: Track the CPU family in sh_cpuinfo.Paul Mundt2009-08-151-2/+7
|/ | | | | | | | | | This adds a family member to struct sh_cpuinfo, which allows us to fall back more on the probe routines to work out what sort of subtype we are running on. This will be used by the CPU cache initialization code in order to first do family-level initialization, followed by subtype-level optimizations. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: convert processor device setup functions to arch_initcall()Magnus Damm2009-07-233-3/+3
| | | | | | | | | | | | | | | | | | Convert the processor platform device setup functions from __initcall() and sometimes device_initcall() to arch_initcall(). This makes sure that the platform devices are registered a bit earlier so the devices are available when drivers register using initcall levels earlier than device_initcall(). A good example is platform devices needed by i2c-sh_mobile.c which registers a bit earlier using subsys_initcall(). Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Tidy up SH-4A boot_cpu_data.flags probing.Paul Mundt2009-06-011-46/+15
| | | | | | | | | | | This tidies up the boot_cpu_data.flags probing on SH-4A. All of them have a few things in common, which we can blindly set, rather than having each subtype have to set the same flags. We can also make assumptions about cache ways and the validity of PTEA, so this also kills off CPU_HAS_PTEA as a config option. There was also a bug in the FPU probing, which is now tidied up. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Tidy up the optional L2 probing, wire it up for SH7786.Paul Mundt2009-06-011-28/+33
| | | | | | | | | This tidies up the L2 probing, as it may or may not be implemented on a CPU, regardless of whether it is supported. This converts the cvr validity checks from BUG_ON()'s to simply clearing the CPU_HAS_L2_CACHE flag and moving on with life. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: SH7724 has an L2 cache.Kuninori Morimoto2009-06-011-1/+1
| | | | | | | Add the CPU_HAS_L2_CACHE flag to SH7724. Signed-off-by: Kuninori Morimoto <morimoto.kuninori@renesas.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: clkfwk: Rework legacy CPG clock handling.Paul Mundt2009-05-131-1/+4
| | | | | | | | | This moves out the old legacy CPG clocks to their own file, and converts over the existing users. With these clocks going away and each CPU dealing with them on their own, CPUs can gradually move over to the new interface. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: clkfwk: module_clk -> peripheral_clk rename.Paul Mundt2009-05-133-11/+11
| | | | | | | For consistenct naming, and to allow us to fix up some confusion in the SH-Mobile clock framework, amongst other places. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* Merge branch 'master' into sh/clkfwkPaul Mundt2009-05-121-1/+163
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| * sh: add sh4-202 INTC tablesMagnus Damm2009-05-121-1/+55
| | | | | | | | | | | | | | | | This patch adds INTC tables for sh4-202 with support for HUDI, TMU0, TMU1, TMU2, RTC, SCIF and WDT. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
| * sh: TMU platform data for sh4-202Magnus Damm2009-05-121-0/+108
| | | | | | | | | | | | | | | | This patch adds TMU platform data for sh4-202. Both clockevent and clocksource support is enabled. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* | sh: clkfwk: Use arch_clk_init() for on-chip clock registration.Paul Mundt2009-05-121-2/+1
| | | | | | | | | | | | | | | | | | | | | | CPUs registering on-chip clocks should be using arch_clk_init() with the new scheme so that the CPUs have the opportunity to establish the topology prior to the initial root clock rate propagation. This ensures that CPUs with on-chip clocks that use CLK_ENABLE_ON_INIT are properly enabled at the initial propagation time, without having to further poke the root clocks. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* | sh: clkfwk: Tidy up on-chip clock registration and rate propagation.Paul Mundt2009-05-121-15/+4
| | | | | | | | | | | | | | | | | | | | | | This tidies up the set_rate hack that the on-chip clocks were abusing to trigger rate propagation, which is now handled generically. Additionally, now that CLK_ENABLE_ON_INIT is wired up where it needs to be for these clocks, the clk_enable() can go away. In some cases this was bumping up the refcount higher than it should have been. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* | sh: clkfwk: Consolidate the ALWAYS_ENABLED / NEEDS_INIT mess.Paul Mundt2009-05-121-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There is no real distinction here in behaviour, either a clock needs to be enabled on initialiation or not. The ALWAYS_ENABLED flag was always intended to only apply to clocks that were physically always on and could simply not be disabled at all from software. Unfortunately over time this was abused and the meaning became a bit blurry. So, we kill off both of all of those paths now, as well as the newer NEEDS_INIT flag, and consolidate on a CLK_ENABLE_ON_INIT. Clocks that need to be enabled on initialization can set this, and it will purposely enable them and bump the refcount up. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* | sh: clkfwk: Make recalc return an unsigned long.Paul Mundt2009-05-122-13/+13
|/ | | | | | | This is prep work for cleaning up some of the rate propagation bits. Trivial conversion. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: multiple vectors per irq - sh7760Magnus Damm2009-05-111-20/+11
| | | | | | | | | | | | Update intc tables and platform data to use one linux irq per maskable interrupt source instead of keeping the one-to-one mapping between vectors and linux irqs. This fixes potential irq masking issues for sh7760 hardware blocks such as DMAC/TMU2/REF. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: TMU platform data for sh7760Magnus Damm2009-05-111-0/+109
| | | | | | | | This patch adds TMU platform data for sh7760. Both clockevent and clocksource support is enabled. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: TMU platform data for sh775xMagnus Damm2009-05-111-0/+187
| | | | | | | | This patch adds TMU platform data for sh775x. Both clockevent and clocksource support is enabled. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Add support for SH7724 (SH-Mobile R2R) CPU subtype.Kuninori Morimoto2009-04-161-0/+6
| | | | | | | | This implements initial support for the SH-Mobile R2R CPU. Based on Rev 0.11 of the initial SH7724 hardware manual. Signed-off-by: Kuninori Morimoto <morimoto.kuninori@renesas.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Kill off broken direct-mapped cache mode.Paul Mundt2009-04-021-5/+0
| | | | | | | | | | Forcing direct-mapped worked on certain older 2-way set associative parts, but was always error prone on 4-way parts. As these are the norm these days, there is not much point in continuing to support this mode. Most of the folks that used direct-mapped mode generally just wanted writethrough caching in the first place.. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Support for extended ASIDs on PTEAEX-capable SH-X3 cores.Paul Mundt2009-03-171-1/+1
| | | | | | | | | | | | | | | | | | | | This adds support for extended ASIDs (up to 16-bits) on newer SH-X3 cores that implement the PTAEX register and respective functionality. Presently only the 65nm SH7786 (90nm only supports legacy 8-bit ASIDs). The main change is in how the PTE is written out when loading the entry in to the TLB, as well as in how the TLB entry is selectively flushed. While SH-X2 extended mode splits out the memory-mapped U and I-TLB data arrays for extra bits, extended ASID mode splits out the address arrays. While we don't use the memory-mapped data array access, the address array accesses are necessary for selective TLB flushes, so these are implemented newly and replace the generic SH-4 implementation. With this, TLB flushes in switch_mm() are almost non-existent on newer parts. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: hibernation supportMagnus Damm2009-03-101-0/+1
| | | | | | | | | | | | | | | | | Add Suspend-to-disk / swsusp / CONFIG_HIBERNATION support to the SuperH architecture. To suspend, use "swapon /dev/sda2; echo disk > /sys/power/state" To resume, pass "resume=/dev/sda2" on the kernel command line. The patch "pm: rework includes, remove arch ifdefs V2" is needed to allow the generic swsusp code to build properly. Hibernation is not enabled with this patch though, a patch setting ARCH_HIBERNATION_POSSIBLE will be submitted later. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Add support for SH7786 CPU subtype.Kuninori Morimoto2009-03-031-0/+7
| | | | | | | | | | | | | | This adds preliminary support for the SH7786 CPU subtype. While this is a dual-core CPU, only UP is supported for now. L2 cache support is likewise not yet implemented. More information on this particular CPU subtype is available at: http://www.renesas.com/fmwk.jsp?cnt=sh7786_root.jsp&fp=/products/mpumcu/superh_family/sh7780_series/sh7786_group/ Signed-off-by: Kuninori Morimoto <morimoto.kuninori@renesas.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: multiple vectors per irq - sh7750Magnus Damm2009-02-271-62/+25
| | | | | | | | | | | | Update intc tables and platform data to use one linux irq per maskable interrupt source instead of keeping the one-to-one mapping between vectors and linux irqs. This fixes potential irq masking issues for sh775x hardware blocks such as SCI/SCIF/RTC/DMAC/TMU2/REF. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: fcnvds fix with denormalized numbers on SH-4 FPU.Carmelo AMOROSO2009-01-291-1/+1
| | | | | | | | | | | | | | | This fixes a bug in the FPU exception handler for the FCNVDS instruction. To get the register number the instruction is shifted right by 9, though it should be shifted right by 8. More information at ST Linux bugzilla: https://bugzilla.stlinux.com/show_bug.cgi?id=4892 Signed-off-by: Giuseppe Di Giore <giuseppe.di-giore@st.com> Signed-off-by: Carmelo Amoroso <carmelo.amoroso@st.com> Signed-off-by: Stuart Menefy <stuart.menefy@st.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: __udivdi3 -> do_div() in softfloat lib.Paul Mundt2008-12-221-32/+41
| | | | | | | Inhibit the generation of __udivdi3 for the softfloat lib, use do_div() outright. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Enable IRLM mode for SH7760 IRQ_MODE_IRQ.Luca Santini2008-09-081-0/+5
| | | | | | | Follows the same setting as SH7750. Signed-off-by: Luca Santini <luca.santini@spesonline.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Subnormal double to float conversionCarl Shaw2008-09-082-1/+53
| | | | | | | | | This patch adds support for the SH4 to convert a subnormal double into a float by catching the FPE and implementing the FCNVDS instruction in software. Signed-off-by: Carl Shaw <carl.shaw@st.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Fix up broken kerneldoc comments.Paul Mundt2008-08-041-1/+1
| | | | | | These were completely unparseable, so fix them up. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: migrate to arch/sh/include/Paul Mundt2008-07-293-3/+3
| | | | | | | | | | | | | This follows the sparc changes a439fe51a1f8eb087c22dd24d69cebae4a3addac. Most of the moving about was done with Sam's directions at: http://marc.info/?l=linux-sh&m=121724823706062&w=2 with subsequent hacking and fixups entirely my fault. Signed-off-by: Sam Ravnborg <sam@ravnborg.org> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Record the major cut revision for probed SH-4A parts.Paul Mundt2008-07-281-4/+5
| | | | Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Stub in silicon cut in CPU info.Stuart Menefy2008-07-281-0/+3
| | | | | Signed-off-by: Stuart Menefy <stuart.menefy@st.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: add probe support for new sh7723 cutMagnus Damm2008-05-231-0/+1
| | | | | | | This patch adds support for sh7723 silicon with a prr value of 0x51. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Fix up L2 cache probe.Paul Mundt2008-04-181-0/+6
| | | | | | | | SH7723 is the first hard silicon to implement the L2, and unsurprisingly, does the precise inverse of what the specification alleges. XOR the URAM/L2 size bits to get back in line with the existing parsing logic. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Fix up SH-4A part probe.Paul Mundt2008-04-181-1/+1
| | | | | | | | | The SH-4A series probe we were relying on doesn't work any more on the newer parts, bump this up to use CVR.CHIP instead so we have consistent behaviour across all of the parts, which is what this should have been testing in the first place. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Add support for SH7723 CPU subtype.Paul Mundt2008-04-181-10/+15
| | | | | | This adds basic support for the SH7723 MobileR2 CPU. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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