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* sh: Mass ctrl_in/outX to __raw_read/writeX conversion.Paul Mundt2010-01-263-11/+11
| | | | | | | | | | | The old ctrl in/out routines are non-portable and unsuitable for cross-platform use. While drivers/sh has already been sanitized, there is still quite a lot of code that is not. This converts the arch/sh/ bits over, which permits us to flag the routines as deprecated whilst still building with -Werror for the architecture code, and to ensure that future users are not added. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Move over to dynamically allocated FPU context.Paul Mundt2010-01-131-88/+23
| | | | | | | | | | | | | | | | | | | | | This follows the x86 xstate changes and implements a task_xstate slab cache that is dynamically sized to match one of hard FP/soft FP/FPU-less. This also tidies up and consolidates some of the SH-2A/SH-4 FPU fragmentation. Now fpu state restorers are commonly defined, with the init_fpu()/fpu_init() mess reworked to follow the x86 convention. The fpu_init() register initialization has been replaced by xstate setup followed by writing out to hardware via the standard restore path. As init_fpu() now performs a slab allocation a secondary lighterweight restorer is also introduced for the context switch. In the future the DSP state will be rolled in here, too. More work remains for math emulation and the SH-5 FPU, which presently uses its own special (UP-only) interfaces. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: sh2a scif pdata (sh7201/sh7203/sh7206/mxg)Magnus Damm2009-12-154-119/+263
| | | | | | | | | | This patch breaks out the sh2a scif serial port platform data from a shared platform device to one platform device per port. Also, add serial ports to the list of early platform devices. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Apply the sleazy FPU changes for SH-2A FPU as well.Paul Mundt2009-11-241-4/+12
| | | | | | This plugs in the fpu_counter manipulation for the SH-2A side also. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Minor optimisations to FPU handlingStuart Menefy2009-11-241-7/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | A number of small optimisations to FPU handling, in particular: - move the task USEDFPU flag from the thread_info flags field (which is accessed asynchronously to the thread) to a new status field, which is only accessed by the thread itself. This allows locking to be removed in most cases, or can be reduced to a preempt_lock(). This mimics the i386 behaviour. - move the modification of regs->sr and thread_info->status flags out of save_fpu() to __unlazy_fpu(). This gives the compiler a better chance to optimise things, as well as making save_fpu() symmetrical with restore_fpu() and init_fpu(). - implement prepare_to_copy(), so that when creating a thread, we can unlazy the FPU prior to copying the thread data structures. Also make sure that the FPU is disabled while in the kernel, in particular while booting, and for newly created kernel threads, In a very artificial benchmark, the execution time for 2500000 context switches was reduced from 50 to 45 seconds. Signed-off-by: Stuart Menefy <stuart.menefy@st.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* Merge branch 'master' into sh/cachetlbPaul Mundt2009-08-191-1/+2
|\ | | | | | | | | Conflicts: arch/sh/kernel/Makefile_64
| * sh: Make sure rte delay slots are nopped out on all parts.Paul Mundt2009-08-151-1/+2
| | | | | | | | | | | | | | | | | | Future SH parts do not support any instruction but a nop in the rte delay slot, so make the change for all offending parts. SH-5 is excluded from this, and already has its own set of restrictions with regards to rte delay slot handling. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* | sh: Track the CPU family in sh_cpuinfo.Paul Mundt2009-08-151-0/+2
|/ | | | | | | | | | This adds a family member to struct sh_cpuinfo, which allows us to fall back more on the probe routines to work out what sort of subtype we are running on. This will be used by the CPU cache initialization code in order to first do family-level initialization, followed by subtype-level optimizations. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: convert processor device setup functions to arch_initcall()Magnus Damm2009-07-234-4/+4
| | | | | | | | | | | | | | | | | | Convert the processor platform device setup functions from __initcall() and sometimes device_initcall() to arch_initcall(). This makes sure that the platform devices are registered a bit earlier so the devices are available when drivers register using initcall levels earlier than device_initcall(). A good example is platform devices needed by i2c-sh_mobile.c which registers a bit earlier using subsys_initcall(). Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: clkfwk: module_clk -> peripheral_clk rename.Paul Mundt2009-05-134-15/+15
| | | | | | | For consistenct naming, and to allow us to fix up some confusion in the SH-Mobile clock framework, amongst other places. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: clkfwk: Add a followparent_recalc() helper.Paul Mundt2009-05-121-6/+1
| | | | | | | | This adds a followparent_recalc() helper for clocks that just follow the parent's rate. Switch over the few CPUs that use this scheme for some of their clocks. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: clkfwk: Make recalc return an unsigned long.Paul Mundt2009-05-123-19/+19
| | | | | | | This is prep work for cleaning up some of the rate propagation bits. Trivial conversion. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Consolidate MTU2/CMT/TMU timer platform data.Paul Mundt2009-05-034-21/+19
| | | | | | | | | All of the SH timers use a roughly identical structure for platform data, which presently is broken out for each block. Consolidate all of these definitions, as there is no reason for them to be broken out in the first place. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: sh2a MTU2 platform dataMagnus Damm2009-05-034-1/+400
| | | | | | | | | | | This patch adds MTU2 platform data for the following cpus: - sh7201 (3/5 channels) - sh7203/sh7263 (2/4 channels) - sh7206 (3/5 channels) - MXG (3/5 channels) Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: sh2/sh2a 16-bit CMT platform dataMagnus Damm2009-04-302-0/+168
| | | | | | | | | | This patch adds 16-bit cmt platform data for the following cpus: - sh7619 (2 channels) - sh7203/sh7263 (2 channels) - sh7206 (2 channels) Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: multiple vectors per irq - mxg.Paul Mundt2009-03-061-42/+23
| | | | Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: multiple vectors per irq - sh7206.Paul Mundt2009-03-061-96/+58
| | | | Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: multiple vectors per irq - sh7201.Paul Mundt2009-03-061-144/+80
| | | | | | Follow the conversions as per the other subtypes. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: multiple vectors per irq - sh7263.Paul Mundt2009-03-061-19/+10
| | | | | | Convert over the SH7263 IRQ groups as well. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: multiple vectors per irq - sh7203.Paul Mundt2009-03-061-140/+73
| | | | | | Follow the conversions as per the other subtypes. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Storage class should be before const qualifierTobias Klauser2009-02-121-2/+2
| | | | | | | | | | | The C99 specification states in section 6.11.5: The placement of a storage-class specifier other than at the beginning of the declaration specifiers in a declaration is an obsolescent feature. Signed-off-by: Tobias Klauser <tklauser@distanz.ch> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Add support for SH7201 CPU subtype.Peter Griffin2008-12-224-4/+422
| | | | | | | This patch adds support for the SH-2A FPU based SH7201 processor subtype. Signed-off-by: Peter Griffin <pgriffin@mpc-data.co.uk> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: improve pinmux support for single direction pinsMagnus Damm2008-10-221-22/+21
| | | | | | | | | | This patch improves the support for gpio pins that are hard wired to either input or output and lack control register association. A special force enum id is used to allow use without control register but still mark the gpio pin as input or output. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Hook up PB0->PB7 input-only pins in SH7203 PFC.Paul Mundt2008-10-211-9/+8
| | | | Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Fix up the SH7203 build.Paul Mundt2008-10-211-1/+1
| | | | | | | The sh7203.h include paths were missed in the previous update, so switch the include path to cpu/ as with the rest. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Add sh7203 pinmux codeMagnus Damm2008-10-202-0/+1604
| | | | | | | This patch adds pinmux and gpio support for the sh7203 processor. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: migrate to arch/sh/include/Paul Mundt2008-07-291-1/+1
| | | | | | | | | | | | | This follows the sparc changes a439fe51a1f8eb087c22dd24d69cebae4a3addac. Most of the moving about was done with Sam's directions at: http://marc.info/?l=linux-sh&m=121724823706062&w=2 with subsequent hacking and fixups entirely my fault. Signed-off-by: Sam Ravnborg <sam@ravnborg.org> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh2(A) exception handler updateYoshinori Sato2008-07-283-1/+322
| | | | | | | | | | | | | | | | This patch is By sh2 - Remove duplicate code - Reduce stack usage - Cleanup and little optimize By sh2a - Add missing handler(256 to 511) - Use sh2a instructions handler Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* SH: catch negative denormal_subf1() retval in denormal_add()Roel Kluin2008-05-091-2/+2
| | | | | | | 'ix' is unsigned but denormal_subf1() may return a negative int. Signed-off-by: Roel Kluin <12o3l@tiscali.nl> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Initial support for the MX-G CPU.Paul Mundt2008-04-183-3/+175
| | | | Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Fix occasional FPU register corruption under preempt.Paul Mundt2008-03-261-0/+1
| | | | | | | | | | | Presently with preempt enabled there's the possibility to be preempted after the TIF_USEDFPU test and the register save, leading to bogus state post-__switch_to(). Use an explicit preempt_disable()/enable() pair around unlazy_fpu()/clear_fpu() to avoid this. Follows the x86 change. Reported-by: Takuo Koguchi <takuo.koguchi.sw@hitachi.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* serial: Move asm-sh/sci.h to linux/serial_sci.h.Paul Mundt2008-02-262-2/+2
| | | | | | | | | | | | This header is needed on other architectures as well (namely h8300), which currently fails to build without this in place. Rather than duplicating the port definition completely there, just move this to a common location instead. This should get h8300 working again for 2.6.25, in addition to the changes already pushed by Sato-san in -rc2. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Storage class should be before const qualifierTobias Klauser2008-02-261-2/+2
| | | | | | | | | | | The C99 specification states in section 6.11.5: The placement of a storage-class specifier other than at the beginning of the declaration specifiers in a declaration is an obsolescent feature. Signed-off-by: Tobias Klauser <tklauser@distanz.ch> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: intc - remove default interrupt priority tablesMagnus Damm2008-01-282-2/+2
| | | | | | | | | | | | | This patch removes interrupt priority tables from the intc code. Optimal priority assignment varies with embedded application anyway, so keeping the interrupt priority tables together with cpu-specific code doesn't make sense. The function intc_set_priority() should be used instead to set the desired interrupt priority level. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: SH-2A FPU support.Paul Mundt2008-01-282-0/+635
| | | | | Signed-off-by: Kieran Bingham <kbingham@mpc-data.co.uk> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Add SH7263 CPU support.Paul Mundt2008-01-283-2/+44
| | | | | | | | | | | | This adds support for the SH7263 (SH-2A) CPU. This particular CPU is a superset of SH7203, adding some additional peripheral blocks and hooking up additional (reserved on SH7203) vectors in the INTC block. No visibly nasty surprises, yet.. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Add SH7203 CPU support.Paul Mundt2008-01-284-6/+384
| | | | | | | This adds support for the SH7203 (SH-2A) CPU. Signed-off-by: Kieran Bingham <kbingham@mpc-data.co.uk> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Use boot_cpu_data for CPU probe.Paul Mundt2007-09-271-9/+9
| | | | | | | | | | This moves off of smp_processor_id() and only sets the probe information for the boot CPU directly. This will be copied out for the secondaries, so there's no reason to do this each time. This also allows for some header tidying. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: intc - add support for sh7206Magnus Damm2007-09-211-51/+158
| | | | | | | | | This patch converts the cpu specific interrupt setup code for sh7206 from ipr to intc. New vectors are also added to match the information provided by the datasheet. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: fix irqs for the second serial port on sh7206Magnus Damm2007-09-211-4/+4
| | | | | | | | | This patch makes sure the serial port interrupt irqs matches the datasheet. Only irqs for SCIF1 are changed. While at some cosmetic spaces are added. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: IPR/INTC2 IRQ setup consolidation.Magnus Damm2007-07-201-1/+1
| | | | | | | | | | This patch unifies the cpu specific interrupt setup functions for interrupt controller blocks such as ipr, intc2 and intc. There is no point in having separate functions for each interrupt controller, so let's clean this up. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: rework ipr codeMagnus Damm2007-06-151-10/+14
| | | | | | | | | | | | | | | | | This patch reworks the ipr code by grouping the offset array together with the ipr_data structure in a new data structure called ipr_desc. This new structure also contains the name of the controller in struct irq_chip. The idea behind putting struct irq_chip in there is that we can use offsetof() to locate the base addresses in the irq_chip callbacks. This strategy has much in common with the recently merged intc2 code. One logic change has been made - the original ipr code enabled the interrupts by default but with this patch they are all disabled by default. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Add 32-bit opcode feature CPU flag.Paul Mundt2007-05-091-0/+1
| | | | | | | Add a CPU flag for the CPUs that support 32-bit opcodes, which gets passed down to userspace. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Support for SH-2A 32-bit opcodes.Paul Mundt2007-05-092-3/+57
| | | | | | | | SH-2A supports both 16 and 32-bit instructions, add a simple helper for figuring out the instruction size in the places where there are hardcoded 16-bit assumptions. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* Storage class should be before const qualifierTobias Klauser2007-02-171-2/+2
| | | | | | | | | | | The C99 specification states in section 6.11.5: The placement of a storage-class specifier other than at the beginning of the declaration specifiers in a declaration is an obsolescent feature. Signed-off-by: Tobias Klauser <tklauser@distanz.ch> Signed-off-by: Adrian Bunk <bunk@stusta.de>
* sh: Fixup cpu_data references for the non-boot CPUs.Paul Mundt2007-02-131-8/+8
| | | | | | | There are a lot of bogus cpu_data-> references that only end up working for the boot CPU, convert these to current_cpu_data to fixup SMP. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: sh7619 / sh7206 IPR initialize updateYoshinori Sato2007-02-131-46/+43
| | | | | | | IPR initialize proceduere update. Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: IPR IRQ updates for SH7619/SH7206.Yoshinori Sato2006-12-121-4/+58
| | | | | | | This updates the SH7619 and SH7206 code for the IPR IRQ changes. Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Add support for SH7206 and SH7619 CPU subtypes.Yoshinori Sato2006-12-064-0/+192
This implements initial support for the SH7206 (SH-2A) and SH7619 (SH-2) MMU-less CPUs. Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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