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* sh: Convert SH-2A to new cacheflush interface.Paul Mundt2009-08-151-30/+0
| | | | Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Kill off unused flush_icache_user_range().Paul Mundt2009-08-151-1/+0
| | | | | | | | We use flush_cache_page() outright in copy_to_user_page(), and nothing else needs it, so just kill it off. SH-5 still defines its own version, but that too will go away in the same fashion once it converts over. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: consolidate flush_dcache_mmap_lock/unlock() definitions.Paul Mundt2009-08-151-2/+0
| | | | | | | | All of the flush_dcache_mmap_lock()/flush_dcache_mmap_unlock() definitions are identical across all CPUs, so just provide them generically in asm/cacheflush.h. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Centralize the CPU cache initialization routines.Paul Mundt2009-08-151-1/+0
| | | | | | | | This provides a central point for CPU cache initialization routines. This replaces the antiquated p3_cache_init() method, which the vast majority of CPUs never cared about. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Fix UBC setup and registers for SH2AKieran Bingham2009-05-091-1/+28
| | | | | | Signed-off-by: Kieran Bingham <kieranbingham@gmail.com> Signed-off-by: Peter Griffin <pgriffin@mpc-data.co.uk> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Move the CPU definition headers from asm/ to cpu/.Paul Mundt2008-10-201-0/+143
| | | | Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* SH2(A) cache updateYoshinori Sato2008-08-042-0/+37
| | | | | | | | | Includes: - SH2 (7619) Writeback support. - SH2A cache handling fix. Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* add addrespace definition for sh2a.Takashi Yoshii2008-08-041-0/+10
| | | | | | | | | | | | | | | | | | | Newfile: arch/sh/include/cpu-sh2a/cpu/addrspace.h This file seems had be removed to use fallback (cpu-common/cpu/addrspace.h), but, I'd like to add sh2a specific file here, because 1. the values defined there are not suitable for sh2a. 2. I don't think there is "common" definition for these values. Values are chosen by consideration of followings... P1 is 0. perhaps no question. P2 is from hardware manual, which says no-cache area starts at 20000000. It means that P? space size=20000000. P3 is P2+size since asm/ptrace.h uses P3 as a end of P2. P4 is P3+size since asm/fixup.h uses P4 as a end of P3. Signed-off-by: Takashi YOSHII <yoshii.takashi@renesas.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Provide common CPU headers, prune the SH-2 and SH-2A directories.Paul Mundt2008-07-297-200/+3
| | | | Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: migrate to arch/sh/include/Paul Mundt2008-07-2910-0/+264
This follows the sparc changes a439fe51a1f8eb087c22dd24d69cebae4a3addac. Most of the moving about was done with Sam's directions at: http://marc.info/?l=linux-sh&m=121724823706062&w=2 with subsequent hacking and fixups entirely my fault. Signed-off-by: Sam Ravnborg <sam@ravnborg.org> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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