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* riscv: use NULL instead of a plain 0Luc Van Oostenryck2018-06-072-2/+2
* riscv: there is no <asm/handle_irq.h>Christoph Hellwig2018-04-241-1/+0
* Merge tag 'riscv-for-linus-4.17-mw0' of git://git.kernel.org/pub/scm/linux/ke...Linus Torvalds2018-04-048-234/+806
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| * RISC-V: Fixes to module loadingPalmer Dabbelt2018-04-022-0/+120
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| | * RISC-V: Add definition of relocation typesZong Li2018-04-021-0/+7
| | * RISC-V: Add section of GOT.PLT for kernel moduleZong Li2018-04-021-15/+25
| | * RISC-V: Add sections of PLT and GOT for kernel moduleZong Li2018-04-021-0/+103
| * | RISC-V: Assorted memory model fixesPalmer Dabbelt2018-04-025-234/+630
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| | * | riscv/atomic: Strengthen implementations with fencesAndrea Parri2018-04-022-220/+588
| | * | riscv/spinlock: Strengthen implementations with fencesAndrea Parri2018-04-022-14/+27
| | * | riscv/barrier: Define __smp_{store_release,load_acquire}Andrea Parri2018-04-021-0/+15
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| * | riscv/ftrace: Add DYNAMIC_FTRACE_WITH_REGS supportAlan Kao2018-04-021-0/+1
| * | riscv/ftrace: Add ARCH_SUPPORTS_FTRACE_OPS supportAlan Kao2018-04-021-0/+1
| * | riscv/ftrace: Add dynamic function tracer supportAlan Kao2018-04-021-0/+54
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* | RISC-V: Move to the new GENERIC_IRQ_MULTI_HANDLER handlerPalmer Dabbelt2018-03-141-0/+1
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* riscv/barrier: Define __smp_{mb,rmb,wmb}Andrea Parri2018-02-261-3/+3
* Merge tag 'riscv-for-linus-4.16-merge_window' of git://git.kernel.org/pub/scm...Linus Torvalds2018-02-076-28/+35
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| * riscv: inline set_pgdir into its only callerChristoph Hellwig2018-01-301-11/+6
| * riscv: rename sptbr to satpChristoph Hellwig2018-01-302-8/+13
| * riscv: remove the unused current_pgdir functionChristoph Hellwig2018-01-301-5/+0
| * RISC-V: Limit the scope of TLB shootdownsAndrew Waterman2018-01-301-8/+12
| * riscv: remove unused __ARCH_HAVE_MMU defineTobias Klauser2018-01-301-1/+0
| * riscv/ftrace: Add basic supportAlan Kao2018-01-302-1/+10
* | Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cl...Linus Torvalds2018-02-011-1/+0
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| * | arch: Remove clkdev.h asm-generic from KbuildStephen Boyd2018-01-031-1/+0
* | | Merge tag 'dma-mapping-4.16' of git://git.infradead.org/users/hch/dma-mappingLinus Torvalds2018-01-312-38/+1
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| * | | dma-mapping: provide a generic asm/dma-mapping.hChristoph Hellwig2018-01-152-30/+1
| * | | riscv: remove the unused dma_capable helperChristoph Hellwig2018-01-091-8/+0
* | | | Merge tag 'init_task-20180117' of git://git.kernel.org/pub/scm/linux/kernel/g...Linus Torvalds2018-01-291-2/+0
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| * | | Construct init thread stack in the linker script rather than by unionDavid Howells2018-01-091-2/+0
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* | | riscv: rename SR_* constants to match the specChristoph Hellwig2018-01-073-10/+10
* | | riscv: remove CONFIG_MMU ifdefsChristoph Hellwig2018-01-074-24/+0
* | | RISC-V: Make __NR_riscv_flush_icache visible to userspacePalmer Dabbelt2018-01-073-28/+27
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* | RISC-V: Resurrect smp_mb__after_spinlock()Palmer Dabbelt2017-12-111-0/+19
* | bpf: correct broken uapi for BPF_PROG_TYPE_PERF_EVENT program typeHendrik Brueckner2017-12-051-0/+1
* | RISC-V: Fixes for clean allmodconfig buildPalmer Dabbelt2017-12-016-17/+22
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| * | RISC-V: Add missing includeOlof Johansson2017-11-301-0/+1
| * | RISC-V: Use define for get_cycles like other architecturesOlof Johansson2017-11-301-1/+2
| * | RISC-V: io.h: type fixes for warningsOlof Johansson2017-11-301-7/+9
| * | RISC-V: use RISCV_{INT,SHORT} instead of {INT,SHORT} for asm macrosOlof Johansson2017-11-302-9/+9
| * | RISC-V: use generic serial.hOlof Johansson2017-11-301-0/+1
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* | RISC-V: __io_writes should respect the length argumentPalmer Dabbelt2017-12-011-1/+1
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| * | RISC-V: __io_writes should respect the length argumentPalmer Dabbelt2017-12-011-1/+1
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* | RISC-V: User-Visible ChangesPalmer Dabbelt2017-12-017-30/+140
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| * | RISC-V: Allow userspace to flush the instruction cacheAndrew Waterman2017-11-303-0/+38
| * | RISC-V: Flush I$ when making a dirty page executableAndrew Waterman2017-11-305-30/+102
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* | RISC-V: remove spin_unlock_wait()Palmer Dabbelt2017-11-281-9/+0
* | RISC-V: `sfence.vma` orderes the instruction cachePalmer Dabbelt2017-11-281-1/+4
* | RISC-V: Add READ_ONCE in arch_spin_is_locked()Palmer Dabbelt2017-11-281-1/+1
* | RISC-V: __test_and_op_bit_ord should be strongly orderedPalmer Dabbelt2017-11-281-1/+1
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