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* [POWERPC] Fix a compile warning in powermac/feature.cSegher Boessenkool2007-08-031-2/+4
| | | | | | | ...by using the pci_get API instead of the deprecated old stuff. Signed-off-by: Segher Boessenkool <segher@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] ps3: Fix section mismatch in ps3/setup.cStephen Rothwell2007-08-031-1/+1
| | | | | | | | WARNING: vmlinux.o(.text+0x605d4): Section mismatch: reference to .init.text:.__alloc_bootmem (between '.prealloc' and '.ps3_power_save') Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] spufs: Fix affinity after introduction of node_allowed() callsAndre Detsch2007-08-031-1/+2
| | | | | | | | | | | | | | | | This patch fixes affinity reference point placement, which was not being done in some situations, after the introduction of node_allowed() calls. The previously used parameter, 'ctx', is just the iterator of the previous list_for_each_entry_reverse loop, and its value might be invalid at the end of the loop. Also, the right context to seek for information when defining the reference ctx location _is_ the reference ctx. Signed-off-by: Andre Detsch <adetsch@br.ibm.com> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com> Signed-off-by: Jeremy Kerr <jk@ozlabs.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] spusched: Fix initial timeslice calculationChristoph Hellwig2007-07-262-1/+6
| | | | | | | | | | | | | | | | Currently we calculate the first timeslice for every context incorrectly - alloc_spu_context calls spu_set_timeslice before we set ctx->prio so we always calculate the longest possible timeslice for the lowest possible priority. This patch makes sure to update the schedule-related fields before calculating the timeslice and also makes sure we update the timeslice for a non-running context when entering spu_run so a priority change affects the context as soon as possible. Signed-off-by: Christoph Hellwig <hch@lst.de> Signed-off-by: Jeremy Kerr <jk@ozlabs.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] spufs: Fix incorrect initialization of cbe_spu_info.spusMasato Noguchi2007-07-261-4/+0
| | | | | | | | | | | | | We currently initialize cbe_spu_info[].spus in both init_spu_base and spu_sched_init. The initialise in spu_sched_init clears the SPU list, so we end up with no physical SPUs. Because of this, the spu_run syscall will block forever. This change removes the unnecessary initialization in spu_sched_init. Signed-off-by: Masato Noguchi <Masato.Noguchi@jp.sony.com> Signed-off-by: Jeremy Kerr <jk@ozlabs.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] Fix Maple platform ISA busBenjamin Herrenschmidt2007-07-261-0/+3
| | | | | | | | | | The Maple platform has ISA IOs but didn't call the new functions to actually map those, thus crashing when trying to access the nvram. This fixes Maple and JS2x using SLOF. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
* [POWERPC] iSeries: Fix section mismatch warning in lpeventsStephen Rothwell2007-07-261-1/+1
| | | | | | | | | | WARNING: vmlinux.o(.text+0x4f568): Section mismatch: reference to .init.text:.__alloc_bootmem (between '.setup_hvlpevent_queue' and '.process_hvlpevents') setup_hvlpevent_queue is only called from __init code so make it __init as well. Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: Paul Mackerras <paulus@samba.org>
* Merge branch 'for_paulus' of ↵Linus Torvalds2007-07-2417-374/+378
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | master.kernel.org:/pub/scm/linux/kernel/git/galak/powerpc * 'for_paulus' of master.kernel.org:/pub/scm/linux/kernel/git/galak/powerpc: (25 commits) [POWERPC] 85xx: Added needed MPC85xx PCI device IDs [POWERPC] Add Freescale PCI VENDOR ID and 8641 device IDs [POWERPC] 85xxCDS: MPC8548 DTS cleanup. [POWERPC] 85xxCDS: Misc 8548 PCI Corrections. [POWERPC] 85xxCDS: Delay 8259 cascade hookup. [POWERPC] 85xxCDS: Make sure restart resets the PCI bus. [POWERPC] 85xxCDS: Allow 8259 cascade to share an MPIC interrupt line. [POWERPC] FSL: Add support for PCI-X controllers [POWERPC] Make sure virtual P2P bridge registers are setup on PCIe PHB [POWERPC] Provide ability to setup P2P bridge registers from struct resource [POWERPC] Add basic PCI/PCI Express support for 8544DS board [POWERPC] Make endianess of cfg_addr for indirect pci ops runtime [POWERPC] Removed setup_indirect_pci_nomap [POWERPC] 85xx: Add quirk to ignore bogus FPGA on CDS [POWERPC] 85xx: Added 8568 PCIe support [POWERPC] Fixup resources on pci_bus for PCIe PHB when no device is connected [POWERPC] Add basic PCI node for mpc8568mds board [POWERPC] Use Freescale pci/pcie common code for 85xx boards [POWERPC] Update PCI nodes in the 83xx/85xx boards device tree [POWERPC] Add 8548 CDS PCI express controller node and PCI-X device node ...
| * [POWERPC] 85xxCDS: Misc 8548 PCI Corrections.Randy Vinson2007-07-241-4/+4
| | | | | | | | | | | | | | | | Setting the host bridge @8000 as primary. Also fixing a bug in setting the USB interrupt numbers. Signed-off-by: Randy Vinson <rvinson@mvista.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * [POWERPC] 85xxCDS: Delay 8259 cascade hookup.Randy Vinson2007-07-241-11/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | The interrupts of an E100 card inserted in PCI slot 4 may be on at bootup. The resulting interrupt flood interacts with the 8259 cascade handler and prevents proper boot up. There is a quirk for the E100 that will disable the E100's interrupts but to use it, the 8259 cascade hookup must be delayed until after the quirk has run. This patch delays the 8259 cascade hookup by registering a device_initcall() which runs after the PCI quirk for the E100. Signed-off-by: Randy Vinson <rvinson@mvista.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * [POWERPC] 85xxCDS: Make sure restart resets the PCI bus.Randy Vinson2007-07-231-0/+35
| | | | | | | | | | | | | | | | | | | | | | | | | | The current 85xxCDS restart code fails to reset the PCI bus which can lead to odd behavior after the restart. This patch uses the VIA Super Southbridge to perform a PCI reset which will reset the entire system. NOTE: Since the VIA chip is behind a PCI-to-PCI bridge which can be disabled with a switch setting, it may not be possible to perform the PCI bus reset. In this case, the code defaults to the previous restart mechanism. Signed-off-by: Randy Vinson <rvinson@mvista.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * [POWERPC] 85xxCDS: Allow 8259 cascade to share an MPIC interrupt line.Randy Vinson2007-07-232-6/+32
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Freescale MPC8555CDS and MPC8548CDS reference hardware has a legacy 8259 interrupt controller pair contained within a VIA VT82C686B Southbridge on the main carrier board. The processor complex plugs into the carrier card using a PCI slot which limits the available interrupts to the INTA-INTD PCI interrupts. The output of the 8259 cascade pair is routed through a gate array and connected to the PCI INTA interrupt line. The normal interrupt chaining hook (set_irq_chained_handler) does not allow sharing of the chained interrupt which prevents the use of PCI INTA by PCI devices. This patch allows the 8259 cascade pair to share their interrupt line with PCI devices. NOTE: The addition of the .end routine for the MPIC is not strictly necessary for this patch. It's there so this code will run from within the threaded interrupt context used by the Real Time patch. Signed-off-by: Randy Vinson <rvinson@mvista.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * [POWERPC] Add basic PCI/PCI Express support for 8544DS boardRoy Zang2007-07-232-1/+241
| | | | | | | | | | | | | | | | Add basic support for the PCIe PHB and enable the ULI bridge. Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Roy Zang <tie-fei.zang@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * [POWERPC] Make endianess of cfg_addr for indirect pci ops runtimeKumar Gala2007-07-236-9/+9
| | | | | | | | | | | | | | | | Make it so we do a runtime check to know if we need to write cfg_addr as big or little endian. This is needed if we want to allow 86xx support to co-exist in the same kernel as other 6xx PPCs. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * [POWERPC] 85xx: Add quirk to ignore bogus FPGA on CDSKumar Gala2007-07-231-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | The newer Arcadia boards for CDS have an FPGA that shows up on PCI however isn't a real PCI device. Add a quirk to just ignore the FPGA. This is based on the following patch from Andy & York: http://ozlabs.org/pipermail/linuxppc-dev/2007-February/032042.html Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * [POWERPC] 85xx: Added 8568 PCIe supportKumar Gala2007-07-231-0/+1
| | | | | | | | | | | | Added the PCIe device node to the 8568 dts and the needed quirk entries. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * [POWERPC] Fixup resources on pci_bus for PCIe PHB when no device is connectedKumar Gala2007-07-232-1/+2
| | | | | | | | | | | | | | | | | | On the 85xx/86xx PCIe controllers if there is no device connected to the PHB we will still allocate a pci_bus for downstream bus of the virtual P2P bridge. However the resources allocated to the downstream bus are not correct and so we just mimic the resources from the upstream pci_bus. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * [POWERPC] Use Freescale pci/pcie common code for 85xx boardsRoy Zang2007-07-237-104/+18
| | | | | | | | | | | | | | | | Switch the 85xx platform over to using the FSL generic PCI code. This gets ups PCIe support in addition to base PCI support. Signed-off-by: Roy Zang <tie-fei.zang@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * [POWERPC] Rewrite Freescale PCI/PCIe support for 8{3,5,6}xxZang Roy-r619112007-07-232-7/+9
| | | | | | | | | | | | | | | | Rewrite the Freescale PCI code to support PCI on 83xx/85xx/86xx and PCIe on 85xx/86xx. Signed-off-by: Roy Zang <tie-fei.zang@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * [POWERPC] Create common fsl pci/e files based on 86xx platformsRoy Zang2007-07-233-241/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | Move arch/powerpc/platforms/86xx/pci.c -> arch/powerpc/sysdev/fsl_pci.c arch/powerpc/sysdev/fsl_pcie.h -> arch/powerpc/sysdev/fsl_pci.h as the base to unify 83xx/85xx/86xx pci and pcie. Add CONFIG_FSL_PCI to build fsl_pci.c for Freescale pci and pcie option. The code still works for 86xx platforms. Signed-off-by: Roy Zang <tie-fei.zang@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | spusched: fix mismerge in spufs.hChristoph Hellwig2007-07-241-4/+1
|/ | | | | | | | | | | spufs.h now has two enums for the sched_flags leading to identical values for SPU_SCHED_WAS_ACTIVE and SPU_SCHED_NOTIFY_ACTIVE. Merge them into a single enum as they were in the IBM development tree. Signed-off-by: Christoph Hellwig <hch@lst.de> Acked-by: Arnd Bergmann <arnd.bergmann@de.ibm.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* Merge branch 'merge' of ↵Linus Torvalds2007-07-225-25/+17
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc * 'merge' of git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc: [POWERPC] Clean up duplicate includes in drivers/macintosh/ [POWERPC] Quiet section mismatch warning on pcibios_setup [POWERPC] init and exit markings for hvc_iseries [POWERPC] Quiet section mismatch in hvc_rtas.c [POWERPC] Constify of_platform_driver match_table [POWERPC] hvcs: Make some things static and const [POWERPC] Constify of_platform_driver name [POWERPC] MPIC protected sources [POWERPC] of_detach_node()'s device node argument cannot be const [POWERPC] Fix ARCH=ppc builds [POWERPC] mv64x60: Use mutex instead of semaphore [POWERPC] Allow smp_call_function_single() to current cpu [POWERPC] Allow exec faults on readable areas on classic 32-bit PowerPC [POWERPC] Fix future firmware feature fixups function failure [POWERPC] fix showing xmon help [POWERPC] Make xmon_write accept a const buffer [POWERPC] Fix misspelled "CONFIG_CHECK_CACHE_COHERENCY" Kconfig option. [POWERPC] cell: CONFIG_SPE_BASE is a typo
| * [POWERPC] Fix future firmware feature fixups function failureMichael Neuling2007-07-223-23/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Move firmware feature initialisation from pSeries_init_early to the earlier pSeries_probe_hypertas so they are initialised before firmware feature fixups are applied. Currently firmware feature sections are only used for iSeries which initialises the these features much earlier. This is a bug in waiting on pSeries. Also adds some whitespace fixups. Signed-off-by: Michael Neuling <mikey@neuling.org> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Paul Mackerras <paulus@samba.org>
| * [POWERPC] Fix misspelled "CONFIG_CHECK_CACHE_COHERENCY" Kconfig option.Robert P. J. Day2007-07-222-2/+2
| | | | | | | | | | Signed-off-by: Robert P. J. Day <rpjday@mindspring.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
* | Fix ppc64 mismergeAl Viro2007-07-221-14/+0
| | | | | | | | | | | | | | | | | | | | Fix a mismerge in commit 8b6f50ef1d5cc86b278eb42bc91630fad455fb10: "spufs: make signal-notification files readonly for NOSCHED contexts", where structs got duplicated. Signed-off-by: Al Viro <viro@zeniv.linux.org.uk> Acked-by: Jeremy Kerr <jk@ozlabs.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* | spufs: make signal-notification files readonly for NOSCHED contextsJeremy Kerr2007-07-211-2/+16
| | | | | | | | | | | | | | | | | | | | | | | | Reading from the signal{1,2} files requires a spu_acquire_saved, so make these files write-only for contexts created with SPU_CREATE_NOSCHED. Signed-off-by: Jeremy Kerr <jk@ozlabs.org> Acked-by: Arnd Bergmann <arnd.bergmann@de.ibm.com> Cc: Paul Mackerras <paulus@samba.org> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* | ps3: FLASH ROM Storage DriverGeert Uytterhoeven2007-07-211-0/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a FLASH ROM Storage Driver for the PS3: - Implemented as a misc character device driver - Uses a fixed 256 KiB buffer allocated from boot memory as the hypervisor requires the writing of aligned 256 KiB blocks Cc: Geoff Levand <geoffrey.levand@am.sony.com> Signed-off-by: Geert Uytterhoeven <Geert.Uytterhoeven@sonycom.com> Cc: Jens Axboe <jens.axboe@oracle.com> Cc: James Bottomley <James.Bottomley@steeleye.com> Cc: Paul Mackerras <paulus@samba.org> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* | ps3: BD/DVD/CD-ROM Storage DriverGeert Uytterhoeven2007-07-211-0/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a BD/DVD/CD-ROM Storage Driver for the PS3: - Implemented as a SCSI device driver - Uses software scatter-gather with a 64 KiB bounce buffer as the hypervisor doesn't support scatter-gather Cc: Geoff Levand <geoffrey.levand@am.sony.com> Signed-off-by: Geert Uytterhoeven <Geert.Uytterhoeven@sonycom.com> Cc: Jens Axboe <jens.axboe@oracle.com> Cc: James Bottomley <James.Bottomley@steeleye.com> Cc: Paul Mackerras <paulus@samba.org> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* | ps3: Disk Storage DriverGeert Uytterhoeven2007-07-211-0/+10
|/ | | | | | | | | | | | | | | | | Add a Disk Storage Driver for the PS3: - Implemented as a block device driver with a dynamic major - Disk names (and partitions) are of the format ps3d%c(%u) - Uses software scatter-gather with a 64 KiB bounce buffer as the hypervisor doesn't support scatter-gather Cc: Geoff Levand <geoffrey.levand@am.sony.com> Signed-off-by: Geert Uytterhoeven <Geert.Uytterhoeven@sonycom.com> Acked-by: Jens Axboe <jens.axboe@oracle.com> Cc: James Bottomley <James.Bottomley@steeleye.com> Cc: Paul Mackerras <paulus@samba.org> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* [CELL] spufs: rework list management and associated lockingChristoph Hellwig2007-07-202-162/+108
| | | | | | | | | | | | | | | | | | This sorts out the various lists and related locks in the spu code. In detail: - the per-node free_spus and active_list are gone. Instead struct spu gained an alloc_state member telling whether the spu is free or not - the per-node spus array is now locked by a per-node mutex, which takes over from the global spu_lock and the per-node active_mutex - the spu_alloc* and spu_free function are gone as the state change is now done inline in the spufs code. This allows some more sharing of code for the affinity vs normal case and more efficient locking - some little refactoring in the affinity code for this locking scheme Signed-off-by: Christoph Hellwig <hch@lst.de> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
* [CELL] oprofile: add support to OProfile for profiling CELL BE SPUsBob Nelson2007-07-203-1/+25
| | | | | | | | | | | | | | | | | | | | | | | From: Maynard Johnson <mpjohn@us.ibm.com> This patch updates the existing arch/powerpc/oprofile/op_model_cell.c to add in the SPU profiling capabilities. In addition, a 'cell' subdirectory was added to arch/powerpc/oprofile to hold Cell-specific SPU profiling code. Exports spu_set_profile_private_kref and spu_get_profile_private_kref which are used by OProfile to store private profile information in spufs data structures. Also incorporated several fixes from other patches (rrn). Check pointer returned from kzalloc. Eliminated unnecessary cast. Better error handling and cleanup in the related area. 64-bit unsigned long parameter was being demoted to 32-bit unsigned int and eventually promoted back to unsigned long. Signed-off-by: Carl Love <carll@us.ibm.com> Signed-off-by: Maynard Johnson <mpjohn@us.ibm.com> Signed-off-by: Bob Nelson <rrnelson@us.ibm.com> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com> Acked-by: Paul Mackerras <paulus@samba.org>
* [CELL] oprofile: enable SPU switch notification to detect currently active ↵Bob Nelson2007-07-203-8/+55
| | | | | | | | | | | | | | | | | SPU tasks From: Maynard Johnson <mpjohn@us.ibm.com> This patch adds to the capability of spu_switch_event_register so that the caller is also notified of currently active SPU tasks. Exports spu_switch_event_register and spu_switch_event_unregister so that OProfile can get access to the notifications provided. Signed-off-by: Maynard Johnson <mpjohn@us.ibm.com> Signed-off-by: Carl Love <carll@us.ibm.com> Signed-off-by: Bob Nelson <rrnelson@us.ibm.com> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com> Acked-by: Paul Mackerras <paulus@samba.org>
* [CELL] spu_base: locking cleanupChristoph Hellwig2007-07-201-33/+51
| | | | | | | | Sort out the locking mess in spu_base and document the current rules. As an added benefit spu_alloc* and spu_free don't block anymore. Signed-off-by: Christoph Hellwig <hch@lst.de> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
* [CELL] cell: indexing of SPUs based on firmware vicinity propertiesArnd Bergmann2007-07-201-1/+89
| | | | | | | | | | | | | | | | | | | | | | | | | This patch links spus according to their physical position using information provided by the firmware through a special vicinity device-tree property. This property is present in current version of Malta firmware. Example of vicinity properties for a node in Malta: Node: Vicinity property contains phandles of: spe@0 [ spe@100000 , mic-tm@50a000 ] spe@100000 [ spe@0 , spe@200000 ] spe@200000 [ spe@100000 , spe@300000 ] spe@300000 [ spe@200000 , bif0@512000 ] spe@80000 [ spe@180000 , mic-tm@50a000 ] spe@180000 [ spe@80000 , spe@280000 ] spe@280000 [ spe@180000 , spe@380000 ] spe@380000 [ spe@280000 , bif0@512000 ] Only spe@* have a vicinity property (e.g., bif0@512000 and mic-tm@50a000 do not have it). Signed-off-by: Andre Detsch <adetsch@br.ibm.com> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
* [CELL] spufs: integration of SPE affinity with the schedullerArnd Bergmann2007-07-202-0/+23
| | | | | | | | | | | This patch makes the scheduller honor affinity information for each context being scheduled. If the context has no affinity information, behaviour is unchanged. If there are affinity information, context is schedulled to be run on the exact spu recommended by the affinity placement algorithm. Signed-off-by: Andre Detsch <adetsch@br.ibm.com> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
* [CELL] cell: add placement computation for scheduling of affinity contextsArnd Bergmann2007-07-203-1/+151
| | | | | | | | | | | This patch provides the spu affinity placement logic for the spufs scheduler. Each time a gang is going to be scheduled, the placement of a reference context is defined. The placement of all other contexts with affinity from the gang is defined based on this reference context location and on a precomputed displacement offset. Signed-off-by: Andre Detsch <adetsch@br.ibm.com> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
* [CELL] spufs: extension of spu_create to support affinity definitionArnd Bergmann2007-07-206-14/+188
| | | | | | | | | | | | This patch adds support for additional flags at spu_create, which relate to the establishment of affinity between contexts and contexts to memory. A fourth, optional, parameter is supported. This parameter represent a affinity neighbor of the context being created, and is used when defining SPU-SPU affinity. Affinity is represented as a doubly linked list of spu_contexts. Signed-off-by: Andre Detsch <adetsch@br.ibm.com> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
* [CELL] cell: add hardcoded spu vicinity information for QS20Arnd Bergmann2007-07-201-1/+54
| | | | | | | | | | This patch allows the use of spu affinity on QS20, whose original FW does not provide affinity information. This is done through two hardcoded arrays, and by reading the reg property from each spu. Signed-off-by: Andre Detsch <adetsch@br.ibm.com> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
* [CELL] cell: add vicinity information on spusArnd Bergmann2007-07-201-0/+2
| | | | | | | | | | | | | This patch adds affinity data to each spu instance. A doubly linked list is created, meant to connect the spus in the physical order they are placed in the BE. SPUs near to memory should be marked as having memory affinity. Adjustments of the fields acording to FW properties is done in separate patches, one for CPBW, one for Malta (patch for Malta under testing). Signed-off-by: Andre Detsch <adetsch@br.ibm.com> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
* [CELL] cell: add per BE structure with info about its SPUsArnd Bergmann2007-07-202-7/+19
| | | | | | | | | | | | | | | | | | Addition of a spufs-global "cbe_info" array. Each entry contains information about one Cell/B.E. node, namelly: * list of spus (both free and busy spus are in this list); * list of free spus (replacing the static spu_list from spu_base.c) * number of spus; * number of reserved (non scheduleable) spus. SPE affinity implementation actually requires only access to one spu per BE node (since it implements its own pointer to walk through the other spus of the ring) and the number of scheduleable spus (n_spus - non_sched_spus) However having this more general structure can be useful for other functionalities, concentrating per-cbe statistics / data. Signed-off-by: Andre Detsch <adetsch@br.ibm.com> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
* [CELL] spufs: use find_first_bit() instead of sched_find_first_bit()Masato Noguchi2007-07-201-2/+1
| | | | | | | | | | | | spu_sched->bitmap has MAX_PRIO(=140) width in bits.However, since ff80a77f20f811c0cc5b251d0f657cbc6f788385, sched_find_first_bit() only supports 100-bit bitmaps. Thus, spu_sched->bitmap should be treated by generic find_first_bit(). Signed-off-by: Masato Noguchi <Masato.Noguchi@jp.sony.com> Signed-off-by: Jeremy Kerr <jk@ozlabs.org> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
* [CELL] spufs: remove unused file argument from spufs_run_spu()Jeremy Kerr2007-07-203-5/+3
| | | | | | | | | | | From: Sebastian Siewior <cbe-oss-dev@ml.breakpoint.cc> The 'file' argument is unused in spufs_run_spu(). This change removes it. Signed-off-by: Sebastian Siewior <sebastian@breakpoint.cc> Signed-off-by: Jeremy Kerr <jk@ozlabs.org> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
* [CELL] spufs: change decrementer restore timingMasato Noguchi2007-07-202-20/+20
| | | | | | | | | The SPU decrementer should be restored after the LSCSA DMA has completed. Signed-off-by: Masato Noguchi <Masato.Noguchi@jp.sony.com> Signed-off-by: Jeremy Kerr <jk@ozlabs.org> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
* [CELL] spufs: dont halt decrementer at restore step 47Masato Noguchi2007-07-201-4/+16
| | | | | | | | | No need to halt the SPE decrementer at context restore step 47, it will be done in step 7. Signed-off-by: Masato Noguchi <Masato.Noguchi@jp.sony.com> Signed-off-by: Jeremy Kerr <jk@ozlabs.org> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
* [CELL] spufs: limit saving MFC_CNTL bitsMasato Noguchi2007-07-201-9/+4
| | | | | | | | | At save step 8, the mfc control register in the CSA should be written _only_ with Sc and Sm bits (at least MFC_CNTL[Dh] should be set to 0) Signed-off-by: Masato Noguchi <Masato.Noguchi@jp.sony.com> Signed-off-by: Jeremy Kerr <jk@ozlabs.org> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
* [CELL] spufs: fix read and write for decr_status fileMasato Noguchi2007-07-201-4/+8
| | | | | | | | | | | The decr_status in the LSCSA is valid only in the sequence of context restore. Thus, it's nonsense to read and/or write it through spufs. This patch changes decr_status node to access MFC_CNTL[Ds] in the CSA. Signed-off-by: Masato Noguchi <Masato.Noguchi@jp.sony.com> Signed-off-by: Jeremy Kerr <jk@ozlabs.org> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
* [CELL] spufs: fix decr_status meaningsMasato Noguchi2007-07-203-222/+262
| | | | | | | | | | | | | | The decr_status in the LSCSA is confusedly used as two meanings: * SPU decrementer was running * SPU decrementer was wrapped as a result of adjust and the code to set decr_status is missing. This patch fixes these problems by using the decr_status argument as a set of flags. This requires a rebuild of the shipped spu_restore code. Signed-off-by: Masato Noguchi <Masato.Noguchi@jp.sony.com> Signed-off-by: Jeremy Kerr <jk@ozlabs.org> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
* [CELL] spufs: remove needless context save/restore codeMasato Noguchi2007-07-201-11/+1
| | | | | | | | | | | | | | | | | | The following steps are not needed in the SPE context save/restore paths: Save Step 12: save_mfc_decr() save suspend_time to CSA (It will be done by step 14) save ch 7 (decrementer value will be saved in LSCSA by spe-side step 10) Restore Step 59: restore_ch_part1() restore ch 1 (it will be done by spe-side step 15) This change removes the unnecessary steps. Signed-off-by: Masato Noguchi <Masato.Noguchi@jp.sony.com> Signed-off-by: Jeremy Kerr <jk@ozlabs.org> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
* [CELL] spufs: fix array size of channel indexJeremy Kerr2007-07-201-6/+6
| | | | | | | | | | Based on a fix from Masato Noguchi <Masato.Noguchi@jp.sony.com>. Remove the (incorrect) array size declarations in the spufs channel arrays, and use ARRAY_SIZE rather than hardcoded values. Signed-off-by: Jeremy Kerr <jk@ozlabs.org> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
* [CELL] spufs: make sure context are scheduled again after spu_acquire_savedChristoph Hellwig2007-07-204-23/+44
| | | | | | | | | | | | | | | Currently a process is removed from the physical spu when spu_acquire_saved is saved but never put back. This patch adds a new spu_release_saved that is to be paired with spu_acquire_saved and put the process back if it has been in RUNNABLE state before. Niether Jeremy not be are entirely happy about this exact patch because it adds another spu_activate call outside of the owner thread, but I feel this is the best short-term fix we can come up with. Signed-off-by: Christoph Hellwig <hch@lst.de> Signed-off-by: Jeremy Kerr <jk@ozlabs.org> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
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