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* Disintegrate asm/system.h for PowerPCDavid Howells2012-03-281-1/+0
| | | | | | | | Disintegrate asm/system.h for PowerPC. Signed-off-by: David Howells <dhowells@redhat.com> Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> cc: linuxppc-dev@lists.ozlabs.org
* PCI: add pci_bus_for_each_resource(), remove direct bus->resource[] refsBjorn Helgaas2010-02-231-6/+6
| | | | | | | | | | | | No functional change; this converts loops that iterate from 0 to PCI_BUS_NUM_RESOURCES through pci_bus resource[] table to use the pci_bus_for_each_resource() iterator instead. This doesn't change the way resources are stored; it merely removes dependencies on the fact that they're in a table. Signed-off-by: Bjorn Helgaas <bjorn.helgaas@hp.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* powerpc/85xx: Add P2020DS board supportKumar Gala2009-05-191-0/+1
| | | | | | | | | | | | | | | | | | | The P2020 is a dual e500v2 core based SOC with: * 3 PCIe controllers * 2 General purpose DMA controllers * 2 sRIO controllers * 3 eTSECS * USB 2.0 * SDHC * SPI, I2C, DUART * enhanced localbus * and optional Security (P2020E) security w/XOR acceleration The p2020 DS reference board is pretty similar to the existing MPC85xx DS boards and has a ULI 1575 connected on one of the PCIe controllers. Signed-off-by: Ted Peters <Ted.Peters@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc: Refactor board check for PCI quirks on FSL boards with uli1575Kumar Gala2009-05-191-11/+12
| | | | | | | | | | Refactor the check to determine if the quirk is applicable to the boards into one inline function so we only have to change one place to add more boards that the quirks might be applicable to. Also removed a warning related to unused temp variable. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc: don't disable SATA interrupts on Freescale MPC8610 HPCDTimur Tabi2009-04-211-5/+0
| | | | | | | | | | | | | | | The ULI 1575 PCI quirk function for the Freescale MPC8610 HPCD was disabling the SATA INTx interrupt, even when SATA support was enabled. This was safe, because the SATA driver re-enabled it. But with commit a5bfc471 ("ahci: drop intx manipulation on msi enable"), the driver no longer does this, and so SATA support on the 8610 HPCD is broken. The original quirk function disabled INTx because it caused some other interrupt problem during early development on this board, but no one remembers any more what that problem was, and it doesn't seem to occur any more. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc: Fix the ide suspend function in uli1575Jason Jin2009-01-071-0/+1
| | | | | | | | | The general pci resume code can only restore part of the configuration registers. We need to reconfigure those registers in the FIXUP_RESUME. Signed-off-by: Jason Jin <Jason.jin@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc: Fix boot hang regression on MPC8544DSKumar Gala2008-10-021-1/+11
| | | | | | | | | | | | Commit 00c5372d37a78990c1530184a9c792ee60a30067 caused the MPC8544DS board to hang at boot. The MPC8544DS is unique in that it doesn't use the PCI slots on the ULI (unlike the MPC8572DS or MPC8610HPCD). So the dummy read at the end of the address space causes us to hang. We can detect the situation by comparing the bridge's BARs versus the root complex. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/85xx/86xx: some refactoring for fsl_uli1575 codeAnton Vorontsov2008-07-161-8/+107
| | | | | | | | | | | | - Get rid of uses_fsl_uli_m1575, it does not scale for all cases. Instead, let's explicitly use machine_is() for each fixup. - Factor out MPC8610HPCD quirks to fsl_uli1575, and protect them with machine_is(). One step closer to multiplatform kernels. - Actually use fsl_uli1575 on MPC8610HPCD, so RTC quirk will be applied. - RTC quirk applies to all boards though, so no machine_is() checks. Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/fsl_uli1575: fix RTC quirk to work on MPC8572DS and MPC8610HPCDAnton Vorontsov2008-07-161-1/+1
| | | | | | | | | | | | This patch fixes RTC on MPC8572DS boards: dummy read helps only when reading at the end of the bridge's memory (i.e. outside of behind the bridge devices' assigned regions). With this change the quirk also makes RTC work on MPC8610HPCD, so it's unlikely that this will break MPC8641HPCN or MPC8544DS boards. Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* [POWERPC] Fix interrupt routing and setup of ULI M1575 on FSL boardsKumar Gala2007-08-171-0/+255
The interrupt routing in the device trees for the ULI M1575 was inproperly using the interrupt line field as pci function. Fixed up the device tree's to actual conform for to specification and changed the interrupt mapping code so it just uses a static mapping setup as follows: PIRQA - IRQ9 PIRQB - IRQ10 PIRQC - IRQ11 PIRQD - IRQ12 USB 1.1 OCHI (1c.0) - IRQ12 USB 1.1 OCHI (1c.1) - IRQ9 USB 1.1 OCHI (1c.2) - IRQ10 USB 1.1 ECHI (1c.3) - IRQ11 LAN (1b.0) - IRQ6 AC97 (1d.0) - IRQ6 Modem (1d.1) - IRQ6 HD Audio (1d.2) - IRQ6 SATA (1f.1) - IRQ5 SMB (1e.1) - IRQ7 PMU (1e.2) - IRQ7 PATA (1f.0) - IRQ14/15 Took the oppurtunity to refactor the code into a single file so we don't have to duplicate these fixes on the two current boards in the tree and several forth coming boards that will also need the code. Fixed RTC support that requires a dummy memory read on the P2P bridge to unlock the RTC and setup the default of the RTC alarm registers to match with a basic x86 style CMOS RTC. Moved code that poked ISA registers to a FIXUP_FINAL quirk to ensure the PCI IO space has been setup properly before we start poking ISA registers at random locations. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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