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* module: cleanup FIXME comments about trimming exception table entries.Rusty Russell2009-06-121-2/+0
| | | | | | | | Everyone cut and paste this comment from my original one. We now do it generically, so cut the comments. Signed-off-by: Rusty Russell <rusty@rustcorp.com.au> Cc: Amerigo Wang <amwang@redhat.com>
* Merge branch 'irq-for-linus' of ↵Linus Torvalds2009-06-106-12/+23
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip * 'irq-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip: (76 commits) x86, apic: Fix dummy apic read operation together with broken MP handling x86, apic: Restore irqs on fail paths x86: Print real IOAPIC version for x86-64 x86: enable_update_mptable should be a macro sparseirq: Allow early irq_desc allocation x86, io-apic: Don't mark pin_programmed early x86, irq: don't call mp_config_acpi_gsi() if update_mptable is not enabled x86, irq: update_mptable needs pci_routeirq x86: don't call read_apic_id if !cpu_has_apic x86, apic: introduce io_apic_irq_attr x86/pci: add 4 more return parameters to IO_APIC_get_PCI_irq_vector(), fix x86: read apic ID in the !acpi_lapic case x86: apic: Fixmap apic address even if apic disabled x86: display extended apic registers with print_local_APIC and cpu_debug code x86: read apic ID in the !acpi_lapic case x86: clean up and fix setup_clear/force_cpu_cap handling x86: apic: Check rev 3 fadt correctly for physical_apic bit x86/pci: update pirq_enable_irq() to setup io apic routing x86/acpi: move setup io apic routing out of CONFIG_ACPI scope x86/pci: add 4 more return parameters to IO_APIC_get_PCI_irq_vector() ...
| * Merge branch 'linus' into irq/numaIngo Molnar2009-06-0151-349/+325
| |\ | | | | | | | | | | | | | | | | | | | | | | | | | | | Conflicts: arch/mips/sibyte/bcm1480/irq.c arch/mips/sibyte/sb1250/irq.c Merge reason: we gathered a few conflicts plus update to latest upstream fixes. Signed-off-by: Ingo Molnar <mingo@elte.hu>
| * | irq: change ->set_affinity() to return statusYinghai Lu2009-04-286-12/+23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | according to Ingo, change set_affinity() in irq_chip should return int, because that way we can handle failure cases in a much cleaner way, in the genirq layer. v2: fix two typos [ Impact: extend API ] Signed-off-by: Yinghai Lu <yinghai@kernel.org> Cc: Andrew Morton <akpm@linux-foundation.org> Cc: Suresh Siddha <suresh.b.siddha@intel.com> Cc: "Eric W. Biederman" <ebiederm@xmission.com> Cc: Rusty Russell <rusty@rustcorp.com.au> Cc: linux-arch@vger.kernel.org LKML-Reference: <49F654E9.4070809@kernel.org> Signed-off-by: Ingo Molnar <mingo@elte.hu>
* | | MIPS: Outline udelay and fix a few issues.Ralf Baechle2009-06-085-92/+66
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Outlining fixes the issue were on certain CPUs such as the R10000 family the delay loop would need an extra cycle if it overlaps a cacheline boundary. The rewrite also fixes build errors with GCC 4.4 which was changed in way incompatible with the kernel's inline assembly. Relying on pure C for computation of the delay value removes the need for explicit. The price we pay is a slight slowdown of the computation - to be fixed on another day. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | | MIPS: ioctl.h: Fix headers_check warningsJaswinder Singh Rajput2009-06-081-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Make ioctl.h compatible with asm-generic/ioctl.h and userspace fix the following 'make headers_check' warning: usr/include/asm-mips/ioctl.h:64: extern's make no sense in userspace Signed-off-by: Jaswinder Singh Rajput <jaswinderrajput@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | | MIPS: Cobalt: PCI bus is always required to obtain the board IDYoichi Yuasa2009-06-081-0/+1
| | | | | | | | | | | | | | | Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | | MIPS: Kconfig: Remove "Support for" from Cavium system typeYoichi Yuasa2009-06-081-2/+2
| | | | | | | | | | | | | | | | | | Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> Acked-by: David Daney <ddaney@caviumnetworks.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | | MIPS: Sibyte: Honor CONFIG_CMDLINERalf Baechle2009-06-081-7/+1
| |/ |/| | | | | | | | | Original patch by Imre Kaloz <kaloz@openwrt.org>. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | MIPS: IP32: Remove unnecessary if not even harmful volatile keywords.Ralf Baechle2009-05-221-3/+3
| | | | | | | | | | | | | | They are unneeded and as the issue fixed in lmo commit 63f7ec59053e3f850ab67a9938e631bcba64c6ce shows even harmful. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | MIPS: IP32: Fix build error due to uninitialized variable.Ralf Baechle2009-05-221-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | CC arch/mips/sgi-ip32/ip32-reset.o cc1: warnings being treated as errors arch/mips/sgi-ip32/ip32-reset.c: In function 'debounce': arch/mips/sgi-ip32/ip32-reset.c:97: error: 'reg_a' is used uninitialized in this function The issues is old but due to the volatile keyword gcc older than 4.4 did not warn about this obvious bug. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | MIPS: Fix sparse warning in incompatiable argument type of clear_user.Wu Zhangjin2009-05-221-1/+1
| | | | | | | | | | | | | | | | | | The type of the second argument of access_ok should be (void __user *). The unnecessary conversion of the clear_user address argument was causing sparse to emit warnings on the __chk_user_ptr check. Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | MIPS: 64-bit: Fix system lockup.Greg Ungerer2009-05-203-10/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The address range size calculation inside local_flush_tlb_kernel_range() is being truncated by a too small size variable holder on 64-bit systems. The truncated size can result in an erroneous tlbsize check that means we sit spinning inside a loop trying to flush a hige number of TLB entries. This is for all intents and purposes a system hang. Fix by using an appropriately sized valiable to hold the size. [Ralf: Greg's original patch submission identified the issue and fixed one instance in tlb-r4k.c but there there were several more. For consistency I also modified tlb-r3k.c even though that file is only used on 32-bit.] Signed-off-by: Greg Ungerer <gerg@snapgear.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | MIPS: IP28: Change to build with -mr10k-cache-barrier=storepeter fuerst2009-05-201-3/+3
| | | | | | | | | | | | | | | | | | Richard Sandiford's new code for inserting the cache-barriers, for GCC 4.3 and above and already incorporated in the current GCC-release, uses a slightly different option-syntax. Signed-off-by: peter fuerst <post@pfrst.de> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | MIPS: IP22: Fix hang in power button interrupt handlerRalf Baechle2009-05-201-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The hang was caused by the use of disable_irq() from the interrupt handler itself. Fixed by the use of disable_irq_nosync(). The issue was triggered by: commit 3aa551c9b4c40018f0e261a178e3d25478dc04a9 Author: Thomas Gleixner <tglx@linutronix.de> Date: Mon Mar 23 18:28:15 2009 +0100 genirq: add threaded interrupt handler support Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | MIPS: IP32: Fix hang on shutdown in power button interrupt handler.Andrew Randrianasulu2009-05-201-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The hang was caused by the use of disable_irq() from the interrupt handler itself. Fixed by the use of disable_irq_nosync(). The issue was triggered by: commit 3aa551c9b4c40018f0e261a178e3d25478dc04a9 Author: Thomas Gleixner <tglx@linutronix.de> Date: Mon Mar 23 18:28:15 2009 +0100 genirq: add threaded interrupt handler support Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | MIPS: Sibyte: Fix locking in set_irq_affinityThomas Bogendoerfer2009-05-142-10/+4
| | | | | | | | | | | | | | | | Locking of irq_desc is now done in irq_set_affinity; don't lock it again in chip specific set_affinity function. Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | MIPS: Use force_sig when handling address errors.David Daney2009-05-141-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | When init is started it is SIGNAL_UNKILLABLE. If it were to get an address error, we would try to send it SIGBUS, but it would be ignored and the faulting instruction restarted. This results in an endless loop. We need to use force_sig() instead so it will actually die and give us some useful information. Reported-by: Florian Fainelli <florian@openwrt.org> Signed-off-by: David Daney <ddaney@caviumnetworks.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | MIPS: Cavium: Add struct clocksource * argument to octeon_cvmcount_read()Coly Li2009-05-141-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | This patch modifies parameter of octeon_cvmcount_read() from 'void' to 'struct clocksource *cs', which fixes compile warning for incompatible parameter type. Signed-off-by: Coly Li <coly.li@suse.de> Cc: David Daney <ddaney@caviumnetworks.com> Cc: Ingo Molnar <mingo@elte.hu> Reviewed-by: David Daney <ddaney@caviumnetworks.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | MIPS: Rewrite <asm/div64.h> to work with gcc 4.4.0.Ralf Baechle2009-05-141-92/+50
| | | | | | | | | | | | | | The inline assembler used on 32-bit kernels was using the "h" constraint which was considered dangerous and removed for gcc 4.4.0. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | MIPS: Fix highmem.Ralf Baechle2009-05-144-34/+26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 351336929ccf222ae38ff0cb7a8dd5fd5c6236a0 (kernel.org) rsp. b3594a089f1c17ff919f8f78505c3f20e1f6f8ce (linux-mips.org): > From: Chris Dearman <chris@mips.com> > Date: Wed, 19 Sep 2007 00:58:24 +0100 > Subject: [PATCH] [MIPS] Allow setting of the cache attribute at run time. > > Slightly tacky, but there is a precedent in the sparc archirecture code. introduces the variable _page_cachable_default, which defaults to zero and. is used to create the prototype PTE for __kmap_atomic in arch/mips/mm/init.c:kmap_init before initialization in arch/mips/mm/c-r4k.c:coherency_setup, so the default value of 0 will be used as the CCA of kmap atomic pages which on many processors is not a defined CCA value and may result in writes to kmap_atomic pages getting corrupted. Debugged by Jon Fraser (jfraser@broadcom.com). Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | MIPS: Fix sign-extension bug in 32-bit kernel on 32-bit hardware.Ralf Baechle2009-05-141-4/+4
| | | | | | | | | | | | | | Probably nobody does arithmetic on cp0 register values so this has never bitten. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | MIPS: MSP71xx: Remove the RAMROOT functionsShane McDonald2009-05-142-71/+1
| | | | | | | | | | | | | | | | | | The RAMROOT function was a successful but non-portable attempt to append the root filesystem to the end of the kernel image. The preferred and portable solution is to use an initramfs instead. Signed-off-by: Shane McDonald <mcdonald.shane@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | MIPS: Use -mno-check-zero-divisionRalf Baechle2009-05-141-0/+1
| | | | | | | | | | | | | | I don't think that in 15 years of Linux/MIPS the zero division checking code generated by gcc by default has ever caught anything. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | MIPS: Set compiler options only after the compiler prefix has ben set.Ralf Baechle2009-05-141-2/+2
| | | | | | | | | | | | Otherwise indigestable options might be passed to the host compiler. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | MIPS: IP27: Get rid of #ident. Gcc 4.4.0 doesn't like it.Ralf Baechle2009-05-141-2/+2
| | | | | | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | MIPS: uaccess: Switch lock annotations to might_fault().Ralf Baechle2009-05-142-18/+23
| | | | | | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | MIPS: MSP71xx: Resolve use of non-existent GPIO routines in msp71xx resetShane McDonald2009-05-141-6/+2
| | | | | | | | | | | | | | | | | | | | | | | | There have been a number of compile problems with the msp71xx configuration ever since it was included in the linux-mips.org repository. This patch resolves compilation problems with attempting to reset the board using non-existent GPIO routines. This patch has been compile-tested against the current HEAD. Signed-off-by: Shane McDonald <mcdonald.shane@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | MIPS: MSP71xx: Resolve multiple definition of plat_timer_setupShane McDonald2009-05-141-5/+2
| | | | | | | | | | | | | | | | | | | | | | | | There have been a number of compile problems with the msp71xx configuration ever since it was included in the linux-mips.org repository. This patch resolves the "multiple definition of plat_timer_setup" problem, and creates the required get_c0_compare_int function. This patch has been compile-tested against the current HEAD. Signed-off-by: Shane McDonald <mcdonald.shane@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | MIPS: Make uaccess.h slightly more sparse friendly.Ralf Baechle2009-05-141-12/+27
| | | | | | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | MIPS: Make access_ok() sideeffect proof.Ralf Baechle2009-05-141-3/+13
| | | | | | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | MIPS: IP27: Fix clash with NMI_OFFSET from hardirq.hThomas Bogendoerfer2009-05-141-2/+2
| | | | | | | | | | | | | | | | | | There was already a define for NMI_OFFSET in asm/sn/addr.h, which now clashes with linux/hardirq.h. Rename the one in sn/addr.h to fix IP27 builds.. Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | MIPS: Alchemy: Timer build fixManuel Lauss2009-05-141-1/+1
| | | | | | | | | | | | | | Fix breakage introduced by 8e19608e8b5c001e4a66ce482edc474f05fb7355. Signed-off-by: Manuel Lauss <mano@roarinelk.homelinux.net> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | MIPS: Kconfig: Delete duplicate definition of RWSEM_GENERIC_SPINLOCK.Ralf Baechle2009-05-141-4/+0
| | | | | | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | MIPS: Cavium: Add support for 8k and 32k page sizes.Ralf Baechle2009-05-146-4/+44
| | | | | | | | | | | | | | | | Beyond the requirements of the architecture standard Cavium also supports 8k and 32k pages. Signed-off-by: Ralf Baechle <ralf@linux-mips.org> Acked-by: David Daney <ddaney@caviumnetworks.com>
* | MIPS: TXx9: Fix possible overflow in clock calculationsAtsushi Nemoto2009-05-143-3/+3
| | | | | | | | | | | | | | | | | | | | | | Addition of -fwrapv option in 2.6.29 discloses possible overflow with signed arithmetics. For example, result of "a * 6 / 12" (int a = 400000000) is 200000000 without -fwrapv but -157913941 with -fwrapv. Change some variable to unsigned to avoid such overflows. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | MIPS: Synchronize dma_map_page and dma_map_singleAtsushi Nemoto2009-05-142-20/+8
| | | | | | | | | | | | | | | | | | | | Synchronize dma_map_page/dma_unmap_page and dma_map_single/dma_unmap_single. This will reduce unnecessary writebacks and invalidates. [Ralf: make dma_unmap_page an inline function.] Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | MIPS: Enable CLO / CLZ instructions via separate CPU propertyRalf Baechle2009-05-142-2/+11
| | | | | | | | | | | | | | This is useful for IDT RC32332, RC32334 and NEC VR5500 processors which do not implement the full MIPS32 / MIPS64 architecture. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | MIPS: Loongson 2 needs no hazard barriers.Zhang Le2009-05-141-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | Quoting from Loongson2FUserGuide.pdf: 5.22.1 Hazards The processor detects most of the pipeline hazards in hardware, including CP0 hazards and load hazards. No NOP instructions are required to correct instruction sequences. Signed-off-by: Zhang Le <r0bertz@gentoo.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | MIPS: Do not include seccomp.h from compat.hAtsushi Nemoto2009-05-141-1/+0
| | | | | | | | | | | | | | | | | | | | | | The compat.h does not need seccomp.h since TIF_32BIT was moved to thread_info.h This fixes a build error of 64-bit kernel without CONFIG_SECCOMP. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Acked-by: : David Daney <ddaney@caviumnetworks.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | MIPS: RBTX4939: Fix typo in system nameAtsushi Nemoto2009-05-141-1/+1
| | | | | | | | | | Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | MIPS: Compat: Use generic 32-bit wrapers for sys_timerfd_{g,s}ettimeDavid Daney2009-05-142-4/+4
| | | | | | | | | | | | | | | | The LTP timerfd01 test is failing (blocking forever) on the 32-bit ABIs. We need to use the compat_* wrappers for these system calls. Signed-off-by: David Daney <ddaney@caviumnetworks.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | MIPS: Fix build error if CONFIG_CEVT_R4K is undefined.Ralf Baechle2009-05-141-1/+1
| | | | | | | | | | | | Introduced by 99aa5029937ee926e3b249369e208d7013cd381b. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | MIPS: Add Loongson cpu-feature-overrides.hZhang Le2009-05-141-0/+59
| | | | | | | | | | | | | | | | | | | | | | | | I have taken Wu Zhangjin's and Philippe Vachon's version as references, did a little modification and tested on 16K page size kernel. It works well. Unfornately although it already has defined cpu_has_dc_aliases as 1, 4k page size still not working. More work needed here. Signed-off-by: Zhang Le <r0bertz@gentoo.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | MIPS: Print the actual detected I-cache associativity on bootup.Ralf Baechle2009-05-141-1/+1
| | | | | | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | MIPS: IP32: Fix needlessly global symbols in arch/mips/sgi-ip32/ip32-irq.cDmitri Vorobiev2009-05-141-2/+2
| | | | | | | | | | | | | | | | The following symbols are needlessly defined global: cpuerr_irq and memerr_irq. This patch makes the symbols static. Signed-off-by: Dmitri Vorobiev <dmitri.vorobiev@movial.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | MIPS: IP32: ip32_be_handler symbol is needlessly defined globalDmitri Vorobiev2009-05-141-1/+1
| | | | | | | | | | | | | | | | The file arch/mips/sgi-ip32/ip32-berr.c needlessly defines the function ip32_be_handler() as global, and this patch makes it static. Signed-off-by: Dmitri Vorobiev <dmitri.vorobiev@movial.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | MIPS: IP32: Two symbols can become staticDmitri Vorobiev2009-05-141-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | The file arch/mips/mm/sc-rm7k.c needlessly defines two global symbols: rm7k_sc_ops rm7k_tcache_enabled This patch makes these symbols static. Signed-off-by: Dmitri Vorobiev <dmitri.vorobiev@movial.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | MIPS: au1xxx-ide: Fix build with CONFIG_PMManuel Lauss2009-05-141-17/+0
| | | | | | | | | | | | | | | | | | au1xxx_power_dev_t? is never defined; get rid of all PM stuff as well since it is not in the driver source anyway. Signed-off-by: Manuel Lauss <mano@roarinelk.homelinux.net> Acked-by: Sergei Shtylyov <sshtylyov@ru.mvista.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | MIPS: Alchemy: Add missing Au1200 GPIO203 interruptManuel Lauss2009-05-141-2/+2
| | | | | | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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