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| | * | | MIPS: ath79: add USB controller registration code for the QCA955X SoCsGabor Juhos2013-02-192-0/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Register platfom devices for the built-in USB controllers of the SoCs. Cc: Rodriguez, Luis <rodrigue@qca.qualcomm.com> Cc: Giori, Kathy <kgiori@qca.qualcomm.com> Cc: QCA Linux Team <qca-linux-team@qca.qualcomm.com> Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/4952/ Signed-off-by: John Crispin <blogic@openwrt.org>
| | * | | MIPS: ath79: add PCI controller registration code for the QCA955X SoCsGabor Juhos2013-02-193-0/+51
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add SoC specific PCI IRQ map, and register platform devices for the two built-in PCIe RCs. Cc: Rodriguez, Luis <rodrigue@qca.qualcomm.com> Cc: Giori, Kathy <kgiori@qca.qualcomm.com> Cc: QCA Linux Team <qca-linux-team@qca.qualcomm.com> Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/4951/ Signed-off-by: John Crispin <blogic@openwrt.org>
| | * | | MIPS: ath79: add WMAC registration code for the QCA955X SoCsGabor Juhos2013-02-193-1/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The SoC has a built-in wireless MAC. Register a platform device for that to make it usable with the ath9k driver. Cc: Rodriguez, Luis <rodrigue@qca.qualcomm.com> Cc: Giori, Kathy <kgiori@qca.qualcomm.com> Cc: QCA Linux Team <qca-linux-team@qca.qualcomm.com> Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/4956/ Signed-off-by: John Crispin <blogic@openwrt.org>
| | * | | MIPS: ath79: register UART for the QCA955X SoCsGabor Juhos2013-02-191-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Similarly to the preceding SoCs, the QCA955X SoCs also have a built-in NS16650 compatible UART. Register the platform device for that to make it usable. Cc: Rodriguez, Luis <rodrigue@qca.qualcomm.com> Cc: Giori, Kathy <kgiori@qca.qualcomm.com> Cc: QCA Linux Team <qca-linux-team@qca.qualcomm.com> Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/4949/ Signed-off-by: John Crispin <blogic@openwrt.org>
| | * | | MIPS: ath79: add QCA955X specific glue to ath79_device_reset_{set, clear}Gabor Juhos2013-02-192-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The ath79_device_reset_* are causing BUG when those are used on the QCA955x SoCs. The patch adds the required code to avoid that. Cc: Rodriguez, Luis <rodrigue@qca.qualcomm.com> Cc: Giori, Kathy <kgiori@qca.qualcomm.com> Cc: QCA Linux Team <qca-linux-team@qca.qualcomm.com> Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/4948/ Signed-off-by: John Crispin <blogic@openwrt.org>
| | * | | MIPS: ath79: add GPIO setup code for the QCA955X SoCsGabor Juhos2013-02-192-1/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The existing code can handle the GPIO controller of the QCA955x SoCs. Add a minimal glue code to make it working. Cc: Rodriguez, Luis <rodrigue@qca.qualcomm.com> Cc: Giori, Kathy <kgiori@qca.qualcomm.com> Cc: QCA Linux Team <qca-linux-team@qca.qualcomm.com> Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/4947/ Signed-off-by: John Crispin <blogic@openwrt.org>
| | * | | MIPS: ath79: add IRQ handling code for the QCA955X SoCsGabor Juhos2013-02-193-8/+140
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The IRQ routing in the QCA955x SoCs is slightly different from the routing implemented in the already supported SoCs. Cc: Rodriguez, Luis <rodrigue@qca.qualcomm.com> Cc: Giori, Kathy <kgiori@qca.qualcomm.com> Cc: QCA Linux Team <qca-linux-team@qca.qualcomm.com> Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/4955/ Signed-off-by: John Crispin <blogic@openwrt.org>
| | * | | MIPS: ath79: add clock setup code for the QCA955X SoCsGabor Juhos2013-02-192-0/+117
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The patch adds code to get various clock frequencies from the PLLs used in the QCA955x SoCs. Cc: Rodriguez, Luis <rodrigue@qca.qualcomm.com> Cc: Giori, Kathy <kgiori@qca.qualcomm.com> Cc: QCA Linux Team <qca-linux-team@qca.qualcomm.com> Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/4945/ Signed-off-by: John Crispin <blogic@openwrt.org>
| | * | | MIPS: ath79: add SoC detection code for the QCA955X SoCsGabor Juhos2013-02-194-1/+40
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Also add 'soc_is_qca955[68x]' helper functions and a Kconfig symbol for the SoC family. Cc: Rodriguez, Luis <rodrigue@qca.qualcomm.com> Cc: Giori, Kathy <kgiori@qca.qualcomm.com> Cc: QCA Linux Team <qca-linux-team@qca.qualcomm.com> Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/4943/ Signed-off-by: John Crispin <blogic@openwrt.org>
| | * | | MIPS: ath79: add early printk support for the QCA955X SoCsGabor Juhos2013-02-192-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The patch allows to see kernel messages on the QCA955X SoCs in early boot stage. Cc: Rodriguez, Luis <rodrigue@qca.qualcomm.com> Cc: Giori, Kathy <kgiori@qca.qualcomm.com> Cc: QCA Linux Team <qca-linux-team@qca.qualcomm.com> Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/4944/ Signed-off-by: John Crispin <blogic@openwrt.org>
| | * | | MIPS: ath79: fix WMAC IRQ resource assignmentGabor Juhos2013-02-191-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The '.start' field of the IRQ resource assigned twice in ar934x_wmac_setup(). The second assignment must set the '.end' field. Fix it. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/4954/ Signed-off-by: John Crispin <blogic@openwrt.org>
| | * | | mips: reserve elfcorehdrCorey Minyard2013-02-191-0/+39
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | /proc/vmcore wasn't showing up in kdump kernels. It turns that that for Octeon, the memory used by elfcorehdr wasn't being set aside properly and it was getting clobbered before /proc/vmcore could get it. So reserve the memory if it shows up in a memory area managed by the kernel. Signed-off-by: Corey Minyard <cminyard@mvista.com> Acked-by: David Daney <ddaney@caviumnetworks.com> Cc: Ralf Baechle <ralf@linux-mips.org> Patchwork: http://patchwork.linux-mips.org/patch/4936/
| | * | | mips: Make sure kernel memory is in iomemCorey Minyard2013-02-191-21/+31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Kernel memory isn't necessarily added to the memory tables, so it wouldn't show up in /proc/iomem. This was breaking kdump, which requires these memory addresses to work correctly. Signed-off-by: Corey Minyard <cminyard@mvista.com> Acked-by: David Daney <ddaney@caviumnetworks.com> Cc: Ralf Baechle <ralf@linux-mips.org> Patchwork: http://patchwork.linux-mips.org/patch/4937/
| | * | | MIPS: ath79: use dynamically allocated USB platform devicesGabor Juhos2013-02-171-60/+51
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The current code uses static resources and static platform device instances for the possible USB controllers in the system. These static variables contains initial values which leads to data segment pollution. Remove the static variables and use dynamically allocated structures instead. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/4933/ Signed-off-by: John Crispin <blogic@openwrt.org>
| | * | | ath79: remove ATH79_MISC_IRQ_* definesGabor Juhos2013-02-174-18/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use the ATH79_MISC_IRQ() macro instead. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/4930/ Signed-off-by: John Crispin <blogic@openwrt.org>
| | * | | ath79: add ATH79_CPU_IRQ() macroGabor Juhos2013-02-175-36/+31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove the individual ATH79_CPU_IRQ_* constants and use the new macro instead of those. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/4929/ Signed-off-by: John Crispin <blogic@openwrt.org>
| | * | | MIPS: pci-ar71xx: move irq base to the controller structureGabor Juhos2013-02-171-8/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/4928/ Signed-off-by: John Crispin <blogic@openwrt.org>
| | * | | MIPS: pci-ar71xx: remove static PCI IO/MEM resourcesGabor Juhos2013-02-172-17/+35
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/4927/ Signed-off-by: John Crispin <blogic@openwrt.org>
| | * | | MIPS: pci-ar71xx: use dynamically allocated PCI controller structureGabor Juhos2013-02-171-31/+53
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/4926/ Signed-off-by: John Crispin <blogic@openwrt.org>
| | * | | MIPS: pci-ar724x: setup command register of the PCI controllerGabor Juhos2013-02-173-1/+74
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The command register of the PCI controller is not initialized correctly by the bootloader on some boards and this leads to non working PCI bus. Add code to initialize the command register from the Linux code to avoid this. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/4916/ Signed-off-by: John Crispin <blogic@openwrt.org>
| | * | | MIPS: pci-ar724x: use per-controller IRQ baseGabor Juhos2013-02-171-10/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Change to the code to use per-controller IRQ base. This is needed for multiple PCI controller support. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/4915/ Signed-off-by: John Crispin <blogic@openwrt.org>
| | * | | MIPS: pci-ar724x: remove static PCI IO/MEM resourcesGabor Juhos2013-02-172-17/+44
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Static resources become impractical when multiple PCI controllers are present. Move the resources into the platform device registration code and change the probe routine to get those from there platform device's resources. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/4914/ Signed-off-by: John Crispin <blogic@openwrt.org>
| | * | | MIPS: pci-ar724x: use dynamically allocated PCI controller structureGabor Juhos2013-02-171-47/+82
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The current code uses static variables to store the PCI controller specific data. This works if the system contains one PCI controller only, however it becomes impractical when multiple PCI controllers are present. Move the variables into a dynamically allocated controller specific structure, and use that instead of the static variables. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/4912/ Signed-off-by: John Crispin <blogic@openwrt.org>
| | * | | MIPS: ath79: allow to specify bus number in PCI IRQ mapsGabor Juhos2013-02-172-1/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is needed for multiple PCI bus support. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/4913/ Signed-off-by: John Crispin <blogic@openwrt.org>
| | * | | MIPS: add dummy pci_load_of_rangesGabor Juhos2013-02-171-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The pci_load_of_ranges function is only available if CONFIG_OF is selected. If the function is used without CONFIG_OF being enabled it will cause a build error. Add a dummy inline function to avoid this. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/4911/ Signed-off-by: John Crispin <blogic@openwrt.org>
| | * | | MIPS: avoid possible resource conflict in register_pci_controllerGabor Juhos2013-02-171-2/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The IO and memory resources of a PCI controller might already have a parent resource set when they are passed to 'register_pci_controller'. If the parent resource is set, the request_resource call will fail due to resource conflict and the current code will not be able to register the PCI controller. Use the parent resource if it is available in the request_resource call to avoid the isssue. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/4910/ Signed-off-by: John Crispin <blogic@openwrt.org>
| | * | | MIPS: ath79: remove unused ar7{1x,24}x_pcibios_init functionsGabor Juhos2013-02-174-87/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The functions are unused now, so remove them. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/4909/ Signed-off-by: John Crispin <blogic@openwrt.org>
| | * | | MIPS: ath79: register platform devices for the PCI controllersGabor Juhos2013-02-171-9/+78
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The pci-ar71xx and pci-ar724x drivers were converted into platform drivers. Register the corresponding platform devices for the PCI controllers instead of using the ar7{1x,24}x_pcibios_init functions. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/4908/ Signed-off-by: John Crispin <blogic@openwrt.org>
| | * | | MIPS: ath79: move global PCI defines into a common headerGabor Juhos2013-02-173-24/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The constants will be used by a subsequent patch. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/4907/ Signed-off-by: John Crispin <blogic@openwrt.org>
| | * | | MIPS: pci-ar71xx: convert into a platform driverGabor Juhos2013-02-171-4/+56
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The patch converts the pci-ar71xx driver into a platform driver. This makes it possible to register the PCI controller as a plain platform device. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/4906/ Signed-off-by: John Crispin <blogic@openwrt.org>
| | * | | MIPS: pci-ar724x: convert into a platform driverGabor Juhos2013-02-171-2/+55
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The patch converts the pci-ar724x driver into a platform driver. This makes it possible to register the PCI controller as a plain platform device. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/4905/ Signed-off-by: John Crispin <blogic@openwrt.org>
| | * | | MIPS: ralink: add CPU interrupt controller to of_irq_idsGabor Juhos2013-02-172-3/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Convert the ralink IRQ code to make use of the new MIPS IRQ controller OF mappings. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Signed-off-by: John Crispin <blogic@openwrt.org> Acked-by: David Daney <david.daney@cavium.com> Patchwork: http://patchwork.linux-mips.org/patch/4900/
| | * | | MIPS: add irqdomain support for the CPU IRQ controllerGabor Juhos2013-02-172-0/+48
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add code to load a irq_domain for the MIPS IRQ controller from a devicetree file. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Signed-off-by: John Crispin <blogic@openwrt.org> Acked-by: David Daney <david.daney@cavium.com> Patchwork: http://patchwork.linux-mips.org/patch/4902/
| | * | | MIPS: ralink: adds default config fileJohn Crispin2013-02-171-0/+167
| | | | | | | | | | | | | | | | | | | | Signed-off-by: John Crispin <blogic@openwrt.org>
| | * | | MIPS: ralink: adds Kbuild filesJohn Crispin2013-02-176-0/+76
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add the Kbuild symbols and Makefiles needed to actually build the ralink code from this series Signed-off-by: John Crispin <blogic@openwrt.org> Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/4899/
| | * | | MIPS: ralink: adds rt305x devicetreeJohn Crispin2013-02-172-0/+148
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds the devicetree file that describes the rt305x evaluation kit. Signed-off-by: John Crispin <blogic@openwrt.org> Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/4898/
| | * | | MIPS: ralink: adds support for RT305x SoC familyJohn Crispin2013-02-172-0/+381
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support code for rt3050, rt3052, rt3350, rt3352 and rt5350 SOC. The code detects the SoC and registers the clk / pinmux settings. Signed-off-by: John Crispin <blogic@openwrt.org> Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/4896/
| | * | | MIPS: ralink: adds early_printk supportJohn Crispin2013-02-171-0/+44
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add the code needed to make early printk work. Signed-off-by: John Crispin <blogic@openwrt.org> Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/4897/
| | * | | MIPS: ralink: adds OF codeJohn Crispin2013-02-171-0/+107
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Until there is a generic MIPS way of handing the DTB over from bootloader to kernel we rely on a built in devicetrees. The OF code also remaps those register ranges that we use global in our drivers. Signed-off-by: John Crispin <blogic@openwrt.org> Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/4895/
| | * | | MIPS: ralink: adds clkdev codeJohn Crispin2013-02-171-0/+72
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | These SoCs have a limited number of fixed rate clocks. Add support for the clk and clkdev api. Signed-off-by: John Crispin <blogic@openwrt.org> Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/4894/
| | * | | MIPS: ralink: adds prom and cmdline codeJohn Crispin2013-02-171-0/+69
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add minimal code to handle commandlines. Signed-off-by: John Crispin <blogic@openwrt.org> Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/4892/
| | * | | MIPS: ralink: adds reset codeJohn Crispin2013-02-171-0/+44
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Resetting these SoCs requires no real magic. The code is straight forward. Signed-off-by: John Crispin <blogic@openwrt.org> Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/4891/
| | * | | MIPS: ralink: adds irq codeJohn Crispin2013-02-171-0/+176
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | All of the Ralink Wifi SoC currently supported by this series share the same interrupt controller (INTC). Signed-off-by: John Crispin <blogic@openwrt.org> Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/4890/
| | * | | MIPS: ralink: adds include filesJohn Crispin2013-02-173-0/+108
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Before we start adding the platform code we add the common include files. Signed-off-by: John Crispin <blogic@openwrt.org> Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/4893/
| | * | | MIPS: ath79: simplify MISC IRQ handlingGabor Juhos2013-02-172-36/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The current code uses multiple if statements for demultiplexing the different interrupt sources. Additionally, the MISC interrupt controller has 32 interrupt sources and the current code does not handles all of them. Get rid of the if statements and process all interrupt sources in a loop to fix these issues. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/4874/ Signed-off-by: John Crispin <blogic@openwrt.org>
| | * | | MIPS: ath79: simplify ath79_gpio_function_* routinesGabor Juhos2013-02-171-24/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Make ath79_gpio_function_{en,dis}able to be wrappers around ath79_gpio_function_setup. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/4871/ Signed-off-by: John Crispin <blogic@openwrt.org>
| | * | | MIPS: ath79: fix GPIO function selection for AR934x SoCsGabor Juhos2013-02-172-12/+28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | GPIO function selection is not working on the AR934x SoCs because the offset of the function selection register is different on those. Add a helper routine which returns the correct register address based on the SoC type, and use that in the 'ath79_gpio_function_*' routines. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/4870/ Signed-off-by: John Crispin <blogic@openwrt.org>
| | * | | MIPS: Add new GIC clocksource.Steven J. Hill2013-02-176-34/+106
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add new clocksource that uses the counter present on the MIPS Global Interrupt Controller. Signed-off-by: Steven J. Hill <sjhill@mips.com> Patchwork: http://patchwork.linux-mips.org/patch/4681/ Signed-off-by: John Crispin <blogic@openwrt.org>
| | * | | MIPS: dsp: Simplify the DSP macros.Steven J. Hill2013-02-171-201/+30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Simplify the DSP macros for vanilla (non-microMIPS) kernels and toolchains that do not support the DSP ASEs. Signed-off-by: Steven J. Hill <sjhill@mips.com> Patchwork: http://patchwork.linux-mips.org/patch/4687/ Signed-off-by: John Crispin <blogic@openwrt.org>
| | * | | MIPS: dsp: Support toolchains without DSP ASE and microMIPS.Steven J. Hill2013-02-171-0/+89
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add macros to support the DSP ASE with microMIPS kernels when the toolchain does not have support. Signed-off-by: Steven J. Hill <sjhill@mips.com> Patchwork: http://patchwork.linux-mips.org/patch/4686/ Signed-off-by: John Crispin <blogic@openwrt.org>
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